details

property	value
status	complete
benchmark	random-123.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n027.star.cs.uiowa.edu
space	Waldmann_19

run statistics

property	value
solver	matchbox-2020-06-25
configuration	tc20-std.sh
runtime (wallclock)	4.34088206291 seconds
cpu usage	17.039513731
max memory	8.83810304E8

stage attributes

key	value
output-size	6642
starexec-result	NO

output

/export/starexec/sandbox2/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO ************************************************** summary ************************************************** SRS with 3 rules on 2 letters looping SRS derivation Closure source : abbaaaaaaaaaab target : abbaaaaaaaaaab steps : 36 strict : True last_rule_app_source : 0 last_rule_app_target : 6 ************************************************** proof ************************************************** property Termination has value Just False for SRS [b, a, b, b] -> [b, b, b, b] {- Input 0 -} [b, a, a, b] -> [a, b, a, a] {- Input 1 -} [a, a, a, a] -> [b, b, b, a] {- Input 2 -} reason Nontermination looping SRS derivation Closure source : abbaaaaaaaaaab target : abbaaaaaaaaaab steps : 36 strict : True last_rule_app_source : 0 last_rule_app_target : 6 reason : Overlap (Inside 6) Overlap (Inside 8) Overlap (Inside 10) Overlap (Inside 3) Overlap (Inside 7) Overlap (Inside 5) Overlap (Inside 9) Overlap (Inside 8) Overlap (Inside 7) Overlap (Right 3) Overlap (Inside 6) Overlap (Inside 8) Overlap (Inside 2) Overlap (Inside 1) Overlap (Inside 4) Overlap (Inside 7) Overlap (Inside 6) Overlap (Inside 5) Overlap (Inside 4) Overlap (Inside 3) Overlap (Inside 6) Overlap (Inside 9) Overlap (Inside 7) Overlap (Right 3) Overlap (Inside 2) Overlap (Inside 5) Overlap (Right 3) Overlap (Right 3) Overlap (Right 3) Overlap (Right 3) Overlap (Right 3) Overlap (Inside 0) Overlap (Right 3) Overlap (Right 3) Overlap (Right 3) Rule 1 Rule 1 Rule 1 Rule 1 Rule 2 Rule 1 Rule 1 Rule 1 Rule 1 Rule 1 Rule 2 Rule 1 Rule 1 Rule 1 Rule 2 Rule 0 Rule 1 Rule 1 Rule 1 Rule 1 Rule 1 Rule 2 Rule 1 Rule 1 Rule 1 Rule 1 Rule 2 popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard