details

property	value
status	complete
benchmark	random-400.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n075.star.cs.uiowa.edu
space	Waldmann_19

run statistics

property	value
solver	matchbox-2020-06-25
configuration	tc20-std.sh
runtime (wallclock)	101.546935081 seconds
cpu usage	404.257119885
max memory	3.5446784E9

stage attributes

key	value
output-size	12026
starexec-result	NO

output

/export/starexec/sandbox/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO ************************************************** summary ************************************************** SRS with 3 rules on 2 letters looping SRS derivation Closure source : aabaabbbaabbbaa target : aabaabbbaabbbaa steps : 60 strict : True last_rule_app_source : 0 last_rule_app_target : 1 ************************************************** proof ************************************************** property Termination has value Just False for SRS [b, b, a, b] -> [a, a, a, a] {- Input 0 -} [a, b, a, a] -> [a, b, b, b] {- Input 1 -} [a, b, a, a] -> [b, a, b, b] {- Input 2 -} reason Nontermination looping SRS derivation Closure source : aabaabbbaabbbaa target : aabaabbbaabbbaa steps : 60 strict : True last_rule_app_source : 0 last_rule_app_target : 1 reason : Overlap (Inside 1) Overlap (Inside 3) Overlap (Inside 6) Overlap (Inside 8) Overlap (Inside 6) Overlap (Inside 1) Overlap (Inside 3) Overlap (Inside 0) Overlap (Inside 4) Overlap (Inside 7) Overlap (Inside 5) Overlap (Inside 2) Overlap (Inside 3) Overlap (Inside 5) Overlap (Inside 8) Overlap (Inside 3) Overlap (Inside 5) Overlap (Inside 6) Overlap (Inside 9) Overlap (Inside 11) Overlap (Inside 7) Overlap (Inside 2) Overlap (Inside 4) Overlap (Inside 1) Overlap (Inside 5) Overlap (Inside 8) Overlap (Inside 6) Overlap (Inside 3) Overlap (Inside 4) Overlap (Inside 6) Overlap (Inside 9) Overlap (Inside 4) Overlap (Inside 6) Overlap (Inside 3) Overlap (Inside 7) Overlap (Inside 10) Overlap (Inside 8) Overlap (Inside 5) Overlap (Inside 2) Overlap (Inside 6) Overlap (Inside 9) Overlap (Inside 7) Overlap (Inside 4) Overlap (Inside 5) Overlap (Inside 7) Overlap (Inside 10) Overlap (Inside 5) Overlap (Inside 7) Overlap (Inside 8) Overlap (Right 3) Overlap (Inside 9) Overlap (Inside 4) Overlap (Inside 6) Overlap (Inside 3) Overlap (Inside 7) Overlap (Right 2) Overlap (Right 1) Overlap (Right 2) Overlap (Right 1) Rule 0 Rule 1 Rule 0 popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard