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SRS Standard pair #487511230
details
property
value
status
complete
benchmark
09.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n132.star.cs.uiowa.edu
space
Zantema_06
run statistics
property
value
solver
matchbox-2020-06-25
configuration
tc20-std.sh
runtime (wallclock)
2.99864006042 seconds
cpu usage
11.57836763
max memory
5.58391296E8
stage attributes
key
value
output-size
8434
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 5 rules on 4 letters mirror SRS with 5 rules on 4 letters DP SRS with 15 strict rules and 5 weak rules on 7 letters weights SRS with 3 strict rules and 5 weak rules on 7 letters EDG 2 sub-proofs 1 SRS with 1 strict rules and 5 weak rules on 5 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 5, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 0 strict rules and 5 weak rules on 4 letters EDG 2 SRS with 2 strict rules and 5 weak rules on 6 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 4, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 1 strict rules and 5 weak rules on 6 letters weights SRS with 0 strict rules and 5 weak rules on 4 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [a, s] -> [s, a] {- Input 0 -} [b, a, b, s] -> [a, b, s, a] {- Input 1 -} [b, a, b, b] -> [c, s] {- Input 2 -} [c, s] -> [a, b, a, b] {- Input 3 -} [a, b, a, a] -> [b, a, b, a] {- Input 4 -} reason mirror property Termination has value Just True for SRS [s, a] -> [a, s] {- Mirror (Input 0) -} [s, b, a, b] -> [a, s, b, a] {- Mirror (Input 1) -} [b, b, a, b] -> [s, c] {- Mirror (Input 2) -} [s, c] -> [b, a, b, a] {- Mirror (Input 3) -} [a, a, b, a] -> [a, b, a, b] {- Mirror (Input 4) -} reason DP property Termination has value Just True for SRS [s, a] ->= [a, s] {- DP Nontop (Mirror (Input 0)) -} [s, b, a, b] ->= [a, s, b, a] {- DP Nontop (Mirror (Input 1)) -} [b, b, a, b] ->= [s, c] {- DP Nontop (Mirror (Input 2)) -} [s, c] ->= [b, a, b, a] {- DP Nontop (Mirror (Input 3)) -} [a, a, b, a] ->= [a, b, a, b] {- DP Nontop (Mirror (Input 4)) -} [a#, a, b, a] |-> [a#, b] {- DP (Top 2) (Mirror (Input 4)) -} [a#, a, b, a] |-> [a#, b, a, b] {- DP (Top 0) (Mirror (Input 4)) -} [a#, a, b, a] |-> [b#] {- DP (Top 3) (Mirror (Input 4)) -} [a#, a, b, a] |-> [b#, a, b] {- DP (Top 1) (Mirror (Input 4)) -} [s#, a] |-> [a#, s] {- DP (Top 0) (Mirror (Input 0)) -} [s#, a] |-> [s#] {- DP (Top 1) (Mirror (Input 0)) -} [s#, b, a, b] |-> [a#] {- DP (Top 3) (Mirror (Input 1)) -} [s#, b, a, b] |-> [a#, s, b, a] {- DP (Top 0) (Mirror (Input 1)) -} [s#, b, a, b] |-> [s#, b, a] {- DP (Top 1) (Mirror (Input 1)) -} [s#, b, a, b] |-> [b#, a] {- DP (Top 2) (Mirror (Input 1)) -} [s#, c] |-> [a#] {- DP (Top 3) (Mirror (Input 3)) -} [s#, c] |-> [a#, b, a] {- DP (Top 1) (Mirror (Input 3)) -} [s#, c] |-> [b#, a] {- DP (Top 2) (Mirror (Input 3)) -} [s#, c] |-> [b#, a, b, a] {- DP (Top 0) (Mirror (Input 3)) -} [b#, b, a, b] |-> [s#, c] {- DP (Top 0) (Mirror (Input 2)) -} reason (s, 3/2) (a, 3/2) (b, 3/2) (c, 9/2) (b#, 1/2) (s#, 1/2) property Termination has value Just True for SRS [s, a] ->= [a, s] {- DP Nontop (Mirror (Input 0)) -} [s, b, a, b] ->= [a, s, b, a] {- DP Nontop (Mirror (Input 1)) -} [b, b, a, b] ->= [s, c] {- DP Nontop (Mirror (Input 2)) -} [s, c] ->= [b, a, b, a] {- DP Nontop (Mirror (Input 3)) -} [a, a, b, a] ->= [a, b, a, b] {- DP Nontop (Mirror (Input 4)) -} [a#, a, b, a] |-> [a#, b, a, b] {- DP (Top 0) (Mirror (Input 4)) -} [s#, c] |-> [b#, a, b, a] {- DP (Top 0) (Mirror (Input 3)) -} [b#, b, a, b] |-> [s#, c] {- DP (Top 0) (Mirror (Input 2)) -} reason EDG property Termination has value Just True for SRS [a#, a, b, a] |-> [a#, b, a, b] {- DP (Top 0) (Mirror (Input 4)) -} [s, a] ->= [a, s] {- DP Nontop (Mirror (Input 0)) -} [s, b, a, b] ->= [a, s, b, a] {- DP Nontop (Mirror (Input 1)) -} [b, b, a, b] ->= [s, c] {- DP Nontop (Mirror (Input 2)) -} [s, c] ->= [b, a, b, a] {- DP Nontop (Mirror (Input 3)) -} [a, a, b, a] ->= [a, b, a, b] {- DP Nontop (Mirror (Input 4)) -} reason ( s , Wk / 3A - \
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