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SRS Standard pair #487511398
details
property
value
status
complete
benchmark
04.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n175.star.cs.uiowa.edu
space
Zantema_06
run statistics
property
value
solver
matchbox-2020-06-25
configuration
tc20-std.sh
runtime (wallclock)
0.860407114029 seconds
cpu usage
3.245825677
max memory
1.55357184E8
stage attributes
key
value
output-size
9324
starexec-result
YES
output
/export/starexec/sandbox2/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 3 rules on 3 letters mirror SRS with 3 rules on 3 letters tile all, by Config { method = Forward,width = 2,unlabel = False} SRS with 24 rules on 10 letters unlabel SRS with 2 rules on 2 letters DP SRS with 6 strict rules and 2 weak rules on 4 letters weights SRS with 3 strict rules and 2 weak rules on 4 letters EDG SRS with 3 strict rules and 2 weak rules on 4 letters mirror SRS with 3 strict rules and 2 weak rules on 4 letters Matrix { monotone = Strict, domain = Natural, shape = Full, bits = 3, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 1 strict rules and 1 weak rules on 4 letters weights SRS with 0 rules on 0 letters mirror SRS with 0 rules on 0 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [a, a, b] -> [b, a] {- Input 0 -} [b, a, a] -> [a, a, a, b] {- Input 1 -} [a, c] -> [c, b] {- Input 2 -} reason mirror property Termination has value Just True for SRS [b, a, a] -> [a, b] {- Mirror (Input 0) -} [a, a, b] -> [b, a, a, a] {- Mirror (Input 1) -} [c, a] -> [b, c] {- Mirror (Input 2) -} reason Tiling { method = Forward, width = 2, state_type = Bit64, map_type = Enum, unlabel = False, print_completion_steps = False, print_tiles = False, verbose = False, tracing = False} steps 1 using 11 tiles tile all rules steps: 1 property Termination has value Just True for SRS [[<, b], [b, a], [a, a], [a, >]] -> [ [<, a] , [a, b] , [ b , > ] ] {- Semlab 0 (Concon 0 (Mirror (Input 0))) -} [[<, b], [b, a], [a, a], [a, a]] -> [ [<, a] , [a, b] , [ b , a ] ] {- Semlab 0 (Concon 1 (Mirror (Input 0))) -} [[<, b], [b, a], [a, a], [a, b]] -> [ [<, a] , [a, b] , [ b , b ] ] {- Semlab 0 (Concon 2 (Mirror (Input 0))) -} [[<, b], [b, a], [a, a], [a, c]] -> [ [<, a] , [a, b] , [ b , c ] ] {- Semlab 0 (Concon 3 (Mirror (Input 0))) -} [[a, b], [b, a], [a, a], [a, >]] -> [ [a, a] , [a, b] , [ b , > ] ] {- Semlab 1 (Concon 0 (Mirror (Input 0))) -} [[a, b], [b, a], [a, a], [a, a]] -> [ [a, a] , [a, b] , [ b , a ] ] {- Semlab 1 (Concon 1 (Mirror (Input 0))) -} [[a, b], [b, a], [a, a], [a, b]] -> [ [a, a] , [a, b] , [ b , b ] ] {- Semlab 1 (Concon 2 (Mirror (Input 0))) -} [[a, b], [b, a], [a, a], [a, c]] -> [ [a, a] , [a, b] , [ b , c ] ] {- Semlab 1 (Concon 3 (Mirror (Input 0))) -} [[b, b], [b, a], [a, a], [a, >]] -> [ [b, a] , [a, b] , [ b , > ] ] {- Semlab 2 (Concon 0 (Mirror (Input 0))) -} [[b, b], [b, a], [a, a], [a, a]] -> [ [b, a] , [a, b] , [ b , a ] ] {- Semlab 2 (Concon 1 (Mirror (Input 0))) -} [[b, b], [b, a], [a, a], [a, b]] -> [ [b, a] , [a, b] , [ b , b ] ] {- Semlab 2 (Concon 2 (Mirror (Input 0))) -} [[b, b], [b, a], [a, a], [a, c]] -> [ [b, a] , [a, b] , [ b , c ] ] {- Semlab 2 (Concon 3 (Mirror (Input 0))) -} [[<, a], [a, a], [a, b], [b, >]] -> [ [<, b] , [b, a] , [a, a] , [a, a] , [ a , > ] ] {- Semlab 0 (Concon 0 (Mirror (Input 1))) -} [[<, a], [a, a], [a, b], [b, a]] -> [ [<, b] , [b, a] , [a, a] , [a, a] , [ a , a ] ] {- Semlab 0 (Concon 1 (Mirror (Input 1))) -} [[<, a], [a, a], [a, b], [b, b]] -> [ [<, b] , [b, a] , [a, a] , [a, a] , [ a , b ] ] {- Semlab 0 (Concon 2 (Mirror (Input 1))) -} [[<, a], [a, a], [a, b], [b, c]] -> [ [<, b] , [b, a] , [a, a] , [a, a] , [ a , c ] ] {- Semlab 0 (Concon 3 (Mirror (Input 1))) -} [[a, a], [a, a], [a, b], [b, >]] -> [ [a, b] , [b, a] , [a, a] , [a, a] , [ a , > ] ] {- Semlab 1 (Concon 0 (Mirror (Input 1))) -} [[a, a], [a, a], [a, b], [b, a]] -> [ [a, b] , [b, a] , [a, a] , [a, a] , [ a , a ] ] {- Semlab 1 (Concon 1 (Mirror (Input 1))) -} [[a, a], [a, a], [a, b], [b, b]] -> [ [a, b] , [b, a] , [a, a] , [a, a] , [ a , b ] ] {- Semlab 1 (Concon 2 (Mirror (Input 1))) -} [[a, a], [a, a], [a, b], [b, c]] -> [ [a, b] , [b, a] , [a, a] , [a, a] , [ a , c ] ] {- Semlab 1 (Concon 3 (Mirror (Input 1))) -} [[b, a], [a, a], [a, b], [b, >]] -> [ [b, b] , [b, a] , [a, a] , [a, a] , [ a , > ] ] {- Semlab 2 (Concon 0 (Mirror (Input 1))) -} [[b, a], [a, a], [a, b], [b, a]] -> [ [b, b] , [b, a] , [a, a] , [a, a] , [ a , a ] ] {- Semlab 2 (Concon 1 (Mirror (Input 1))) -} [[b, a], [a, a], [a, b], [b, b]] -> [ [b, b] , [b, a] , [a, a] , [a, a] , [ a , b ] ] {- Semlab 2 (Concon 2 (Mirror (Input 1))) -} [[b, a], [a, a], [a, b], [b, c]] -> [ [b, b] , [b, a] , [a, a] , [a, a] , [ a , c ] ] {- Semlab 2 (Concon 3 (Mirror (Input 1))) -} reason unlabel property Termination has value Just True for SRS [0, 1, 1] -> [1, 0] {- Mirror (Input 0) -} [1, 1, 0] -> [0, 1, 1, 1] {- Mirror (Input 1) -} reason DP property Termination has value Just True for SRS [0, 1, 1] ->= [1, 0] {- DP Nontop (Mirror (Input 0)) -} [1, 1, 0] ->= [0, 1, 1, 1] {- DP Nontop (Mirror (Input 1)) -} [0#, 1, 1] |-> [0#] {- DP (Top 1) (Mirror (Input 0)) -} [0#, 1, 1] |-> [1#, 0] {- DP (Top 0) (Mirror (Input 0)) -} [1#, 1, 0] |-> [0#, 1, 1, 1] {- DP (Top 0) (Mirror (Input 1)) -} [1#, 1, 0] |-> [1#] {- DP (Top 3) (Mirror (Input 1)) -} [1#, 1, 0] |-> [1#, 1] {- DP (Top 2) (Mirror (Input 1)) -} [1#, 1, 0] |-> [1#, 1, 1] {- DP (Top 1) (Mirror (Input 1)) -} reason (0, 1/3) (0#, 1/3) property Termination has value Just True for SRS [0, 1, 1] ->= [1, 0] {- DP Nontop (Mirror (Input 0)) -}
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