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SRS Standard pair #487511484
details
property
value
status
complete
benchmark
num-519.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n129.star.cs.uiowa.edu
space
Secret_07_SRS
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
0.469061851501 seconds
cpu usage
0.727612556
max memory
3.45939968E8
stage attributes
key
value
output-size
1175
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 2-rule system { 0 0 0 -> 1 2 , 2 1 -> 0 0 0 0 2 } Loop of length 15 starting with a string of length 4 using right expansion and the encoding { 0->a, 1->b, ... }: .cb.bb rule cb-> aaaac at position 0 .aaaac.bb rule aaa-> bc at position 0 .bcac.bb rule cb-> aaaac at position 3 .bcaaaaac.b rule aaa-> bc at position 2 .bcbcaac.b rule cb-> aaaac at position 6 .bcbcaaaaaac. rule aaa-> bc at position 4 .bcbcbcaaac. rule cb-> aaaac at position 3 .bcbaaaaccaaac. rule aaa-> bc at position 3 .bcbbcaccaaac. rule aaa-> bc at position 8 .bcbbcaccbcc. rule cb-> aaaac at position 7 .bcbbcacaaaaccc. rule aaa-> bc at position 7 .bcbbcacbcaccc. rule cb-> aaaac at position 6 .bcbbcaaaaaccaccc. rule aaa-> bc at position 5 .bcbbcbcaaccaccc. rule cb-> aaaac at position 4 .bcbbaaaaccaaccaccc. rule aaa-> bc at position 4 .bcbbbcaccaaccaccc.
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