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SRS Standard pair #487511568
details
property
value
status
complete
benchmark
uni-4.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n129.star.cs.uiowa.edu
space
Waldmann_06_SRS
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
0.469666004181 seconds
cpu usage
0.673145305
max memory
3.446784E8
stage attributes
key
value
output-size
1078
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1 }, it remains to prove termination of the 2-rule system { 0 0 0 0 -> 1 0 0 0 , 1 1 -> 0 0 1 } The system was reversed. After renaming modulo { 0->0, 1->1 }, it remains to prove termination of the 2-rule system { 0 0 0 0 -> 0 0 0 1 , 1 1 -> 1 0 0 } Loop of length 9 starting with a string of length 10 using right expansion and the encoding { 0->a, 1->b, ... }: .bb.aaabaaab rule bb-> baa at position 0 .baa.aaabaaab rule aaaa-> aaab at position 2 .baaaab.baaab rule aaaa-> aaab at position 1 .baaabb.baaab rule bb-> baa at position 5 .baaabbaa.aaab rule aaaa-> aaab at position 7 .baaabbaaaab.b rule aaaa-> aaab at position 6 .baaabbaaabb.b rule bb-> baa at position 10 .baaabbaaabbaa. rule bb-> baa at position 9 .baaabbaaabaaaa. rule aaaa-> aaab at position 10 .baaabbaaabaaab.
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