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SRS Standard pair #487511616
details
property
value
status
complete
benchmark
uni-6.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n114.star.cs.uiowa.edu
space
Waldmann_06_SRS
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
0.527292013168 seconds
cpu usage
0.860262536
max memory
3.72641792E8
stage attributes
key
value
output-size
1466
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, c->1, b->2 }, it remains to prove termination of the 3-rule system { 0 0 0 -> 1 1 2 , 2 2 2 -> 1 1 1 , 1 1 1 -> 0 2 2 } The system was reversed. After renaming modulo { 0->0, 2->1, 1->2 }, it remains to prove termination of the 3-rule system { 0 0 0 -> 1 2 2 , 1 1 1 -> 2 2 2 , 2 2 2 -> 1 1 0 } Loop of length 19 starting with a string of length 7 using right expansion and the encoding { 0->a, 1->b, ... }: .bbb.aacc rule bbb-> ccc at position 0 .ccc.aacc rule ccc-> bba at position 0 .bba.aacc rule aaa-> bcc at position 2 .bbbcc.cc rule ccc-> bba at position 3 .bbbbba.c rule bbb-> ccc at position 2 .bbccca.c rule ccc-> bba at position 2 .bbbbaa.c rule bbb-> ccc at position 1 .bcccaa.c rule ccc-> bba at position 1 .bbbaaa.c rule aaa-> bcc at position 3 .bbbbcc.c rule ccc-> bba at position 4 .bbbbbba. rule bbb-> ccc at position 3 .bbbccca. rule ccc-> bba at position 3 .bbbbbaa. rule bbb-> ccc at position 2 .bbcccaa. rule ccc-> bba at position 2 .bbbbaaa. rule aaa-> bcc at position 4 .bbbbbcc. rule bbb-> ccc at position 2 .bbccccc. rule ccc-> bba at position 2 .bbbbacc. rule bbb-> ccc at position 1 .bcccacc. rule ccc-> bba at position 1 .bbbaacc.
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