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SRS Standard pair #487511646
details
property
value
status
complete
benchmark
sym-1.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n027.star.cs.uiowa.edu
space
Waldmann_06_SRS
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
0.479151964188 seconds
cpu usage
0.610915632
max memory
3.42867968E8
stage attributes
key
value
output-size
727
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES After renaming modulo { a->0, b->1 }, it remains to prove termination of the 3-rule system { 0 0 -> 0 1 0 , 1 1 -> 0 0 , 0 1 1 0 -> } Applying sparse untiling TRFCU(2) [Geser/Hofbauer/Waldmann, FSCD 2019]. After renaming modulo { 0->0, 1->1 }, it remains to prove termination of the 1-rule system { 0 0 -> 0 1 0 } Applying sparse untiling TRFCU(2) [Geser/Hofbauer/Waldmann, FSCD 2019]. After renaming modulo { }, it remains to prove termination of the 0-rule system { }
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