details

property	value
status	complete
benchmark	3.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n132.star.cs.uiowa.edu
space	Mixed_SRS

run statistics

property	value
solver	matchbox-2020-06-25
configuration	tc20-std.sh
runtime (wallclock)	0.535432100296 seconds
cpu usage	1.770185886
max memory	6.7452928E7

stage attributes

key	value
output-size	39547
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 2 rules on 3 letters mirror SRS with 2 rules on 3 letters tile all, by Config { method = Forward,width = 2,unlabel = False} SRS with 17 rules on 7 letters mirror SRS with 17 rules on 7 letters tile all, by Config { method = Forward,width = 2,unlabel = False} SRS with 116 rules on 22 letters weights SRS with 0 rules on 0 letters no strict rules ************************************************** proof ************************************************** property Termination has value Just True for SRS [a, a] -> [a, b, a] {- Input 0 -} [b, a, b] -> [a, c, a] {- Input 1 -} reason mirror property Termination has value Just True for SRS [a, a] -> [a, b, a] {- Mirror (Input 0) -} [b, a, b] -> [a, c, a] {- Mirror (Input 1) -} reason Tiling { method = Forward, width = 2, state_type = Bit64, map_type = Enum, unlabel = False, print_completion_steps = False, print_tiles = False, verbose = False, tracing = False} steps 1 using 7 tiles tile all rules steps: 1 property Termination has value Just True for SRS [[<, a], [a, a], [a, >]] -> [ [<, a] , [a, b] , [b, a] , [ a , > ] ] {- Semlab 0 (Concon 0 (Mirror (Input 0))) -} [[<, a], [a, a], [a, a]] -> [ [<, a] , [a, b] , [b, a] , [ a , a ] ] {- Semlab 0 (Concon 1 (Mirror (Input 0))) -} [[<, a], [a, a], [a, b]] -> [ [<, a] , [a, b] , [b, a] , [ a , b ] ] {- Semlab 0 (Concon 2 (Mirror (Input 0))) -} [[<, a], [a, a], [a, c]] -> [ [<, a] , [a, b] , [b, a] , [ a , c ] ] {- Semlab 0 (Concon 3 (Mirror (Input 0))) -} [[a, a], [a, a], [a, >]] -> [ [a, a] , [a, b] , [b, a] , [ a , > ] ] {- Semlab 1 (Concon 0 (Mirror (Input 0))) -} [[a, a], [a, a], [a, a]] -> [ [a, a] , [a, b] , [b, a] , [ a , a ] ] {- Semlab 1 (Concon 1 (Mirror (Input 0))) -} [[a, a], [a, a], [a, b]] -> [ [a, a] , [a, b] , [b, a] , [ a , b ] ] {- Semlab 1 (Concon 2 (Mirror (Input 0))) -} [[a, a], [a, a], [a, c]] -> [ [a, a] , [a, b] , [b, a] , [ a , c ] ] {- Semlab 1 (Concon 3 (Mirror (Input 0))) -} [[b, a], [a, a], [a, >]] -> [ [b, a] , [a, b] , [b, a] , [ a , > ] ] {- Semlab 2 (Concon 0 (Mirror (Input 0))) -} [[b, a], [a, a], [a, a]] -> [ [b, a] , [a, b] , [b, a] , [ a , a ] ] {- Semlab 2 (Concon 1 (Mirror (Input 0))) -} [[b, a], [a, a], [a, b]] -> [ [b, a] , [a, b] , [b, a] , [ a , b ] ] {- Semlab 2 (Concon 2 (Mirror (Input 0))) -} [[b, a], [a, a], [a, c]] -> [ [b, a] , [a, b] , [b, a] , [ a , c ] ] {- Semlab 2 (Concon 3 (Mirror (Input 0))) -} [[c, a], [a, a], [a, >]] -> [ [c, a] , [a, b] , [b, a] , [ a , > ] ] {- Semlab 3 (Concon 0 (Mirror (Input 0))) -} [[c, a], [a, a], [a, a]] -> [ [c, a] , [a, b] , [b, a] , [ a , a ] ] {- Semlab 3 (Concon 1 (Mirror (Input 0))) -} [[c, a], [a, a], [a, b]] -> [ [c, a] , [a, b] , [b, a] , [ a , b ] ] {- Semlab 3 (Concon 2 (Mirror (Input 0))) -} [[c, a], [a, a], [a, c]] -> [ [c, a] , [a, b] , [b, a] , [ a , c ] ] {- Semlab 3 (Concon 3 (Mirror (Input 0))) -} [[a, b], [b, a], [a, b], [b, a]] -> [ [a, a] , [a, c] , [c, a] , [ a , a ] ] {- Semlab 0 (Concon 0 (Mirror (Input 1))) -} reason mirror property Termination has value Just True for SRS [[a, >], [a, a], [<, a]] -> [ [a, >] , [b, a] , [a, b] , [ < , a ] ] {- Mirror (Semlab 0 (Concon 0 (Mirror (Input 0)))) -} [[a, a], [a, a], [<, a]] -> [ [a, a] , [b, a] , [a, b] , [ < , a ] ] {- Mirror (Semlab 0 (Concon 1 (Mirror (Input 0)))) -} [[a, b], [a, a], [<, a]] -> [ [a, b] , [b, a] , [a, b] , [ < , a ] ] {- Mirror (Semlab 0 (Concon 2 (Mirror (Input 0)))) -} [[a, c], [a, a], [<, a]] -> [ [a, c] , [b, a] , [a, b] , [ < , a ] ] {- Mirror (Semlab 0 (Concon 3 (Mirror (Input 0)))) -} [[a, >], [a, a], [a, a]] -> [ [a, >] , [b, a] , [a, b] , [ a , a ] ] {- Mirror (Semlab 1 (Concon 0 (Mirror (Input 0)))) -} [[a, a], [a, a], [a, a]] -> [ [a, a] , [b, a] , [a, b] , [ a , a ] ] {- Mirror (Semlab 1 (Concon 1 (Mirror (Input 0)))) -} [[a, b], [a, a], [a, a]] -> [ [a, b] , [b, a] , [a, b] , [ a , a ] ] {- Mirror (Semlab 1 (Concon 2 (Mirror (Input 0)))) -} [[a, c], [a, a], [a, a]] -> [ [a, c] , [b, a] , [a, b] , [ a , a ] ] {- Mirror (Semlab 1 (Concon 3 (Mirror (Input 0)))) -} [[a, >], [a, a], [b, a]] -> [ [a, >] , [b, a] , [a, b] , [ b , a ] ] {- Mirror (Semlab 2 (Concon 0 (Mirror (Input 0)))) -} [[a, a], [a, a], [b, a]] -> [ [a, a] , [b, a] , [a, b] , [ b , a ] ] {- Mirror (Semlab 2 (Concon 1 (Mirror (Input 0)))) -} [[a, b], [a, a], [b, a]] -> [ [a, b] , [b, a] , [a, b] , [ b , a ] ] {- Mirror (Semlab 2 (Concon 2 (Mirror (Input 0)))) -} [[a, c], [a, a], [b, a]] -> [ [a, c] , [b, a] , [a, b] , [ b , a ] ] {- Mirror (Semlab 2 (Concon 3 (Mirror (Input 0)))) -} [[a, >], [a, a], [c, a]] -> [ [a, >] , [b, a] , [a, b] , [ c , a ] ] {- Mirror (Semlab 3 (Concon 0 (Mirror (Input 0)))) -} [[a, a], [a, a], [c, a]] -> [ [a, a] , [b, a] , [a, b] , [ c , a ] ] {- Mirror (Semlab 3 (Concon 1 (Mirror (Input 0)))) -} [[a, b], [a, a], [c, a]] -> [ [a, b] , [b, a] , [a, b] , [ c , a ] ] {- Mirror (Semlab 3 (Concon 2 (Mirror (Input 0)))) -} [[a, c], [a, a], [c, a]] -> [ [a, c] , [b, a] , [a, b] , [ c , a ] ] {- Mirror (Semlab 3 (Concon 3 (Mirror (Input 0)))) -} [[b, a], [a, b], [b, a], [a, b]] -> [ [a, a] , [c, a] , [a, c] , [ a , a ] ] {- Mirror (Semlab 0 (Concon 0 (Mirror (Input 1)))) -} reason Tiling { method = Forward, width = 2, state_type = Bit64, map_type = Enum, unlabel = False, print_completion_steps = False, print_tiles = False, verbose = False, tracing = False} steps 1 using 22 tiles tile all rules steps: 1 property Termination has value Just True for SRS [[<, [a, >]], [[a, >], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [<, [a, >]] , [ [a, >] , [b, a] ] , [ [b, a] , [a, b] ] , [ [a, b] , [<, a] ] , [ [<, a] , > ] ] {- Semlab 0 (Concon 0 (Mirror (Semlab 0 (Concon 0 (Mirror (Input 0)))))) -} [[<, [a, a]], [[a, a], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [<, [a, a]] , [ [a, a] , [b, a] ] , [ [b, a] , [a, b] ] , [ [a, b] , [<, a] ] , [ [<, a] , > ] ] {- Semlab 0 (Concon 0 (Mirror (Semlab 0 (Concon 1 (Mirror (Input 0)))))) -} [[[a, a], [a, a]], [[a, a], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [ [ a , a ] , [ a , a ] ] , [ [ a , a ] , [ b , a ] ] , [ [ b , a ] , [ a , b ] ] , [ [ a , b ] , [ < , a ] ] , [ [ < , a ] , > ] ] {- Semlab 1 (Concon 0 (Mirror (Semlab 0 (Concon 1 (Mirror (Input 0)))))) -} [[[a, >], [a, a]], [[a, a], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [ [ a , > ] , [ a , a ] ] , [ [ a , a ] , [ b , a ] ] , [ [ b , a ] , [ a , b ] ] , [ [ a , b ] , [ < , a ] ] , [ [ < , a ] , > ] ] {- Semlab 2 (Concon 0 (Mirror (Semlab 0 (Concon 1 (Mirror (Input 0)))))) -} [[[a, b], [a, a]], [[a, a], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [ [ a , b ] , [ a , a ] ] , [ [ a , a ] , [ b , a ] ] , [ [ b , a ] , [ a , b ] ] , [ [ a , b ] , [ < , a ] ] , [ [ < , a ] , > ] ] {- Semlab 3 (Concon 0 (Mirror (Semlab 0 (Concon 1 (Mirror (Input 0)))))) -} [[[a, c], [a, a]], [[a, a], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [ [ a , c ] , [ a , a ] ] , [ [ a , a ] , [ b , a ] ] , [ [ b , a ] , [ a , b ] ] , [ [ a , b ] , [ < , a ] ] , [ [ < , a ] , > ] ] {- Semlab 4 (Concon 0 (Mirror (Semlab 0 (Concon 1 (Mirror (Input 0)))))) -} [[<, [a, b]], [[a, b], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [<, [a, b]] , [ [a, b] , [b, a] ] , [ [b, a] , [a, b] ] , [ [a, b] , [<, a] ] , [ [<, a] , > ] ] {- Semlab 0 (Concon 0 (Mirror (Semlab 0 (Concon 2 (Mirror (Input 0)))))) -} [[[b, a], [a, b]], [[a, b], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [ [ b , a ] , [ a , b ] ] , [ [ a , b ] , [ b , a ] ] , [ [ b , a ] , [ a , b ] ] , [ [ a , b ] , [ < , a ] ] , [ [ < , a ] , > ] ] {- Semlab 1 (Concon 0 (Mirror (Semlab 0 (Concon 2 (Mirror (Input 0)))))) -} [[<, [a, c]], [[a, c], [a, a]], [[a, a], [<, a]], [[<, a], >]] -> [ [<, [a, c]] , [ [a, c] , [b, a] ] , [ [b, a] , [a, b] ] , [ [a, b] , [<, a] ] , [ [<, a] , > ] ] {- Semlab 0 (Concon 0 (Mirror (Semlab 0 (Concon 3 (Mirror (Input 0)))))) -} popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard