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SRS Standard pair #487511838
details
property
value
status
complete
benchmark
size-12-alpha-3-num-219.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n072.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
1.19606804848 seconds
cpu usage
3.495502311
max memory
7.02603264E8
stage attributes
key
value
output-size
1374
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 4-rule system { 0 -> , 0 1 -> 1 1 2 0 , 1 -> , 2 2 1 -> 0 } Loop of length 20 starting with a string of length 8 using right expansion and the encoding { 0->a, 1->b, ... }: .ab.bbbbbb rule ab-> bbca at position 0 .bbca.bbbbbb rule ab-> bbca at position 3 .bbcbbca.bbbbb rule b-> at position 3 .bbcbca.bbbbb rule b-> at position 3 .bbcca.bbbbb rule ab-> bbca at position 4 .bbccbbca.bbbb rule ccb-> a at position 2 .bbabca.bbbb rule ab-> bbca at position 5 .bbabcbbca.bbb rule b-> at position 5 .bbabcbca.bbb rule b-> at position 5 .bbabcca.bbb rule ab-> bbca at position 6 .bbabccbbca.bb rule ccb-> a at position 4 .bbababca.bb rule ab-> bbca at position 4 .bbabbbcaca.bb rule a-> at position 7 .bbabbbcca.bb rule ab-> bbca at position 8 .bbabbbccbbca.b rule ccb-> a at position 6 .bbabbbabca.b rule ab-> bbca at position 6 .bbabbbbbcaca.b rule a-> at position 9 .bbabbbbbcca.b rule ab-> bbca at position 10 .bbabbbbbccbbca. rule ccb-> a at position 8 .bbabbbbbabca. rule ab-> bbca at position 8 .bbabbbbbbbcaca.
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