details

property	value
status	complete
benchmark	size-12-alpha-3-num-561.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n076.star.cs.uiowa.edu
space	Waldmann_07_size12

run statistics

property	value
solver	ttt2-1.20
configuration	ttt2
runtime (wallclock)	11.8793189526 seconds
cpu usage	44.34072123
max memory	9.27879168E8

stage attributes

key	value
output-size	49796
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_ttt2 /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES Problem: a(b(x1)) -> x1 a(c(x1)) -> c(c(x1)) b(c(x1)) -> a(b(a(b(x1)))) Proof: DP Processor: DPs: b#(c(x1)) -> b#(x1) b#(c(x1)) -> a#(b(x1)) b#(c(x1)) -> b#(a(b(x1))) b#(c(x1)) -> a#(b(a(b(x1)))) TRS: a(b(x1)) -> x1 a(c(x1)) -> c(c(x1)) b(c(x1)) -> a(b(a(b(x1)))) TDG Processor: DPs: b#(c(x1)) -> b#(x1) b#(c(x1)) -> a#(b(x1)) b#(c(x1)) -> b#(a(b(x1))) b#(c(x1)) -> a#(b(a(b(x1)))) TRS: a(b(x1)) -> x1 a(c(x1)) -> c(c(x1)) b(c(x1)) -> a(b(a(b(x1)))) graph: b#(c(x1)) -> b#(a(b(x1))) -> b#(c(x1)) -> a#(b(a(b(x1)))) b#(c(x1)) -> b#(a(b(x1))) -> b#(c(x1)) -> b#(a(b(x1))) b#(c(x1)) -> b#(a(b(x1))) -> b#(c(x1)) -> a#(b(x1)) b#(c(x1)) -> b#(a(b(x1))) -> b#(c(x1)) -> b#(x1) b#(c(x1)) -> b#(x1) -> b#(c(x1)) -> a#(b(a(b(x1)))) b#(c(x1)) -> b#(x1) -> b#(c(x1)) -> b#(a(b(x1))) b#(c(x1)) -> b#(x1) -> b#(c(x1)) -> a#(b(x1)) b#(c(x1)) -> b#(x1) -> b#(c(x1)) -> b#(x1) SCC Processor: #sccs: 1 #rules: 2 #arcs: 8/16 DPs: b#(c(x1)) -> b#(a(b(x1))) b#(c(x1)) -> b#(x1) TRS: a(b(x1)) -> x1 a(c(x1)) -> c(c(x1)) b(c(x1)) -> a(b(a(b(x1)))) Root-Labeling Processor: DPs: b{#,(f5)}(f5(c)(c(f5)(x1))) -> b{#,(f5)}(f5(a)(a(b)(b(f5)(x1)))) b{#,(f5)}(f5(c)(c(a)(x1))) -> b{#,(f5)}(f5(a)(a(b)(b(a)(x1)))) b{#,(f5)}(f5(c)(c(b)(x1))) -> b{#,(f5)}(f5(a)(a(b)(b(b)(x1)))) b{#,(f5)}(f5(c)(c(c)(x1))) -> b{#,(f5)}(f5(a)(a(b)(b(c)(x1)))) b{#,(f5)}(f5(c)(c(f5)(x1))) -> b{#,(f5)}(f5(f5)(x1)) b{#,(f5)}(f5(c)(c(a)(x1))) -> b{#,(f5)}(f5(a)(x1)) b{#,(f5)}(f5(c)(c(b)(x1))) -> b{#,(f5)}(f5(b)(x1)) b{#,(f5)}(f5(c)(c(c)(x1))) -> b{#,(f5)}(f5(c)(x1)) TRS: f5(a)(a(b)(b(f5)(x1))) -> f5(f5)(x1) f5(a)(a(b)(b(a)(x1))) -> f5(a)(x1) f5(a)(a(b)(b(b)(x1))) -> f5(b)(x1) f5(a)(a(b)(b(c)(x1))) -> f5(c)(x1) a(a)(a(b)(b(f5)(x1))) -> a(f5)(x1) a(a)(a(b)(b(a)(x1))) -> a(a)(x1) a(a)(a(b)(b(b)(x1))) -> a(b)(x1) a(a)(a(b)(b(c)(x1))) -> a(c)(x1) b(a)(a(b)(b(f5)(x1))) -> b(f5)(x1) b(a)(a(b)(b(a)(x1))) -> b(a)(x1) b(a)(a(b)(b(b)(x1))) -> b(b)(x1) b(a)(a(b)(b(c)(x1))) -> b(c)(x1) c(a)(a(b)(b(f5)(x1))) -> c(f5)(x1) c(a)(a(b)(b(a)(x1))) -> c(a)(x1) c(a)(a(b)(b(b)(x1))) -> c(b)(x1) c(a)(a(b)(b(c)(x1))) -> c(c)(x1) f5(a)(a(c)(c(f5)(x1))) -> f5(c)(c(c)(c(f5)(x1))) f5(a)(a(c)(c(a)(x1))) -> f5(c)(c(c)(c(a)(x1))) f5(a)(a(c)(c(b)(x1))) -> f5(c)(c(c)(c(b)(x1))) f5(a)(a(c)(c(c)(x1))) -> f5(c)(c(c)(c(c)(x1))) a(a)(a(c)(c(f5)(x1))) -> a(c)(c(c)(c(f5)(x1))) a(a)(a(c)(c(a)(x1))) -> a(c)(c(c)(c(a)(x1))) a(a)(a(c)(c(b)(x1))) -> a(c)(c(c)(c(b)(x1))) a(a)(a(c)(c(c)(x1))) -> a(c)(c(c)(c(c)(x1))) b(a)(a(c)(c(f5)(x1))) -> b(c)(c(c)(c(f5)(x1))) b(a)(a(c)(c(a)(x1))) -> b(c)(c(c)(c(a)(x1))) b(a)(a(c)(c(b)(x1))) -> b(c)(c(c)(c(b)(x1))) b(a)(a(c)(c(c)(x1))) -> b(c)(c(c)(c(c)(x1))) c(a)(a(c)(c(f5)(x1))) -> c(c)(c(c)(c(f5)(x1))) c(a)(a(c)(c(a)(x1))) -> c(c)(c(c)(c(a)(x1))) c(a)(a(c)(c(b)(x1))) -> c(c)(c(c)(c(b)(x1))) c(a)(a(c)(c(c)(x1))) -> c(c)(c(c)(c(c)(x1))) f5(b)(b(c)(c(f5)(x1))) -> f5(a)(a(b)(b(a)(a(b)(b(f5)(x1))))) f5(b)(b(c)(c(a)(x1))) -> f5(a)(a(b)(b(a)(a(b)(b(a)(x1))))) f5(b)(b(c)(c(b)(x1))) -> f5(a)(a(b)(b(a)(a(b)(b(b)(x1))))) popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard