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SRS Standard pair #487511874
details
property
value
status
complete
benchmark
size-12-alpha-3-num-100.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n076.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
0.961230993271 seconds
cpu usage
2.3505842
max memory
5.1740672E8
stage attributes
key
value
output-size
1157
starexec-result
NO
output
/export/starexec/sandbox2/solver/bin/starexec_run_default /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 4-rule system { 0 -> , 0 0 0 -> 1 , 1 2 -> 2 0 2 1 , 2 -> } The system was reversed. After renaming modulo { 0->0, 1->1, 2->2 }, it remains to prove termination of the 4-rule system { 0 -> , 0 0 0 -> 1 , 2 1 -> 1 2 0 2 , 2 -> } Loop of length 12 starting with a string of length 5 using right expansion and the encoding { 0->a, 1->b, ... }: .cb.bba rule cb-> bcac at position 0 .bcac.bba rule a-> at position 2 .bcc.bba rule cb-> bcac at position 2 .bcbcac.ba rule a-> at position 4 .bcbcc.ba rule cb-> bcac at position 4 .bcbcbcac.a rule cb-> bcac at position 3 .bcbbcaccac.a rule c-> at position 6 .bcbbcacac.a rule c-> at position 6 .bcbbcaac.a rule c-> at position 7 .bcbbcaa.a rule aaa-> b at position 5 .bcbbcb. rule cb-> bcac at position 4 .bcbbbcac. rule c-> at position 5 .bcbbbac.
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