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SRS Standard pair #487512588
details
property
value
status
complete
benchmark
size-12-alpha-3-num-356.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n092.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
4.82187414169 seconds
cpu usage
17.033407508
max memory
4.240228352E9
stage attributes
key
value
output-size
1371
starexec-result
NO
output
/export/starexec/sandbox2/solver/bin/starexec_run_default /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 2-rule system { 0 -> 1 , 0 1 0 2 -> 2 2 0 0 0 0 } Loop of length 16 starting with a string of length 11 using right expansion and the encoding { 0->a, 1->b, ... }: .abac.baccacc rule abac-> ccaaaa at position 0 .ccaaaa.baccacc rule a-> b at position 3 .ccabaa.baccacc rule abac-> ccaaaa at position 5 .ccabaccaaaa.cacc rule abac-> ccaaaa at position 2 .ccccaaaacaaaa.cacc rule a-> b at position 6 .ccccaabacaaaa.cacc rule abac-> ccaaaa at position 5 .ccccaccaaaaaaaa.cacc rule a-> b at position 10 .ccccaccaaabaaaa.cacc rule a-> b at position 13 .ccccaccaaabaaba.cacc rule abac-> ccaaaa at position 12 .ccccaccaaabaccaaaa.acc rule abac-> ccaaaa at position 9 .ccccaccaaccaaaacaaaa.acc rule a-> b at position 13 .ccccaccaaccaabacaaaa.acc rule a-> b at position 16 .ccccaccaaccaabacbaaa.acc rule a-> b at position 19 .ccccaccaaccaabacbaab.acc rule abac-> ccaaaa at position 18 .ccccaccaaccaabacbaccaaaa.c rule a-> b at position 22 .ccccaccaaccaabacbaccaaba.c rule abac-> ccaaaa at position 21 .ccccaccaaccaabacbaccaccaaaa.
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