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SRS Standard pair #487513320
details
property
value
status
complete
benchmark
size-12-alpha-3-num-564.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n074.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
1.0298500061 seconds
cpu usage
2.705403208
max memory
5.7780224E8
stage attributes
key
value
output-size
1496
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 3-rule system { 0 1 -> , 0 2 -> 2 2 1 1 , 1 2 -> 0 0 } Loop of length 21 starting with a string of length 8 using right expansion and the encoding { 0->a, 1->b, ... }: .ac.cccbbc rule ac-> ccbb at position 0 .ccbb.cccbbc rule bc-> aa at position 3 .ccbaa.ccbbc rule ac-> ccbb at position 4 .ccbaccbb.cbbc rule ac-> ccbb at position 3 .ccbccbbcbb.cbbc rule bc-> aa at position 2 .ccaacbbcbb.cbbc rule ac-> ccbb at position 3 .ccaccbbbbcbb.cbbc rule bc-> aa at position 8 .ccaccbbbaabb.cbbc rule ab-> at position 9 .ccaccbbbab.cbbc rule bc-> aa at position 9 .ccaccbbbaaa.bbc rule ab-> at position 10 .ccaccbbbaa.bc rule ab-> at position 9 .ccaccbbba.c rule ac-> ccbb at position 8 .ccaccbbbccbb. rule bc-> aa at position 7 .ccaccbbaacbb. rule ac-> ccbb at position 8 .ccaccbbaccbbbb. rule ac-> ccbb at position 7 .ccaccbbccbbcbbbb. rule bc-> aa at position 6 .ccaccbaacbbcbbbb. rule ac-> ccbb at position 7 .ccaccbaccbbbbcbbbb. rule ac-> ccbb at position 6 .ccaccbccbbcbbbbcbbbb. rule bc-> aa at position 5 .ccaccaacbbcbbbbcbbbb. rule ac-> ccbb at position 6 .ccaccaccbbbbcbbbbcbbbb. rule ac-> ccbb at position 5 .ccaccccbbcbbbbcbbbbcbbbb.
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