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SRS Standard pair #487513470
details
property
value
status
complete
benchmark
size-12-alpha-3-num-239.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n094.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
0.717928171158 seconds
cpu usage
1.593731054
max memory
4.15461376E8
stage attributes
key
value
output-size
989
starexec-result
NO
output
/export/starexec/sandbox2/solver/bin/starexec_run_default /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 4-rule system { 0 -> , 0 1 -> 1 2 0 0 , 1 -> 0 , 2 2 -> 1 } Loop of length 12 starting with a string of length 4 using right expansion and the encoding { 0->a, 1->b, ... }: .ab.bb rule ab-> bcaa at position 0 .bcaa.bb rule ab-> bcaa at position 3 .bcabcaa.b rule ab-> bcaa at position 2 .bcbcaacaa.b rule b-> a at position 2 .bcacaacaa.b rule a-> at position 4 .bcacacaa.b rule a-> at position 4 .bcaccaa.b rule cc-> b at position 3 .bcabaa.b rule ab-> bcaa at position 5 .bcababcaa. rule ab-> bcaa at position 4 .bcabbcaacaa. rule a-> at position 6 .bcabbcacaa. rule a-> at position 6 .bcabbccaa. rule cc-> b at position 5 .bcabbbaa.
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