details

property	value
status	complete
benchmark	213147.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n178.star.cs.uiowa.edu
space	ICFP_2010

run statistics

property	value
solver	MultumNonMulta 3.16 29 June 2020 60G
configuration	default
runtime (wallclock)	3.05261087418 seconds
cpu usage	10.867430293
max memory	2.235973632E9

stage attributes

key	value
output-size	118301
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES After renaming modulo { 0->0, 1->1, 2->2, 3->3, 4->4, 5->5 }, it remains to prove termination of the 50-rule system { 0 1 0 2 -> 0 0 1 3 2 , 0 1 2 2 -> 0 3 2 2 1 , 0 2 1 1 -> 0 1 1 1 3 2 , 0 2 3 2 -> 0 3 0 3 2 2 , 0 2 4 4 -> 3 0 4 2 4 , 0 4 0 2 -> 3 0 0 4 2 , 0 4 0 2 -> 3 0 0 0 4 2 , 0 4 5 1 -> 0 0 0 4 1 5 , 0 5 1 1 -> 0 1 1 3 5 , 0 5 1 1 -> 0 1 3 1 5 , 0 5 1 4 -> 0 3 3 4 1 5 , 0 5 3 2 -> 0 3 0 5 5 2 , 0 5 3 2 -> 3 0 3 5 5 2 , 0 5 4 1 -> 0 3 1 5 4 , 0 5 4 1 -> 0 0 4 1 1 5 , 0 5 4 4 -> 4 0 4 3 5 , 2 0 2 4 -> 2 2 4 0 0 , 2 0 5 1 -> 0 0 0 5 2 1 , 2 0 5 1 -> 5 0 3 5 2 1 , 2 0 5 1 -> 5 3 0 5 2 1 , 2 0 5 4 -> 2 4 0 3 5 , 5 1 0 2 -> 2 5 0 3 1 , 5 3 2 4 -> 2 3 4 3 5 , 5 4 0 2 -> 5 0 3 0 4 2 , 0 0 2 1 1 -> 0 3 0 1 2 1 , 0 1 5 1 4 -> 0 4 3 1 1 5 , 0 1 5 4 1 -> 4 0 1 1 3 5 , 0 2 0 2 4 -> 0 0 2 1 2 4 , 0 2 0 5 1 -> 5 0 0 0 2 1 , 0 2 1 3 2 -> 3 0 3 1 2 2 , 0 2 1 5 1 -> 0 5 2 1 1 0 , 0 2 3 5 1 -> 5 2 1 0 0 3 , 0 4 0 4 2 -> 3 0 0 4 4 2 , 0 5 0 2 4 -> 0 4 0 5 2 4 , 0 5 1 3 2 -> 0 3 4 1 5 2 , 0 5 4 3 2 -> 0 0 3 4 2 5 , 0 5 5 4 2 -> 4 0 3 5 5 2 , 2 0 1 2 4 -> 2 2 1 3 4 0 , 2 0 5 1 1 -> 5 0 2 3 1 1 , 2 5 5 1 1 -> 5 5 2 1 1 3 , 3 4 2 1 1 -> 3 4 3 1 1 2 , 3 5 0 2 1 -> 1 2 5 0 3 3 , 4 1 2 1 1 -> 3 4 1 1 2 1 , 4 1 2 4 1 -> 4 3 4 1 1 2 , 4 3 5 1 1 -> 3 4 1 1 1 5 , 5 0 1 5 1 -> 5 0 3 1 1 5 , 5 0 5 0 2 -> 2 0 0 0 5 5 , 5 1 4 5 1 -> 5 0 1 1 5 4 , 5 1 4 5 1 -> 5 3 4 1 1 5 , 5 3 1 5 4 -> 5 3 4 1 3 5 } Applying sparse tiling TRFC(2) [Geser/Hofbauer/Waldmann, FSCD 2019]. After renaming modulo { (0,0)->0, (0,1)->1, (1,0)->2, (0,2)->3, (2,0)->4, (1,3)->5, (3,2)->6, (2,1)->7, (2,2)->8, (2,3)->9, (2,4)->10, (2,5)->11, (2,7)->12, (3,0)->13, (4,0)->14, (5,0)->15, (6,0)->16, (1,2)->17, (0,3)->18, (1,1)->19, (1,4)->20, (1,5)->21, (1,7)->22, (4,4)->23, (0,4)->24, (4,2)->25, (4,1)->26, (4,3)->27, (4,5)->28, (4,7)->29, (3,3)->30, (5,3)->31, (6,3)->32, (5,1)->33, (5,2)->34, (5,4)->35, (5,5)->36, (5,7)->37, (0,5)->38, (3,5)->39, (3,1)->40, (3,4)->41, (6,4)->42, (0,7)->43, (6,2)->44, (6,5)->45, (3,7)->46, (6,1)->47 }, it remains to prove termination of the 2450-rule system { 0 1 2 3 4 -> 0 0 1 5 6 4 , 0 1 2 3 7 -> 0 0 1 5 6 7 , 0 1 2 3 8 -> 0 0 1 5 6 8 , 0 1 2 3 9 -> 0 0 1 5 6 9 , 0 1 2 3 10 -> 0 0 1 5 6 10 , 0 1 2 3 11 -> 0 0 1 5 6 11 , 0 1 2 3 12 -> 0 0 1 5 6 12 , 2 1 2 3 4 -> 2 0 1 5 6 4 , 2 1 2 3 7 -> 2 0 1 5 6 7 , 2 1 2 3 8 -> 2 0 1 5 6 8 , 2 1 2 3 9 -> 2 0 1 5 6 9 , 2 1 2 3 10 -> 2 0 1 5 6 10 , 2 1 2 3 11 -> 2 0 1 5 6 11 , 2 1 2 3 12 -> 2 0 1 5 6 12 , 4 1 2 3 4 -> 4 0 1 5 6 4 , 4 1 2 3 7 -> 4 0 1 5 6 7 , 4 1 2 3 8 -> 4 0 1 5 6 8 , 4 1 2 3 9 -> 4 0 1 5 6 9 , 4 1 2 3 10 -> 4 0 1 5 6 10 , 4 1 2 3 11 -> 4 0 1 5 6 11 , 4 1 2 3 12 -> 4 0 1 5 6 12 , 13 1 2 3 4 -> 13 0 1 5 6 4 , 13 1 2 3 7 -> 13 0 1 5 6 7 , 13 1 2 3 8 -> 13 0 1 5 6 8 , 13 1 2 3 9 -> 13 0 1 5 6 9 , 13 1 2 3 10 -> 13 0 1 5 6 10 , 13 1 2 3 11 -> 13 0 1 5 6 11 , 13 1 2 3 12 -> 13 0 1 5 6 12 , 14 1 2 3 4 -> 14 0 1 5 6 4 , 14 1 2 3 7 -> 14 0 1 5 6 7 , 14 1 2 3 8 -> 14 0 1 5 6 8 , 14 1 2 3 9 -> 14 0 1 5 6 9 , 14 1 2 3 10 -> 14 0 1 5 6 10 , 14 1 2 3 11 -> 14 0 1 5 6 11 , popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard