details

property	value
status	complete
benchmark	95952.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n134.star.cs.uiowa.edu
space	ICFP_2010

run statistics

property	value
solver	MultumNonMulta 3.16 29 June 2020 60G
configuration	default
runtime (wallclock)	22.1449518204 seconds
cpu usage	86.306769644
max memory	5.020983296E9

stage attributes

key	value
output-size	283652
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_default /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES After renaming modulo { 0->0, 1->1, 2->2, 3->3, 4->4, 5->5 }, it remains to prove termination of the 30-rule system { 0 0 1 0 2 3 -> 2 2 2 4 2 3 , 2 2 0 0 3 0 3 -> 2 2 4 4 5 4 2 , 0 4 3 0 4 3 2 0 2 4 -> 0 5 3 1 0 1 3 4 4 , 1 0 1 1 1 5 4 3 2 1 -> 2 4 2 1 5 1 5 4 2 1 , 1 5 5 4 3 0 3 2 2 0 -> 2 0 5 0 5 2 2 0 2 0 , 2 1 4 4 1 3 0 0 1 2 -> 4 1 2 5 2 2 3 4 5 1 , 2 2 2 5 5 4 0 4 1 5 -> 2 5 3 4 2 2 4 2 5 , 4 4 5 1 3 0 5 0 5 2 5 -> 0 0 0 0 1 0 3 0 0 5 , 0 0 2 2 2 3 5 0 5 3 2 3 -> 3 2 3 1 5 3 5 3 5 5 2 , 1 5 0 5 5 0 2 0 4 5 3 3 -> 1 5 2 2 5 2 1 5 4 3 1 3 , 3 1 2 3 1 3 5 5 2 5 1 2 2 -> 3 5 4 4 1 1 3 1 4 0 3 3 , 3 2 0 5 4 4 4 3 0 0 3 2 2 -> 0 5 3 2 2 2 5 4 0 4 1 5 , 4 5 2 0 2 4 3 2 2 5 5 4 0 3 2 -> 4 5 2 0 1 2 2 3 4 5 5 5 5 5 , 3 0 0 5 5 0 1 0 5 3 0 2 1 2 1 3 -> 3 5 5 0 5 2 4 2 1 1 5 2 4 5 4 1 5 , 3 1 0 1 4 3 4 3 4 0 2 5 4 1 2 5 -> 3 0 0 5 0 1 0 5 5 1 4 1 2 2 5 , 3 5 4 0 4 2 1 1 0 4 4 3 2 1 2 3 -> 3 2 0 0 1 1 2 3 5 1 5 3 2 2 2 , 5 1 0 5 2 3 5 3 2 5 3 4 4 4 4 0 4 -> 5 3 1 5 2 0 4 0 2 1 1 2 0 0 3 2 4 , 2 1 1 2 4 5 5 1 0 5 0 2 0 2 4 3 0 2 -> 2 3 3 5 5 0 0 2 1 0 5 0 3 5 2 3 1 , 2 3 2 0 2 5 4 4 4 3 4 4 5 5 5 3 2 0 -> 2 1 5 1 2 4 4 2 4 0 1 3 3 1 4 4 0 3 , 5 3 4 0 3 3 1 4 4 0 3 2 5 3 1 0 0 3 -> 5 3 3 0 4 3 4 4 0 2 4 2 1 5 3 5 1 4 , 1 1 0 0 3 3 4 0 5 1 3 3 0 2 2 3 0 1 2 -> 1 1 0 3 2 4 3 4 0 3 3 4 4 0 0 2 3 3 4 , 3 1 3 0 0 2 3 2 3 0 3 3 2 5 2 3 0 4 0 -> 3 4 1 4 4 5 3 5 0 1 4 4 4 3 0 4 0 0 0 , 4 3 0 1 0 2 1 4 0 2 1 2 3 0 3 3 0 1 3 -> 3 4 2 5 1 0 0 3 0 3 5 0 0 0 4 4 4 5 4 , 4 5 5 5 0 5 4 5 5 2 0 4 0 3 5 0 4 4 0 -> 1 1 5 3 0 2 3 4 0 3 5 1 2 2 4 0 0 2 2 , 0 2 1 4 5 0 2 4 3 1 3 1 2 5 3 0 4 0 2 2 -> 0 0 2 5 1 0 0 4 2 2 2 4 2 1 3 2 4 3 1 3 , 1 2 3 3 5 1 0 2 3 4 5 4 1 5 4 2 5 0 2 4 -> 1 2 4 5 1 4 5 1 4 3 5 1 4 3 4 3 1 4 1 4 , 1 5 0 0 3 3 5 1 1 0 0 2 5 4 4 5 1 1 5 4 -> 1 1 2 1 3 2 4 1 1 5 0 1 3 5 4 5 1 5 4 , 1 5 1 4 3 2 3 1 5 5 4 2 5 5 5 2 1 3 5 2 2 -> 1 0 5 2 2 0 0 5 0 2 4 3 2 5 3 1 0 3 5 2 5 , 4 4 4 0 0 2 1 2 1 5 5 2 5 0 4 0 0 1 0 4 0 -> 0 0 1 4 3 3 5 1 5 5 3 5 1 4 0 5 5 5 3 , 5 5 3 3 1 4 1 2 2 3 1 0 0 2 5 5 5 5 5 3 0 -> 5 5 0 2 3 5 5 3 3 4 3 1 3 3 3 2 0 0 0 3 5 } The system was reversed. After renaming modulo { 3->0, 2->1, 0->2, 1->3, 4->4, 5->5 }, it remains to prove termination of the 30-rule system { 0 1 2 3 2 2 -> 0 1 4 1 1 1 , 0 2 0 2 2 1 1 -> 1 4 5 4 4 1 1 , 4 1 2 1 0 4 2 0 4 2 -> 4 4 0 3 2 3 0 5 2 , 3 1 0 4 5 3 3 3 2 3 -> 3 1 4 5 3 5 3 1 4 1 , 2 1 1 0 2 0 4 5 5 3 -> 2 1 2 1 1 5 2 5 2 1 , 1 3 2 2 0 3 4 4 3 1 -> 3 5 4 0 1 1 5 1 3 4 , 5 3 4 2 4 5 5 1 1 1 -> 5 1 4 1 1 4 0 5 1 , 5 1 5 2 5 2 0 3 5 4 4 -> 5 2 2 0 2 3 2 2 2 2 , 0 1 0 5 2 5 0 1 1 1 2 2 -> 1 5 5 0 5 0 5 3 0 1 0 , 0 0 5 4 2 1 2 5 5 2 5 3 -> 0 3 0 4 5 3 1 5 1 1 5 3 , 1 1 3 5 1 5 5 0 3 0 1 3 0 -> 0 0 2 4 3 0 3 3 4 4 5 0 , 1 1 0 2 2 0 4 4 4 5 2 1 0 -> 5 3 4 2 4 5 1 1 1 0 5 2 , 1 0 2 4 5 5 1 1 0 4 1 2 1 5 4 -> 5 5 5 5 5 4 0 1 1 3 2 1 5 4 , 0 3 1 3 1 2 0 5 2 3 2 5 5 2 2 0 -> 5 3 4 5 4 1 5 3 3 1 4 1 5 2 5 5 0 , 5 1 3 4 5 1 2 4 0 4 0 4 3 2 3 0 -> 5 1 1 3 4 3 5 5 2 3 2 5 2 2 0 , 0 1 3 1 0 4 4 2 3 3 1 4 2 4 5 0 -> 1 1 1 0 5 3 5 0 1 3 3 2 2 1 0 , 4 2 4 4 4 4 0 5 1 0 5 0 1 5 2 3 5 -> 4 1 0 2 2 1 3 3 1 2 4 2 1 5 3 0 5 , 1 2 0 4 1 2 1 2 5 2 3 5 5 4 1 3 3 1 -> 3 0 1 5 0 2 5 2 3 1 2 2 5 5 0 0 1 , 2 1 0 5 5 5 4 4 0 4 4 4 5 1 2 1 0 1 -> 0 2 4 4 3 0 0 3 2 4 1 4 4 1 3 5 3 1 , 0 2 2 3 0 5 1 0 2 4 4 3 0 0 2 4 0 5 -> 4 3 5 0 5 3 1 4 1 2 4 4 0 4 2 0 0 5 , 1 3 2 0 1 1 2 0 0 3 5 2 4 0 0 2 2 3 3 -> 4 0 0 1 2 2 4 4 0 0 2 4 0 4 1 0 2 3 3 , 2 4 2 0 1 5 1 0 0 2 0 1 0 1 2 2 0 3 0 -> 2 2 2 4 2 0 4 4 4 3 2 5 0 5 4 4 3 4 0 , 0 3 2 0 0 2 0 1 3 1 2 4 3 1 2 3 2 0 4 -> 4 5 4 4 4 2 2 2 5 0 2 0 2 2 3 5 1 4 0 , 2 4 4 2 5 0 2 4 2 1 5 5 4 5 2 5 5 5 4 -> 1 1 2 2 4 1 1 3 5 0 2 4 0 1 2 0 5 3 3 , 1 1 2 4 2 0 5 1 3 0 3 0 4 1 2 5 4 3 1 2 -> 0 3 0 4 1 0 3 1 4 1 1 1 4 2 2 3 5 1 2 2 , 4 1 2 5 1 4 5 3 4 5 4 0 1 2 3 5 0 0 1 3 -> 4 3 4 3 0 4 0 4 3 5 0 4 3 5 4 3 5 4 1 3 , 4 5 3 3 5 4 4 5 1 2 2 3 3 5 0 0 2 2 5 3 -> 4 5 3 5 4 5 0 3 2 5 3 3 4 1 0 3 1 3 3 , 1 1 5 0 3 1 5 5 5 1 4 5 5 3 0 1 0 4 3 5 3 -> 5 1 5 0 2 3 0 5 1 0 4 1 2 5 2 2 1 1 5 2 3 , 2 4 2 3 2 2 4 2 5 1 5 5 3 1 3 1 2 2 4 4 4 -> 0 5 5 5 2 4 3 5 0 5 5 3 5 0 0 4 3 2 2 , 2 0 5 5 5 5 5 1 2 2 3 0 1 1 3 4 3 0 0 5 5 -> 5 0 2 2 2 1 0 0 0 3 0 4 0 0 5 5 0 1 2 5 5 } Applying sparse tiling TRFC(2) [Geser/Hofbauer/Waldmann, FSCD 2019]. After renaming modulo { (0,0)->0, (0,1)->1, (1,2)->2, (2,3)->3, (3,2)->4, (2,2)->5, (2,0)->6, (1,4)->7, (4,1)->8, (1,1)->9, (1,0)->10, (2,1)->11, (1,3)->12, (2,4)->13, (2,5)->14, (1,5)->15, (2,7)->16, (1,7)->17, (3,0)->18, (4,0)->19, (5,0)->20, (6,0)->21, (0,2)->22, (4,5)->23, (5,4)->24, (4,4)->25, (3,1)->26, (5,1)->27, (6,1)->28, (0,4)->29, (4,2)->30, (0,3)->31, (0,5)->32, (5,2)->33, (3,4)->34, (6,4)->35, (5,3)->36, (3,3)->37, (3,5)->38, (3,7)->39, (4,3)->40, (6,3)->41, (5,5)->42, (6,2)->43, (4,7)->44, (6,5)->45, (0,7)->46, (5,7)->47 }, it remains to prove termination of the 1470-rule system { 0 1 2 3 4 5 6 -> 0 1 7 8 9 9 10 , 0 1 2 3 4 5 11 -> 0 1 7 8 9 9 9 , 0 1 2 3 4 5 5 -> 0 1 7 8 9 9 2 , 0 1 2 3 4 5 3 -> 0 1 7 8 9 9 12 , 0 1 2 3 4 5 13 -> 0 1 7 8 9 9 7 , 0 1 2 3 4 5 14 -> 0 1 7 8 9 9 15 , 0 1 2 3 4 5 16 -> 0 1 7 8 9 9 17 , 10 1 2 3 4 5 6 -> 10 1 7 8 9 9 10 , 10 1 2 3 4 5 11 -> 10 1 7 8 9 9 9 , 10 1 2 3 4 5 5 -> 10 1 7 8 9 9 2 , 10 1 2 3 4 5 3 -> 10 1 7 8 9 9 12 , 10 1 2 3 4 5 13 -> 10 1 7 8 9 9 7 , 10 1 2 3 4 5 14 -> 10 1 7 8 9 9 15 , 10 1 2 3 4 5 16 -> 10 1 7 8 9 9 17 , 6 1 2 3 4 5 6 -> 6 1 7 8 9 9 10 , 6 1 2 3 4 5 11 -> 6 1 7 8 9 9 9 , 6 1 2 3 4 5 5 -> 6 1 7 8 9 9 2 , 6 1 2 3 4 5 3 -> 6 1 7 8 9 9 12 , popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard