details

property	value
status	complete
benchmark	18.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n004.star.cs.uiowa.edu
space	Gebhardt_06

run statistics

property	value
solver	matchbox-2020-06-25
configuration	tc20-std.sh
runtime (wallclock)	5.27845716476 seconds
cpu usage	20.755011632
max memory	8.31008768E8

stage attributes

key	value
output-size	5396
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 2 rules on 2 letters DP SRS with 8 strict rules and 2 weak rules on 4 letters weights SRS with 2 strict rules and 2 weak rules on 4 letters EDG SRS with 2 strict rules and 2 weak rules on 4 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 4, dim = 5, solver = Minisatapi, verbose = False, tracing = False} SRS with 1 strict rules and 2 weak rules on 4 letters weights SRS with 0 strict rules and 2 weak rules on 2 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [0, 0, 0, 0] -> [1, 0, 1, 1] {- Input 0 -} [1, 0, 0, 1] -> [0, 0, 0, 0] {- Input 1 -} reason DP property Termination has value Just True for SRS [0, 0, 0, 0] ->= [1, 0, 1, 1] {- DP Nontop (Input 0) -} [1, 0, 0, 1] ->= [0, 0, 0, 0] {- DP Nontop (Input 1) -} [0#, 0, 0, 0] |-> [0#, 1, 1] {- DP (Top 1) (Input 0) -} [0#, 0, 0, 0] |-> [1#] {- DP (Top 3) (Input 0) -} [0#, 0, 0, 0] |-> [1#, 0, 1, 1] {- DP (Top 0) (Input 0) -} [0#, 0, 0, 0] |-> [1#, 1] {- DP (Top 2) (Input 0) -} [1#, 0, 0, 1] |-> [0#] {- DP (Top 3) (Input 1) -} [1#, 0, 0, 1] |-> [0#, 0] {- DP (Top 2) (Input 1) -} [1#, 0, 0, 1] |-> [0#, 0, 0] {- DP (Top 1) (Input 1) -} [1#, 0, 0, 1] |-> [0#, 0, 0, 0] {- DP (Top 0) (Input 1) -} reason (0, 1/12) (1, 1/12) property Termination has value Just True for SRS [0, 0, 0, 0] ->= [1, 0, 1, 1] {- DP Nontop (Input 0) -} [1, 0, 0, 1] ->= [0, 0, 0, 0] {- DP Nontop (Input 1) -} [0#, 0, 0, 0] |-> [1#, 0, 1, 1] {- DP (Top 0) (Input 0) -} [1#, 0, 0, 1] |-> [0#, 0, 0, 0] {- DP (Top 0) (Input 1) -} reason EDG property Termination has value Just True for SRS [0#, 0, 0, 0] |-> [1#, 0, 1, 1] {- DP (Top 0) (Input 0) -} [1#, 0, 0, 1] |-> [0#, 0, 0, 0] {- DP (Top 0) (Input 1) -} [0, 0, 0, 0] ->= [1, 0, 1, 1] {- DP Nontop (Input 0) -} [1, 0, 0, 1] ->= [0, 0, 0, 0] {- DP Nontop (Input 1) -} reason ( 0 , Wk / 15A 15A 15A 15A 20A \ | 15A 15A 15A 15A 15A | | 10A 15A 15A 15A 15A | | 10A 10A 15A 15A 15A | \ 10A 10A 10A 15A 15A / ) ( 1 , Wk / 15A 15A 15A 20A 20A \ | 15A 15A 15A 20A 20A | | 10A 10A 15A 15A 15A | | 10A 10A 10A 15A 15A | \ 10A 10A 10A 15A 15A / ) ( 0# , Wk / 17A 21A 21A 21A 21A \ | 17A 21A 21A 21A 21A | | 17A 21A 21A 21A 21A | | 17A 21A 21A 21A 21A | \ 17A 21A 21A 21A 21A / ) ( 1# , Wk / 19A 19A 19A 21A 23A \ | 19A 19A 19A 21A 23A | | 19A 19A 19A 21A 23A | | 19A 19A 19A 21A 23A | \ 19A 19A 19A 21A 23A / ) property Termination has value Just True for SRS [1#, 0, 0, 1] |-> [0#, 0, 0, 0] {- DP (Top 0) (Input 1) -} [0, 0, 0, 0] ->= [1, 0, 1, 1] {- DP Nontop (Input 0) -} [1, 0, 0, 1] ->= [0, 0, 0, 0] {- DP Nontop (Input 1) -} reason (1#, 1/1) property Termination has value Just True for SRS [0, 0, 0, 0] ->= [1, 0, 1, 1] {- DP Nontop (Input 0) -} [1, 0, 0, 1] ->= [0, 0, 0, 0] {- DP Nontop (Input 1) -} reason EDG popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard