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SRS Standard pair #487519156
details
property
value
status
complete
benchmark
secr3.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n187.star.cs.uiowa.edu
space
Secret_06_SRS
run statistics
property
value
solver
matchbox-2020-06-25
configuration
tc20-std.sh
runtime (wallclock)
4.03790402412 seconds
cpu usage
15.720187504
max memory
3.58367232E8
stage attributes
key
value
output-size
18594
starexec-result
YES
output
/export/starexec/sandbox2/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 4 rules on 4 letters mirror SRS with 4 rules on 4 letters tile all, by Config { method = Forward,width = 2,unlabel = False} SRS with 60 rules on 18 letters weights SRS with 50 rules on 16 letters unlabel SRS with 3 rules on 3 letters mirror SRS with 3 rules on 3 letters DP SRS with 5 strict rules and 3 weak rules on 6 letters weights SRS with 3 strict rules and 3 weak rules on 6 letters EDG SRS with 3 strict rules and 3 weak rules on 6 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 4, dim = 3, solver = Minisatapi, verbose = False, tracing = False} SRS with 2 strict rules and 3 weak rules on 6 letters weights SRS with 0 strict rules and 3 weak rules on 3 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [a, b, a] -> [b, c] {- Input 0 -} [b, b, b] -> [c, b] {- Input 1 -} [c] -> [a, b] {- Input 2 -} [c, d] -> [d, c, b, a] {- Input 3 -} reason mirror property Termination has value Just True for SRS [a, b, a] -> [c, b] {- Mirror (Input 0) -} [b, b, b] -> [b, c] {- Mirror (Input 1) -} [c] -> [b, a] {- Mirror (Input 2) -} [d, c] -> [a, b, c, d] {- Mirror (Input 3) -} reason Tiling { method = Forward, width = 2, state_type = Bit64, map_type = Enum, unlabel = False, print_completion_steps = False, print_tiles = False, verbose = False, tracing = False} steps 2 using 19 tiles tile all rules steps: 2 property Termination has value Just True for SRS [[<, a], [a, b], [b, a], [a, >]] -> [ [<, c] , [c, b] , [ b , > ] ] {- Semlab 0 (Concon 0 (Mirror (Input 0))) -} [[<, a], [a, b], [b, a], [a, a]] -> [ [<, c] , [c, b] , [ b , a ] ] {- Semlab 0 (Concon 1 (Mirror (Input 0))) -} [[<, a], [a, b], [b, a], [a, b]] -> [ [<, c] , [c, b] , [ b , b ] ] {- Semlab 0 (Concon 2 (Mirror (Input 0))) -} [[<, a], [a, b], [b, a], [a, c]] -> [ [<, c] , [c, b] , [ b , c ] ] {- Semlab 0 (Concon 3 (Mirror (Input 0))) -} [[<, a], [a, b], [b, a], [a, d]] -> [ [<, c] , [c, b] , [ b , d ] ] {- Semlab 0 (Concon 4 (Mirror (Input 0))) -} [[a, a], [a, b], [b, a], [a, >]] -> [ [a, c] , [c, b] , [ b , > ] ] {- Semlab 1 (Concon 0 (Mirror (Input 0))) -} [[a, a], [a, b], [b, a], [a, a]] -> [ [a, c] , [c, b] , [ b , a ] ] {- Semlab 1 (Concon 1 (Mirror (Input 0))) -} [[a, a], [a, b], [b, a], [a, b]] -> [ [a, c] , [c, b] , [ b , b ] ] {- Semlab 1 (Concon 2 (Mirror (Input 0))) -} [[a, a], [a, b], [b, a], [a, c]] -> [ [a, c] , [c, b] , [ b , c ] ] {- Semlab 1 (Concon 3 (Mirror (Input 0))) -} [[a, a], [a, b], [b, a], [a, d]] -> [ [a, c] , [c, b] , [ b , d ] ] {- Semlab 1 (Concon 4 (Mirror (Input 0))) -} [[b, a], [a, b], [b, a], [a, >]] -> [ [b, c] , [c, b] , [ b , > ] ] {- Semlab 2 (Concon 0 (Mirror (Input 0))) -} [[b, a], [a, b], [b, a], [a, a]] -> [ [b, c] , [c, b] , [ b , a ] ] {- Semlab 2 (Concon 1 (Mirror (Input 0))) -} [[b, a], [a, b], [b, a], [a, b]] -> [ [b, c] , [c, b] , [ b , b ] ] {- Semlab 2 (Concon 2 (Mirror (Input 0))) -} [[b, a], [a, b], [b, a], [a, c]] -> [ [b, c] , [c, b] , [ b , c ] ] {- Semlab 2 (Concon 3 (Mirror (Input 0))) -} [[b, a], [a, b], [b, a], [a, d]] -> [ [b, c] , [c, b] , [ b , d ] ] {- Semlab 2 (Concon 4 (Mirror (Input 0))) -} [[c, a], [a, b], [b, a], [a, >]] -> [ [c, c] , [c, b] , [ b , > ] ] {- Semlab 3 (Concon 0 (Mirror (Input 0))) -} [[c, a], [a, b], [b, a], [a, a]] -> [ [c, c] , [c, b] , [ b , a ] ] {- Semlab 3 (Concon 1 (Mirror (Input 0))) -} [[c, a], [a, b], [b, a], [a, b]] -> [ [c, c] , [c, b] , [ b , b ] ] {- Semlab 3 (Concon 2 (Mirror (Input 0))) -} [[c, a], [a, b], [b, a], [a, c]] -> [ [c, c] , [c, b] , [ b , c ] ] {- Semlab 3 (Concon 3 (Mirror (Input 0))) -} [[c, a], [a, b], [b, a], [a, d]] -> [ [c, c] , [c, b] , [ b , d ] ] {- Semlab 3 (Concon 4 (Mirror (Input 0))) -} [[<, b], [b, b], [b, b], [b, >]] -> [ [<, b] , [b, c] , [ c , > ] ] {- Semlab 0 (Concon 0 (Mirror (Input 1))) -} [[<, b], [b, b], [b, b], [b, a]] -> [ [<, b] , [b, c] , [ c , a ] ] {- Semlab 0 (Concon 1 (Mirror (Input 1))) -} [[<, b], [b, b], [b, b], [b, b]] -> [ [<, b] , [b, c] , [ c , b ] ] {- Semlab 0 (Concon 2 (Mirror (Input 1))) -} [[<, b], [b, b], [b, b], [b, c]] -> [ [<, b] , [b, c] , [ c , c ] ] {- Semlab 0 (Concon 3 (Mirror (Input 1))) -} [[<, b], [b, b], [b, b], [b, d]] -> [ [<, b] , [b, c] , [ c , d ] ] {- Semlab 0 (Concon 4 (Mirror (Input 1))) -} [[a, b], [b, b], [b, b], [b, >]] -> [ [a, b] , [b, c] , [ c , > ] ] {- Semlab 1 (Concon 0 (Mirror (Input 1))) -} [[a, b], [b, b], [b, b], [b, a]] -> [ [a, b] , [b, c] , [ c , a ] ] {- Semlab 1 (Concon 1 (Mirror (Input 1))) -} [[a, b], [b, b], [b, b], [b, b]] -> [ [a, b] , [b, c] , [ c , b ] ] {- Semlab 1 (Concon 2 (Mirror (Input 1))) -} [[a, b], [b, b], [b, b], [b, c]] -> [ [a, b] , [b, c] , [ c , c ] ] {- Semlab 1 (Concon 3 (Mirror (Input 1))) -} [[a, b], [b, b], [b, b], [b, d]] -> [ [a, b] , [b, c] , [ c , d ] ] {- Semlab 1 (Concon 4 (Mirror (Input 1))) -} [[b, b], [b, b], [b, b], [b, >]] -> [ [b, b] , [b, c] , [ c , > ] ] {- Semlab 2 (Concon 0 (Mirror (Input 1))) -} [[b, b], [b, b], [b, b], [b, a]] -> [ [b, b] , [b, c] , [ c , a ] ] {- Semlab 2 (Concon 1 (Mirror (Input 1))) -} [[b, b], [b, b], [b, b], [b, b]] -> [ [b, b] , [b, c] , [ c , b ] ] {- Semlab 2 (Concon 2 (Mirror (Input 1))) -} [[b, b], [b, b], [b, b], [b, c]] -> [ [b, b] , [b, c] , [ c , c ] ] {- Semlab 2 (Concon 3 (Mirror (Input 1))) -} [[b, b], [b, b], [b, b], [b, d]] -> [ [b, b] , [b, c] , [ c , d ] ] {- Semlab 2 (Concon 4 (Mirror (Input 1))) -} [[c, b], [b, b], [b, b], [b, >]] -> [ [c, b] , [b, c] , [ c , > ] ] {- Semlab 3 (Concon 0 (Mirror (Input 1))) -} [[c, b], [b, b], [b, b], [b, a]] -> [ [c, b] , [b, c] , [ c , a ] ] {- Semlab 3 (Concon 1 (Mirror (Input 1))) -} [[c, b], [b, b], [b, b], [b, b]] -> [ [c, b] , [b, c] , [ c , b ] ] {- Semlab 3 (Concon 2 (Mirror (Input 1))) -} [[c, b], [b, b], [b, b], [b, c]] -> [ [c, b] , [b, c] , [ c , c ] ] {- Semlab 3 (Concon 3 (Mirror (Input 1))) -} [[c, b], [b, b], [b, b], [b, d]] -> [ [c, b] , [b, c] , [ c , d ] ] {- Semlab 3 (Concon 4 (Mirror (Input 1))) -} [[<, c], [c, >]] -> [ [<, b] , [b, a] , [a, >] ] {- Semlab 0 (Concon 0 (Mirror (Input 2))) -} [[<, c], [c, a]] -> [ [<, b] , [b, a] , [a, a] ] {- Semlab 0 (Concon 1 (Mirror (Input 2))) -} [[<, c], [c, b]] -> [ [<, b] , [b, a] , [a, b] ] {- Semlab 0 (Concon 2 (Mirror (Input 2))) -} [[<, c], [c, c]] -> [ [<, b] , [b, a] , [a, c] ] {- Semlab 0 (Concon 3 (Mirror (Input 2))) -} [[<, c], [c, d]] -> [ [<, b] , [b, a] , [a, d] ] {- Semlab 0 (Concon 4 (Mirror (Input 2))) -} [[a, c], [c, >]] -> [ [a, b] , [b, a] , [a, >] ] {- Semlab 1 (Concon 0 (Mirror (Input 2))) -} [[a, c], [c, a]] -> [ [a, b] , [b, a] , [a, a] ] {- Semlab 1 (Concon 1 (Mirror (Input 2))) -} [[a, c], [c, b]] -> [ [a, b] , [b, a] , [a, b] ] {- Semlab 1 (Concon 2 (Mirror (Input 2))) -} [[a, c], [c, c]] -> [ [a, b] , [b, a] , [a, c] ] {- Semlab 1 (Concon 3 (Mirror (Input 2))) -}
popout
output may be truncated. 'popout' for the full output.
job log
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return to SRS Standard