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SRS Standard pair #487519601
details
property
value
status
complete
benchmark
z014.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n114.star.cs.uiowa.edu
space
Zantema_04
run statistics
property
value
solver
AProVE
configuration
standard
runtime (wallclock)
1.72936797142 seconds
cpu usage
3.419537879
max memory
2.23117312E8
stage attributes
key
value
output-size
3099
starexec-result
YES
output
/export/starexec/sandbox2/solver/bin/starexec_run_standard /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.xml # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRS Reverse [EQUIVALENT, 0 ms] (2) QTRS (3) RFCMatchBoundsTRSProof [EQUIVALENT, 0 ms] (4) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: a(b(x1)) -> b(a(a(x1))) b(x1) -> c(a(c(x1))) a(a(x1)) -> a(c(a(x1))) Q is empty. ---------------------------------------- (1) QTRS Reverse (EQUIVALENT) We applied the QTRS Reverse Processor [REVERSE]. ---------------------------------------- (2) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: b(a(x1)) -> a(a(b(x1))) b(x1) -> c(a(c(x1))) a(a(x1)) -> a(c(a(x1))) Q is empty. ---------------------------------------- (3) RFCMatchBoundsTRSProof (EQUIVALENT) Termination of the TRS R could be shown with a Match Bound [MATCHBOUNDS1,MATCHBOUNDS2] of 3. This implies Q-termination of R. The following rules were used to construct the certificate: b(a(x1)) -> a(a(b(x1))) b(x1) -> c(a(c(x1))) a(a(x1)) -> a(c(a(x1))) The certificate found is represented by the following graph. The certificate consists of the following enumerated nodes: 2, 4, 5, 6, 7, 8, 9, 10, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36 Node 2 is start node and node 4 is final node. Those nodes are connected through the following edges: * 2 to 5 labelled a_1(0)* 2 to 7 labelled c_1(0)* 2 to 9 labelled a_1(0)* 2 to 19 labelled a_1(1)* 4 to 4 labelled #_1(0)* 5 to 6 labelled a_1(0)* 5 to 27 labelled a_1(1)* 6 to 4 labelled b_1(0)* 6 to 17 labelled c_1(1)* 6 to 21 labelled a_1(1)* 6 to 31 labelled a_1(2)* 7 to 8 labelled a_1(0)* 8 to 4 labelled c_1(0)* 9 to 10 labelled c_1(0)* 10 to 4 labelled a_1(0)* 10 to 23 labelled a_1(1)* 17 to 18 labelled a_1(1)* 18 to 4 labelled c_1(1)* 19 to 20 labelled c_1(1)* 20 to 6 labelled a_1(1)* 20 to 29 labelled a_1(2)* 20 to 27 labelled a_1(1)* 21 to 22 labelled a_1(1)* 21 to 29 labelled a_1(2)* 22 to 4 labelled b_1(1)* 22 to 25 labelled c_1(2)* 22 to 21 labelled a_1(1)* 22 to 31 labelled a_1(2)* 23 to 24 labelled c_1(1)* 24 to 4 labelled a_1(1)* 24 to 23 labelled a_1(1)* 25 to 26 labelled a_1(2)* 26 to 4 labelled c_1(2)* 27 to 28 labelled c_1(1)* 28 to 21 labelled a_1(1)* 28 to 31 labelled a_1(1), a_1(2)* 29 to 30 labelled c_1(2)* 30 to 21 labelled a_1(2)* 30 to 31 labelled a_1(2)* 30 to 33 labelled a_1(3)* 31 to 32 labelled c_1(2)* 32 to 22 labelled a_1(2)* 32 to 29 labelled a_1(2)* 32 to 35 labelled a_1(3)* 33 to 34 labelled c_1(3)* 34 to 29 labelled a_1(3)* 35 to 36 labelled c_1(3)* 36 to 31 labelled a_1(3) ---------------------------------------- (4) YES
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