details

property	value
status	complete
benchmark	z100.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n122.star.cs.uiowa.edu
space	Zantema_04

run statistics

property	value
solver	matchbox-2020-06-25
configuration	tc20-std.sh
runtime (wallclock)	101.135399818 seconds
cpu usage	401.324648169
max memory	3.6535296E9

stage attributes

key	value
output-size	12204
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_tc20-std.sh /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 9 rules on 6 letters DP SRS with 18 strict rules and 9 weak rules on 10 letters weights SRS with 4 strict rules and 9 weak rules on 9 letters EDG 3 sub-proofs 1 SRS with 1 strict rules and 9 weak rules on 7 letters Matrix { monotone = Weak, domain = Natural, shape = Full, bits = 5, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 0 strict rules and 9 weak rules on 6 letters EDG 2 SRS with 1 strict rules and 9 weak rules on 7 letters Matrix { monotone = Weak, domain = Natural, shape = Full, bits = 5, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 0 strict rules and 9 weak rules on 6 letters EDG 3 SRS with 2 strict rules and 9 weak rules on 7 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 4, dim = 3, solver = Minisatapi, verbose = False, tracing = False} SRS with 1 strict rules and 9 weak rules on 7 letters EDG SRS with 1 strict rules and 9 weak rules on 7 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 4, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 0 strict rules and 9 weak rules on 6 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [r1, a] -> [a, a, a, r1] {- Input 0 -} [r2, a] -> [a, a, a, r2] {- Input 1 -} [a, l1] -> [l1, a, a, a] {- Input 2 -} [a, a, l2] -> [l2, a, a] {- Input 3 -} [r1, b] -> [l1, b] {- Input 4 -} [r2, b] -> [l2, a, b] {- Input 5 -} [b, l1] -> [b, r2] {- Input 6 -} [b, l2] -> [b, r1] {- Input 7 -} [a, a] -> [] {- Input 8 -} reason DP property Termination has value Just True for SRS [r1, a] ->= [a, a, a, r1] {- DP Nontop (Input 0) -} [r2, a] ->= [a, a, a, r2] {- DP Nontop (Input 1) -} [a, l1] ->= [l1, a, a, a] {- DP Nontop (Input 2) -} [a, a, l2] ->= [l2, a, a] {- DP Nontop (Input 3) -} [r1, b] ->= [l1, b] {- DP Nontop (Input 4) -} [r2, b] ->= [l2, a, b] {- DP Nontop (Input 5) -} [b, l1] ->= [b, r2] {- DP Nontop (Input 6) -} [b, l2] ->= [b, r1] {- DP Nontop (Input 7) -} [a, a] ->= [] {- DP Nontop (Input 8) -} [r1#, a] |-> [r1#] {- DP (Top 3) (Input 0) -} [r1#, a] |-> [a#, r1] {- DP (Top 2) (Input 0) -} [r1#, a] |-> [a#, a, r1] {- DP (Top 1) (Input 0) -} [r1#, a] |-> [a#, a, a, r1] {- DP (Top 0) (Input 0) -} [a#, a, l2] |-> [a#] {- DP (Top 2) (Input 3) -} [a#, a, l2] |-> [a#, a] {- DP (Top 1) (Input 3) -} [a#, l1] |-> [a#] {- DP (Top 3) (Input 2) -} [a#, l1] |-> [a#, a] {- DP (Top 2) (Input 2) -} [a#, l1] |-> [a#, a, a] {- DP (Top 1) (Input 2) -} [r2#, a] |-> [a#, a, a, r2] {- DP (Top 0) (Input 1) -} [r2#, a] |-> [a#, a, r2] {- DP (Top 1) (Input 1) -} [r2#, a] |-> [a#, r2] {- DP (Top 2) (Input 1) -} [r2#, a] |-> [r2#] {- DP (Top 3) (Input 1) -} [r2#, b] |-> [a#, b] {- DP (Top 1) (Input 5) -} [b#, l1] |-> [r2#] {- DP (Top 1) (Input 6) -} [b#, l1] |-> [b#, r2] {- DP (Top 0) (Input 6) -} [b#, l2] |-> [r1#] {- DP (Top 1) (Input 7) -} [b#, l2] |-> [b#, r1] {- DP (Top 0) (Input 7) -} reason (r1, 1/5) (r2, 1/5) (l1, 1/5) (l2, 1/5) (r1#, 6/5) (r2#, 8/5) (b#, 12/5) property Termination has value Just True for SRS [r1, a] ->= [a, a, a, r1] {- DP Nontop (Input 0) -} [r2, a] ->= [a, a, a, r2] {- DP Nontop (Input 1) -} [a, l1] ->= [l1, a, a, a] {- DP Nontop (Input 2) -} [a, a, l2] ->= [l2, a, a] {- DP Nontop (Input 3) -} [r1, b] ->= [l1, b] {- DP Nontop (Input 4) -} [r2, b] ->= [l2, a, b] {- DP Nontop (Input 5) -} [b, l1] ->= [b, r2] {- DP Nontop (Input 6) -} [b, l2] ->= [b, r1] {- DP Nontop (Input 7) -} [a, a] ->= [] {- DP Nontop (Input 8) -} [r1#, a] |-> [r1#] {- DP (Top 3) (Input 0) -} [r2#, a] |-> [r2#] {- DP (Top 3) (Input 1) -} [b#, l1] |-> [b#, r2] {- DP (Top 0) (Input 6) -} [b#, l2] |-> [b#, r1] {- DP (Top 0) (Input 7) -} reason EDG property Termination has value Just True popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to SRS Standard