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SRS Standard pair #487520394
details
property
value
status
complete
benchmark
size-11-alpha-3-num-4.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n044.star.cs.uiowa.edu
space
Waldmann_07_size11
run statistics
property
value
solver
MultumNonMulta 3.16 29 June 2020 60G
configuration
default
runtime (wallclock)
13.6767930984 seconds
cpu usage
52.73639527
max memory
6.419030016E9
stage attributes
key
value
output-size
1531
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo { a->0, b->1, c->2 }, it remains to prove termination of the 3-rule system { 0 -> , 0 1 2 -> 1 2 1 0 , 1 -> 2 0 } The system was reversed. After renaming modulo { 0->0, 2->1, 1->2 }, it remains to prove termination of the 3-rule system { 0 -> , 1 2 0 -> 0 2 1 2 , 2 -> 0 1 } Loop of length 19 starting with a string of length 8 using right expansion and the encoding { 0->a, 1->b, ... }: .bca.aacaa rule bca-> acbc at position 0 .acbc.aacaa rule c-> ab at position 1 .aabbc.aacaa rule bca-> acbc at position 3 .aabacbc.acaa rule a-> at position 3 .aabcbc.acaa rule bca-> acbc at position 4 .aabcacbc.caa rule c-> ab at position 5 .aabcaabbc.caa rule c-> ab at position 8 .aabcaabbab.caa rule a-> at position 8 .aabcaabbb.caa rule bca-> acbc at position 8 .aabcaabbacbc.a rule a-> at position 8 .aabcaabbcbc.a rule bca-> acbc at position 9 .aabcaabbcacbc. rule bca-> acbc at position 7 .aabcaabacbccbc. rule a-> at position 7 .aabcaabcbccbc. rule c-> ab at position 10 .aabcaabcbcabbc. rule bca-> acbc at position 8 .aabcaabcacbcbbc. rule bca-> acbc at position 6 .aabcaaacbccbcbbc. rule c-> ab at position 10 .aabcaaacbcabbcbbc. rule bca-> acbc at position 8 .aabcaaacacbcbbcbbc. rule c-> ab at position 9 .aabcaaacaabbcbbcbbc.
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