details

property	value
status	complete
benchmark	random-151.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n100.star.cs.uiowa.edu
space	Waldmann_19

run statistics

property	value
solver	matchbox-2020-06-25
configuration	tc20-rel.sh
runtime (wallclock)	5.43967294693 seconds
cpu usage	21.041489662
max memory	8.29493248E8

stage attributes

key	value
output-size	34896
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_tc20-rel.sh /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 6 strict rules and 1 weak rules on 3 letters weights SRS with 3 rules on 3 letters mirror SRS with 3 rules on 3 letters Matrix { monotone = Strict, domain = Natural, shape = Full, bits = 3, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 2 rules on 2 letters tile all, by Config { method = Overlap,width = 3,unlabel = True} SRS with 77 rules on 17 letters weights SRS with 36 rules on 12 letters remove some, by Config { method = Overlap,width = 2,unlabel = True} SRS with 30 rules on 12 letters weights SRS with 27 rules on 10 letters Matrix { monotone = Strict, domain = Natural, shape = Full, bits = 3, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 3 rules on 8 letters weights SRS with 0 rules on 0 letters no strict rules ************************************************** proof ************************************************** property Termination has value Just True for SRS [c, b, a] -> [c, b, b] {- Input 0 -} [b, a, c] -> [b, b, c] {- Input 1 -} [c, c, c] -> [b, c, c] {- Input 2 -} [a, c, a] -> [b, c, b] {- Input 3 -} [b, c, b] -> [c, b, c] {- Input 4 -} [a, c, b] -> [b, a, c] {- Input 5 -} [b, b, a] ->= [c, b, b] {- Input 6 -} reason (a, 4/1) property Termination has value Just True for SRS [c, c, c] -> [b, c, c] {- Input 2 -} [b, c, b] -> [c, b, c] {- Input 4 -} [a, c, b] -> [b, a, c] {- Input 5 -} reason mirror property Termination has value Just True for SRS [c, c, c] -> [c, c, b] {- Mirror (Input 2) -} [b, c, b] -> [c, b, c] {- Mirror (Input 4) -} [b, c, a] -> [c, a, b] {- Mirror (Input 5) -} reason ( c , St / 2 1 \ \ 0 1 / ) ( b , St / 2 1 \ \ 0 1 / ) ( a , St / 1 1 \ \ 0 1 / ) property Termination has value Just True for SRS [c, c, c] -> [c, c, b] {- Mirror (Input 2) -} [b, c, b] -> [c, b, c] {- Mirror (Input 4) -} reason Tiling { method = Overlap, width = 3, state_type = Bit64, map_type = Enum, unlabel = True, print_completion_steps = False, print_tiles = False, verbose = False, tracing = True} steps 1 using 15 tiles tile all rules steps: 1 property Termination has value Just True for SRS [[<, <, c], [<, c, c], [c, c, c], [c, c, >], [c, >, >]] -> [ [<, <, c] , [<, c, c] , [c, c, b] , [c, b, >] , [ b , > , > ] ] {- Semlab 0 (Concon 0 (Mirror (Input 2))) -} [[<, <, c], [<, c, c], [c, c, c], [c, c, c], [c, c, >]] -> [ [<, <, c] , [<, c, c] , [c, c, b] , [c, b, c] , [ b , c , > ] ] {- Semlab 0 (Concon 1 (Mirror (Input 2))) -} [[<, <, c], [<, c, c], [c, c, c], [c, c, c], [c, c, c]] -> [ [<, <, c] , [<, c, c] , [c, c, b] , [c, b, c] , [ b , c , c ] ] {- Semlab 0 (Concon 2 (Mirror (Input 2))) -} [[<, <, c], [<, c, c], [c, c, c], [c, c, c], [c, c, b]] -> [ [<, <, c] , [<, c, c] , [c, c, b] , [c, b, c] , [ b , c , b ] ] {- Semlab 0 (Concon 3 (Mirror (Input 2))) -} [[<, <, c], [<, c, c], [c, c, c], [c, c, b], [c, b, >]] -> [ [<, <, c] , [<, c, c] , [c, c, b] , [c, b, b] , [ b , b , > ] ] {- Semlab 0 (Concon 4 (Mirror (Input 2))) -} [[<, <, c], [<, c, c], [c, c, c], [c, c, b], [c, b, c]] -> [ [<, <, c] , [<, c, c] , [c, c, b] , [c, b, b] , [ b , b , c ] ] {- Semlab 0 (Concon 5 (Mirror (Input 2))) -} [[<, <, c], [<, c, c], [c, c, c], [c, c, b], [c, b, b]] -> [ [<, <, c] , [<, c, c] , [c, c, b] , [c, b, b] , [ b , b , b ] ] {- Semlab 0 (Concon 6 (Mirror (Input 2))) -} [[<, c, c], [c, c, c], [c, c, c], [c, c, >], [c, >, >]] -> [ [<, c, c] , [c, c, c] , [c, c, b] , [c, b, >] , [ b , > , > ] ] {- Semlab 1 (Concon 0 (Mirror (Input 2))) -} [[<, c, c], [c, c, c], [c, c, c], [c, c, c], [c, c, >]] -> [ [<, c, c] , [c, c, c] , [c, c, b] , [c, b, c] , [ b , c , > ] ] {- Semlab 1 (Concon 1 (Mirror (Input 2))) -} [[<, c, c], [c, c, c], [c, c, c], [c, c, c], [c, c, c]] -> [ [<, c, c] , [c, c, c] , [c, c, b] , [c, b, c] , [ b , c , c ] ] {- Semlab 1 (Concon 2 (Mirror (Input 2))) -} [[<, c, c], [c, c, c], [c, c, c], [c, c, c], [c, c, b]] -> [ [<, c, c] , [c, c, c] , [c, c, b] , [c, b, c] , [ b , c , b ] ] {- Semlab 1 (Concon 3 (Mirror (Input 2))) -} [[<, c, c], [c, c, c], [c, c, c], [c, c, b], [c, b, >]] -> [ [<, c, c] , [c, c, c] , [c, c, b] , [c, b, b] , [ b , b , > ] ] {- Semlab 1 (Concon 4 (Mirror (Input 2))) -} [[<, c, c], [c, c, c], [c, c, c], [c, c, b], [c, b, c]] -> [ [<, c, c] , [c, c, c] , [c, c, b] , [c, b, b] , [ b , b , c ] ] {- Semlab 1 (Concon 5 (Mirror (Input 2))) -} [[<, c, c], [c, c, c], [c, c, c], [c, c, b], [c, b, b]] -> [ [<, c, c] , [c, c, c] , [c, c, b] , [c, b, b] , [ b , b , b ] ] {- Semlab 1 (Concon 6 (Mirror (Input 2))) -} [[c, c, c], [c, c, c], [c, c, c], [c, c, >], [c, >, >]] -> [ [c, c, c] , [c, c, c] , [c, c, b] , [c, b, >] , [ b , > , > ] ] {- Semlab 2 (Concon 0 (Mirror (Input 2))) -} [[c, c, c], [c, c, c], [c, c, c], [c, c, c], [c, c, >]] -> [ [c, c, c] , [c, c, c] , [c, c, b] , [c, b, c] , [ b , c , > ] ] {- Semlab 2 (Concon 1 (Mirror (Input 2))) -} [[c, c, c], [c, c, c], [c, c, c], [c, c, c], [c, c, c]] -> [ [c, c, c] , [c, c, c] , [c, c, b] , [c, b, c] , [ b , c , c ] ] {- Semlab 2 (Concon 2 (Mirror (Input 2))) -} [[c, c, c], [c, c, c], [c, c, c], [c, c, c], [c, c, b]] -> [ [c, c, c] , [c, c, c] , [c, c, b] , [c, b, c] , [ b , c , b ] ] {- Semlab 2 (Concon 3 (Mirror (Input 2))) -} [[c, c, c], [c, c, c], [c, c, c], [c, c, b], [c, b, >]] -> [ [c, c, c] , [c, c, c] , [c, c, b] , [c, b, b] , [ b , b , > ] ] {- Semlab 2 (Concon 4 (Mirror (Input 2))) -} [[c, c, c], [c, c, c], [c, c, c], [c, c, b], [c, b, c]] -> [ [c, c, c] , [c, c, c] , [c, c, b] , [c, b, b] , [ b , b , c ] ] {- Semlab 2 (Concon 5 (Mirror (Input 2))) -} [[c, c, c], [c, c, c], [c, c, c], [c, c, b], [c, b, b]] -> [ [c, c, c] , [c, c, c] , [c, c, b] , [c, b, b] , [ b , b , b ] ] {- Semlab 2 (Concon 6 (Mirror (Input 2))) -} [[c, b, c], [b, c, c], [c, c, c], [c, c, >], [c, >, >]] -> [ [c, b, c] , [b, c, c] , [c, c, b] , [c, b, >] , [ b , > , > ] ] {- Semlab 3 (Concon 0 (Mirror (Input 2))) -} [[c, b, c], [b, c, c], [c, c, c], [c, c, c], [c, c, >]] -> [ [c, b, c] , [b, c, c] , [c, c, b] , [c, b, c] , [ b , c , > ] ] {- Semlab 3 (Concon 1 (Mirror (Input 2))) -} [[c, b, c], [b, c, c], [c, c, c], [c, c, c], [c, c, c]] -> [ [c, b, c] , [b, c, c] , [c, c, b] , [c, b, c] , [ b , c , c ] ] {- Semlab 3 (Concon 2 (Mirror (Input 2))) -} [[c, b, c], [b, c, c], [c, c, c], [c, c, c], [c, c, b]] -> [ [c, b, c] , [b, c, c] , [c, c, b] , [c, b, c] , [ b , c , b ] ] {- Semlab 3 (Concon 3 (Mirror (Input 2))) -} popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Relative