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Java_Bytecode pair #487571321
details
property
value
status
complete
benchmark
Velroyen08-mirrorIntervSim.jar
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n152.star.cs.uiowa.edu
space
BSOG_FoVeOOS_11
run statistics
property
value
solver
AProVE
configuration
standard
runtime (wallclock)
2.40866994858 seconds
cpu usage
5.391610685
max memory
4.4916736E8
stage attributes
key
value
output-size
5870
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_standard /export/starexec/sandbox/benchmark/theBenchmark.jar /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO proof of /export/starexec/sandbox/benchmark/theBenchmark.jar # AProVE Commit ID: 794c25de1cacf0d048858bcd21c9a779e1221865 marcel 20200619 unpublished dirty termination of the given Bare JBC problem could be disproven: (0) Bare JBC problem (1) BareJBCToJBCProof [EQUIVALENT, 96 ms] (2) JBC problem (3) JBCToGraph [EQUIVALENT, 275 ms] (4) JBCTerminationGraph (5) JBCNonTerm [COMPLETE, 148 ms] (6) NO ---------------------------------------- (0) Obligation: need to prove termination of the following program: package simple.mirrorIntervSim; public class Main { /** * @param args */ public static void main(String[] args) { MirrorIntervSim.loop(args.length); } } package simple.mirrorIntervSim; public class MirrorIntervSim { /* */ public static void loop(int i) { while (i != 0) { if (-5 <= i && i <= 35) { if (i < 0) { i = -5; } else { if (i > 30) { i = 35; } else { i--; } } } else { i = 0; } } } } ---------------------------------------- (1) BareJBCToJBCProof (EQUIVALENT) initialized classpath ---------------------------------------- (2) Obligation: need to prove termination of the following program: package simple.mirrorIntervSim; public class Main { /** * @param args */ public static void main(String[] args) { MirrorIntervSim.loop(args.length); } } package simple.mirrorIntervSim; public class MirrorIntervSim { /* */ public static void loop(int i) {
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