details

property	value
status	complete
benchmark	PEANO_nokinds_GM.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n084.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	muterm 6.0.3
configuration	default
runtime (wallclock)	1.50109004974 seconds
cpu usage	1.388514402
max memory	7569408.0

stage attributes

key	value
output-size	72784
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR v_NonEmpty:S M:S N:S V1:S V2:S X:S X1:S X2:S X3:S) (RULES a__U11(tt,N:S) -> mark(N:S) a__U11(X1:S,X2:S) -> U11(X1:S,X2:S) a__U21(tt,M:S,N:S) -> s(a__plus(mark(N:S),mark(M:S))) a__U21(X1:S,X2:S,X3:S) -> U21(X1:S,X2:S,X3:S) a__and(tt,X:S) -> mark(X:S) a__and(X1:S,X2:S) -> and(X1:S,X2:S) a__isNat(0) -> tt a__isNat(plus(V1:S,V2:S)) -> a__and(a__isNat(V1:S),isNat(V2:S)) a__isNat(s(V1:S)) -> a__isNat(V1:S) a__isNat(X:S) -> isNat(X:S) a__plus(N:S,0) -> a__U11(a__isNat(N:S),N:S) a__plus(N:S,s(M:S)) -> a__U21(a__and(a__isNat(M:S),isNat(N:S)),M:S,N:S) a__plus(X1:S,X2:S) -> plus(X1:S,X2:S) mark(0) -> 0 mark(U11(X1:S,X2:S)) -> a__U11(mark(X1:S),X2:S) mark(U21(X1:S,X2:S,X3:S)) -> a__U21(mark(X1:S),X2:S,X3:S) mark(and(X1:S,X2:S)) -> a__and(mark(X1:S),X2:S) mark(isNat(X:S)) -> a__isNat(X:S) mark(plus(X1:S,X2:S)) -> a__plus(mark(X1:S),mark(X2:S)) mark(s(X:S)) -> s(mark(X:S)) mark(tt) -> tt ) Problem 1: Dependency Pairs Processor: -> Pairs: A__U11(tt,N:S) -> MARK(N:S) A__U21(tt,M:S,N:S) -> A__PLUS(mark(N:S),mark(M:S)) A__U21(tt,M:S,N:S) -> MARK(M:S) A__U21(tt,M:S,N:S) -> MARK(N:S) A__AND(tt,X:S) -> MARK(X:S) A__ISNAT(plus(V1:S,V2:S)) -> A__AND(a__isNat(V1:S),isNat(V2:S)) A__ISNAT(plus(V1:S,V2:S)) -> A__ISNAT(V1:S) A__ISNAT(s(V1:S)) -> A__ISNAT(V1:S) A__PLUS(N:S,0) -> A__U11(a__isNat(N:S),N:S) A__PLUS(N:S,0) -> A__ISNAT(N:S) A__PLUS(N:S,s(M:S)) -> A__U21(a__and(a__isNat(M:S),isNat(N:S)),M:S,N:S) A__PLUS(N:S,s(M:S)) -> A__AND(a__isNat(M:S),isNat(N:S)) A__PLUS(N:S,s(M:S)) -> A__ISNAT(M:S) MARK(U11(X1:S,X2:S)) -> A__U11(mark(X1:S),X2:S) MARK(U11(X1:S,X2:S)) -> MARK(X1:S) MARK(U21(X1:S,X2:S,X3:S)) -> A__U21(mark(X1:S),X2:S,X3:S) MARK(U21(X1:S,X2:S,X3:S)) -> MARK(X1:S) MARK(and(X1:S,X2:S)) -> A__AND(mark(X1:S),X2:S) MARK(and(X1:S,X2:S)) -> MARK(X1:S) MARK(isNat(X:S)) -> A__ISNAT(X:S) MARK(plus(X1:S,X2:S)) -> A__PLUS(mark(X1:S),mark(X2:S)) MARK(plus(X1:S,X2:S)) -> MARK(X1:S) MARK(plus(X1:S,X2:S)) -> MARK(X2:S) MARK(s(X:S)) -> MARK(X:S) -> Rules: a__U11(tt,N:S) -> mark(N:S) a__U11(X1:S,X2:S) -> U11(X1:S,X2:S) a__U21(tt,M:S,N:S) -> s(a__plus(mark(N:S),mark(M:S))) a__U21(X1:S,X2:S,X3:S) -> U21(X1:S,X2:S,X3:S) a__and(tt,X:S) -> mark(X:S) a__and(X1:S,X2:S) -> and(X1:S,X2:S) a__isNat(0) -> tt a__isNat(plus(V1:S,V2:S)) -> a__and(a__isNat(V1:S),isNat(V2:S)) a__isNat(s(V1:S)) -> a__isNat(V1:S) a__isNat(X:S) -> isNat(X:S) a__plus(N:S,0) -> a__U11(a__isNat(N:S),N:S) a__plus(N:S,s(M:S)) -> a__U21(a__and(a__isNat(M:S),isNat(N:S)),M:S,N:S) a__plus(X1:S,X2:S) -> plus(X1:S,X2:S) mark(0) -> 0 mark(U11(X1:S,X2:S)) -> a__U11(mark(X1:S),X2:S) mark(U21(X1:S,X2:S,X3:S)) -> a__U21(mark(X1:S),X2:S,X3:S) mark(and(X1:S,X2:S)) -> a__and(mark(X1:S),X2:S) mark(isNat(X:S)) -> a__isNat(X:S) mark(plus(X1:S,X2:S)) -> a__plus(mark(X1:S),mark(X2:S)) mark(s(X:S)) -> s(mark(X:S)) mark(tt) -> tt Problem 1: SCC Processor: -> Pairs: A__U11(tt,N:S) -> MARK(N:S) A__U21(tt,M:S,N:S) -> A__PLUS(mark(N:S),mark(M:S)) A__U21(tt,M:S,N:S) -> MARK(M:S) A__U21(tt,M:S,N:S) -> MARK(N:S) A__AND(tt,X:S) -> MARK(X:S) A__ISNAT(plus(V1:S,V2:S)) -> A__AND(a__isNat(V1:S),isNat(V2:S)) A__ISNAT(plus(V1:S,V2:S)) -> A__ISNAT(V1:S) A__ISNAT(s(V1:S)) -> A__ISNAT(V1:S) A__PLUS(N:S,0) -> A__U11(a__isNat(N:S),N:S) A__PLUS(N:S,0) -> A__ISNAT(N:S) popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Standard