details

property	value
status	complete
benchmark	PEANO_nokinds_Z.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n088.star.cs.uiowa.edu
space	Transformed_CSR_04

run statistics

property	value
solver	AProVE21
configuration	standard
runtime (wallclock)	2.19576311111 seconds
cpu usage	5.927800692
max memory	4.75856896E8

stage attributes

key	value
output-size	3858
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_standard /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.xml # AProVE Commit ID: c69e44bd14796315568835c1ffa2502984884775 mhark 20210624 unpublished Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRSRRRProof [EQUIVALENT, 123 ms] (2) QTRS (3) QTRSRRRProof [EQUIVALENT, 4 ms] (4) QTRS (5) RisEmptyProof [EQUIVALENT, 0 ms] (6) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: U11(tt, N) -> activate(N) U21(tt, M, N) -> s(plus(activate(N), activate(M))) and(tt, X) -> activate(X) isNat(n__0) -> tt isNat(n__plus(V1, V2)) -> and(isNat(activate(V1)), n__isNat(activate(V2))) isNat(n__s(V1)) -> isNat(activate(V1)) plus(N, 0) -> U11(isNat(N), N) plus(N, s(M)) -> U21(and(isNat(M), n__isNat(N)), M, N) 0 -> n__0 plus(X1, X2) -> n__plus(X1, X2) isNat(X) -> n__isNat(X) s(X) -> n__s(X) activate(n__0) -> 0 activate(n__plus(X1, X2)) -> plus(X1, X2) activate(n__isNat(X)) -> isNat(X) activate(n__s(X)) -> s(X) activate(X) -> X Q is empty. ---------------------------------------- (1) QTRSRRRProof (EQUIVALENT) Used ordering: U11/2(YES,YES) tt/0) activate/1)YES( U21/3(YES,YES,YES) s/1(YES) plus/2(YES,YES) and/2(YES,YES) isNat/1)YES( n__0/0) n__plus/2(YES,YES) n__isNat/1)YES( n__s/1(YES) 0/0) Quasi precedence: [U21_3, plus_2, n__plus_2] > [U11_2, n__0, 0] > [tt, s_1, n__s_1] [U21_3, plus_2, n__plus_2] > and_2 Status: U11_2: multiset status tt: multiset status U21_3: [3,2,1] s_1: multiset status plus_2: [1,2] and_2: multiset status n__0: multiset status n__plus_2: [1,2] n__s_1: multiset status 0: multiset status With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: U11(tt, N) -> activate(N) U21(tt, M, N) -> s(plus(activate(N), activate(M))) and(tt, X) -> activate(X) isNat(n__0) -> tt isNat(n__plus(V1, V2)) -> and(isNat(activate(V1)), n__isNat(activate(V2))) isNat(n__s(V1)) -> isNat(activate(V1)) plus(N, 0) -> U11(isNat(N), N) plus(N, s(M)) -> U21(and(isNat(M), n__isNat(N)), M, N) ---------------------------------------- popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Standard