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TRS Standard pair #516966565
details
property
value
status
complete
benchmark
2.29.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n087.star.cs.uiowa.edu
space
SK90
run statistics
property
value
solver
AProVE21
configuration
standard
runtime (wallclock)
2.16653704643 seconds
cpu usage
5.540099382
max memory
4.74570752E8
stage attributes
key
value
output-size
2211
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_standard /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.xml # AProVE Commit ID: c69e44bd14796315568835c1ffa2502984884775 mhark 20210624 unpublished Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRSRRRProof [EQUIVALENT, 106 ms] (2) QTRS (3) RisEmptyProof [EQUIVALENT, 0 ms] (4) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: prime(0) -> false prime(s(0)) -> false prime(s(s(x))) -> prime1(s(s(x)), s(x)) prime1(x, 0) -> false prime1(x, s(0)) -> true prime1(x, s(s(y))) -> and(not(divp(s(s(y)), x)), prime1(x, s(y))) divp(x, y) -> =(rem(x, y), 0) Q is empty. ---------------------------------------- (1) QTRSRRRProof (EQUIVALENT) Used ordering: prime/1(YES) 0/0) false/0) s/1(YES) prime1/2(YES,YES) true/0) and/2(YES,YES) not/1)YES( divp/2(YES,YES) =/2(YES,YES) rem/2(YES,YES) Quasi precedence: prime_1 > [false, prime1_2, true] > s_1 > [=_2, rem_2] prime_1 > [false, prime1_2, true] > and_2 > [=_2, rem_2] prime_1 > [false, prime1_2, true] > divp_2 > 0 > [=_2, rem_2] Status: prime_1: multiset status 0: multiset status false: multiset status s_1: [1] prime1_2: [1,2] true: multiset status and_2: [1,2] divp_2: multiset status =_2: [1,2] rem_2: [1,2] With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: prime(0) -> false prime(s(0)) -> false prime(s(s(x))) -> prime1(s(s(x)), s(x)) prime1(x, 0) -> false prime1(x, s(0)) -> true prime1(x, s(s(y))) -> and(not(divp(s(s(y)), x)), prime1(x, s(y))) divp(x, y) -> =(rem(x, y), 0) ---------------------------------------- (2) Obligation: Q restricted rewrite system: R is empty. Q is empty. ---------------------------------------- (3) RisEmptyProof (EQUIVALENT) The TRS R is empty. Hence, termination is trivially proven. ---------------------------------------- (4) YES
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