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TRS Standard pair #516966965
details
property
value
status
complete
benchmark
2.19.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n074.star.cs.uiowa.edu
space
SK90
run statistics
property
value
solver
AProVE21
configuration
standard
runtime (wallclock)
2.16507005692 seconds
cpu usage
5.474912193
max memory
4.75226112E8
stage attributes
key
value
output-size
1780
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_standard /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.xml # AProVE Commit ID: c69e44bd14796315568835c1ffa2502984884775 mhark 20210624 unpublished Termination w.r.t. Q of the given QTRS could be proven: (0) QTRS (1) QTRSRRRProof [EQUIVALENT, 91 ms] (2) QTRS (3) RisEmptyProof [EQUIVALENT, 0 ms] (4) YES ---------------------------------------- (0) Obligation: Q restricted rewrite system: The TRS R consists of the following rules: sqr(0) -> 0 sqr(s(x)) -> +(sqr(x), s(double(x))) double(0) -> 0 double(s(x)) -> s(s(double(x))) +(x, 0) -> x +(x, s(y)) -> s(+(x, y)) sqr(s(x)) -> s(+(sqr(x), double(x))) Q is empty. ---------------------------------------- (1) QTRSRRRProof (EQUIVALENT) Used ordering: Quasi precedence: [sqr_1, double_1] > 0 [sqr_1, double_1] > +_2 > s_1 Status: sqr_1: multiset status 0: multiset status s_1: multiset status +_2: [1,2] double_1: multiset status With this ordering the following rules can be removed by the rule removal processor [LPAR04] because they are oriented strictly: sqr(0) -> 0 sqr(s(x)) -> +(sqr(x), s(double(x))) double(0) -> 0 double(s(x)) -> s(s(double(x))) +(x, 0) -> x +(x, s(y)) -> s(+(x, y)) sqr(s(x)) -> s(+(sqr(x), double(x))) ---------------------------------------- (2) Obligation: Q restricted rewrite system: R is empty. Q is empty. ---------------------------------------- (3) RisEmptyProof (EQUIVALENT) The TRS R is empty. Hence, termination is trivially proven. ---------------------------------------- (4) YES
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