details

property	value
status	complete
benchmark	#3.5a.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n095.star.cs.uiowa.edu
space	AG01

run statistics

property	value
solver	muterm 6.0.3
configuration	default
runtime (wallclock)	0.127412080765 seconds
cpu usage	0.050104031
max memory	3973120.0

stage attributes

key	value
output-size	7721
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES Problem 1: (VAR v_NonEmpty:S x:S y:S) (RULES if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(x:S,0) -> x:S minus(x:S,s(y:S)) -> pred(minus(x:S,y:S)) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) pred(s(x:S)) -> x:S ) Problem 1: Innermost Equivalent Processor: -> Rules: if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(x:S,0) -> x:S minus(x:S,s(y:S)) -> pred(minus(x:S,y:S)) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) pred(s(x:S)) -> x:S -> The term rewriting system is non-overlaping or locally confluent overlay system. Therefore, innermost termination implies termination. Problem 1: Dependency Pairs Processor: -> Pairs: IF_MOD(ttrue,s(x:S),s(y:S)) -> MINUS(x:S,y:S) IF_MOD(ttrue,s(x:S),s(y:S)) -> MOD(minus(x:S,y:S),s(y:S)) LE(s(x:S),s(y:S)) -> LE(x:S,y:S) MINUS(x:S,s(y:S)) -> MINUS(x:S,y:S) MINUS(x:S,s(y:S)) -> PRED(minus(x:S,y:S)) MOD(s(x:S),s(y:S)) -> IF_MOD(le(y:S,x:S),s(x:S),s(y:S)) MOD(s(x:S),s(y:S)) -> LE(y:S,x:S) -> Rules: if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(x:S,0) -> x:S minus(x:S,s(y:S)) -> pred(minus(x:S,y:S)) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) pred(s(x:S)) -> x:S Problem 1: SCC Processor: -> Pairs: IF_MOD(ttrue,s(x:S),s(y:S)) -> MINUS(x:S,y:S) IF_MOD(ttrue,s(x:S),s(y:S)) -> MOD(minus(x:S,y:S),s(y:S)) LE(s(x:S),s(y:S)) -> LE(x:S,y:S) MINUS(x:S,s(y:S)) -> MINUS(x:S,y:S) MINUS(x:S,s(y:S)) -> PRED(minus(x:S,y:S)) MOD(s(x:S),s(y:S)) -> IF_MOD(le(y:S,x:S),s(x:S),s(y:S)) MOD(s(x:S),s(y:S)) -> LE(y:S,x:S) -> Rules: if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) minus(x:S,0) -> x:S minus(x:S,s(y:S)) -> pred(minus(x:S,y:S)) mod(0,y:S) -> 0 mod(s(x:S),0) -> 0 mod(s(x:S),s(y:S)) -> if_mod(le(y:S,x:S),s(x:S),s(y:S)) pred(s(x:S)) -> x:S ->Strongly Connected Components: ->->Cycle: ->->-> Pairs: MINUS(x:S,s(y:S)) -> MINUS(x:S,y:S) ->->-> Rules: if_mod(ffalse,s(x:S),s(y:S)) -> s(x:S) if_mod(ttrue,s(x:S),s(y:S)) -> mod(minus(x:S,y:S),s(y:S)) le(0,y:S) -> ttrue le(s(x:S),0) -> ffalse le(s(x:S),s(y:S)) -> le(x:S,y:S) popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to TRS Standard