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SRS Standard pair #516969005
details
property
value
status
complete
benchmark
z046.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n139.star.cs.uiowa.edu
space
Zantema_04
run statistics
property
value
solver
MnM 3.18b
configuration
default
runtime (wallclock)
0.498700141907 seconds
cpu usage
0.665112805
max memory
3.58547456E8
stage attributes
key
value
output-size
749
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo the bijection { c ↦ 0, a ↦ 1, b ↦ 2 }, it remains to prove termination of the 1-rule system { 0 1 1 2 1 ⟶ 1 1 2 1 0 0 1 1 2 } Loop of length 4 starting with a string of length 7 using right expansion and the encoding { 0 ↦ a, 1 ↦ b, ... }: .abbcb.bb rule abbcb-> bbcbaabbc at position 0 .bbcbaabbc.bb rule abbcb-> bbcbaabbc at position 5 .bbcbabbcbaabbc.b rule abbcb-> bbcbaabbc at position 10 .bbcbabbcbabbcbaabbc. rule abbcb-> bbcbaabbc at position 9 .bbcbabbcbbbcbaabbcaabbc.
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