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SRS Standard pair #516974627
details
property
value
status
complete
benchmark
size-12-alpha-3-num-206.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n072.star.cs.uiowa.edu
space
Waldmann_07_size12
run statistics
property
value
solver
MnM 3.18b
configuration
default
runtime (wallclock)
1.02403998375 seconds
cpu usage
2.707280241
max memory
6.73898496E8
stage attributes
key
value
output-size
1041
starexec-result
NO
output
/export/starexec/sandbox/solver/bin/starexec_run_default /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- NO After renaming modulo the bijection { a ↦ 0, b ↦ 1, c ↦ 2 }, it remains to prove termination of the 4-rule system { 0 ⟶ , 0 1 ⟶ 1 1 0 2 0 , 1 ⟶ , 2 0 2 ⟶ } Loop of length 11 starting with a string of length 8 using right expansion and the encoding { 0 ↦ a, 1 ↦ b, ... }: .ab.bbbcbb rule ab-> bbaca at position 0 .bbaca.bbbcbb rule ab-> bbaca at position 4 .bbacbbaca.bbcbb rule ab-> bbaca at position 8 .bbacbbacbbaca.bcbb rule b-> at position 8 .bbacbbacbaca.bcbb rule b-> at position 8 .bbacbbacaca.bcbb rule cac-> at position 7 .bbacbbaa.bcbb rule ab-> bbaca at position 7 .bbacbbabbaca.cbb rule cac-> at position 10 .bbacbbabba.bb rule ab-> bbaca at position 9 .bbacbbabbbbaca.b rule a-> at position 11 .bbacbbabbbbca.b rule ab-> bbaca at position 12 .bbacbbabbbbcbbaca.
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