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SRS Standard pair #516976071
details
property
value
status
complete
benchmark
un10.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n177.star.cs.uiowa.edu
space
Trafo_06
run statistics
property
value
solver
matchbox-2021-06-18b
configuration
tc21-9.sh
runtime (wallclock)
10.4730391502 seconds
cpu usage
27.032849998
max memory
9.6268288E8
stage attributes
key
value
output-size
51058
starexec-result
YES
output
/export/starexec/sandbox2/solver/bin/starexec_run_tc21-9.sh /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 1 rules on 2 letters DP SRS with 9 strict rules and 1 weak rules on 3 letters EDG SRS with 6 strict rules and 1 weak rules on 3 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 3, encoding = FBV, dim = 4, solver = Minisatapi, verbose = False, tracing = False} SRS with 3 strict rules and 1 weak rules on 3 letters EDG SRS with 3 strict rules and 1 weak rules on 3 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 3, encoding = FBV, dim = 4, solver = Minisatapi, verbose = False, tracing = False} SRS with 0 strict rules and 1 weak rules on 2 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [b, b, a, b, b, a, b, b, b, b] -> [ b , b , b , b , b , a , b , b , a , b , b , a , b ] {- Input 0 -} reason DP property Termination has value Just True for SRS [b, b, a, b, b, a, b, b, b, b] ->= [ b , b , b , b , b , a , b , b , a , b , b , a , b ] {- DP Nontop (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , b , b , b , a , b , b , a , b , b , a , b ] {- DP (Top 0) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , b , b , a , b , b , a , b , b , a , b ] {- DP (Top 1) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , b , a , b , b , a , b , b , a , b ] {- DP (Top 2) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [b#, b, a, b] {- DP (Top 9) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b ] {- DP (Top 6) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b , b , a , b ] {- DP (Top 3) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [b#, a, b] {- DP (Top 10) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , a , b , b , a , b ] {- DP (Top 7) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , a , b , b , a , b , b , a , b ] {- DP (Top 4) (Input 0) -} reason EDG property Termination has value Just True for SRS [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , b , b , b , a , b , b , a , b , b , a , b ] {- DP (Top 0) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b , b , a , b ] {- DP (Top 3) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b ] {- DP (Top 6) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [b#, b, a, b] {- DP (Top 9) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , b , a , b , b , a , b , b , a , b ] {- DP (Top 2) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , b , b , a , b , b , a , b , b , a , b ] {- DP (Top 1) (Input 0) -} [b, b, a, b, b, a, b, b, b, b] ->= [ b , b , b , b , b , a , b , b , a , b , b , a , b ] {- DP Nontop (Input 0) -} reason ( b , Wk / 0A 0A 0A 0A \ | -4A -4A 0A 0A | | -4A -4A -4A 0A | \ -4A -4A -4A 0A / ) ( a , Wk / 0A 0A 4A 4A \ | 0A 0A 0A 4A | | 0A 0A 0A 0A | \ -4A -4A 0A 0A / ) ( b# , Wk / 1A 4A 5A 5A \ | 1A 4A 5A 5A | | 1A 4A 5A 5A | \ 1A 4A 5A 5A / ) property Termination has value Just True for SRS [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b , b , a , b ] {- DP (Top 3) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b ] {- DP (Top 6) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [b#, b, a, b] {- DP (Top 9) (Input 0) -} [b, b, a, b, b, a, b, b, b, b] ->= [ b , b , b , b , b , a , b , b , a , b , b , a , b ] {- DP Nontop (Input 0) -} reason EDG property Termination has value Just True for SRS [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b , b , a , b ] {- DP (Top 3) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [b#, b, a, b] {- DP (Top 9) (Input 0) -} [b#, b, a, b, b, a, b, b, b, b] |-> [ b# , b , a , b , b , a , b ] {- DP (Top 6) (Input 0) -} [b, b, a, b, b, a, b, b, b, b] ->= [ b , b , b , b , b , a , b , b , a , b , b , a , b ] {- DP Nontop (Input 0) -} reason ( b , Wk / 0A 0A 0A 4A \ | 0A 0A 0A 0A | | 0A 0A 0A 0A | \ -4A 0A 0A 0A / ) ( a , Wk / 0A 0A 0A 0A \ | -4A -4A -4A -4A | | -4A -4A -4A -4A | \ -4A -4A -4A -4A / ) ( b# , Wk / 20A 21A 24A 24A \ | 20A 21A 24A 24A | | 20A 21A 24A 24A | \ 20A 21A 24A 24A / ) property Termination
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