details

property	value
status	complete
benchmark	random-141.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n183.star.cs.uiowa.edu
space	Waldmann_19

run statistics

property	value
solver	matchbox-2021-06-18b
configuration	tc21-9.sh
runtime (wallclock)	0.267857789993 seconds
cpu usage	0.466671958
max memory	3.944448E7

stage attributes

key	value
output-size	8932
starexec-result	YES

output

/export/starexec/sandbox/solver/bin/starexec_run_tc21-9.sh /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 3 rules on 2 letters tile all, by Config { method = Backward,width = 2,unlabel = True} SRS with 27 rules on 8 letters weights SRS with 3 rules on 4 letters unlabel SRS with 1 rules on 2 letters remove some, by Config { method = Backward,width = 2,unlabel = True} SRS with 0 rules on 0 letters no strict rules ************************************************** proof ************************************************** property Termination has value Just True for SRS [a, a, a, a] -> [b, a, b, b] {- Input 0 -} [b, b, a, b] -> [a, b, b, b] {- Input 1 -} [a, a, b, a] -> [a, a, a, a] {- Input 2 -} reason Tiling { method = Backward, width = 2, state_type = Bit64, map_type = Enum, unlabel = True, print_completion_steps = False, print_tiles = False, max_num_tiles = Just 1000, max_num_rules = Just 100000, verbose = False, tracing = False} steps 0 using 8 tiles tile all rules steps: 0 property Termination has value Just True for SRS [[<, a], [a, a], [a, a], [a, a], [a, >]] -> [ [<, b] , [b, a] , [a, b] , [b, b] , [ b , > ] ] {- Semlab 0 (Concon 0 (Input 0)) -} [[<, a], [a, a], [a, a], [a, a], [a, a]] -> [ [<, b] , [b, a] , [a, b] , [b, b] , [ b , a ] ] {- Semlab 0 (Concon 1 (Input 0)) -} [[<, a], [a, a], [a, a], [a, a], [a, b]] -> [ [<, b] , [b, a] , [a, b] , [b, b] , [ b , b ] ] {- Semlab 0 (Concon 2 (Input 0)) -} [[a, a], [a, a], [a, a], [a, a], [a, >]] -> [ [a, b] , [b, a] , [a, b] , [b, b] , [ b , > ] ] {- Semlab 1 (Concon 0 (Input 0)) -} [[a, a], [a, a], [a, a], [a, a], [a, a]] -> [ [a, b] , [b, a] , [a, b] , [b, b] , [ b , a ] ] {- Semlab 1 (Concon 1 (Input 0)) -} [[a, a], [a, a], [a, a], [a, a], [a, b]] -> [ [a, b] , [b, a] , [a, b] , [b, b] , [ b , b ] ] {- Semlab 1 (Concon 2 (Input 0)) -} [[b, a], [a, a], [a, a], [a, a], [a, >]] -> [ [b, b] , [b, a] , [a, b] , [b, b] , [ b , > ] ] {- Semlab 2 (Concon 0 (Input 0)) -} [[b, a], [a, a], [a, a], [a, a], [a, a]] -> [ [b, b] , [b, a] , [a, b] , [b, b] , [ b , a ] ] {- Semlab 2 (Concon 1 (Input 0)) -} [[b, a], [a, a], [a, a], [a, a], [a, b]] -> [ [b, b] , [b, a] , [a, b] , [b, b] , [ b , b ] ] {- Semlab 2 (Concon 2 (Input 0)) -} [[<, b], [b, b], [b, a], [a, b], [b, >]] -> [ [<, a] , [a, b] , [b, b] , [b, b] , [ b , > ] ] {- Semlab 0 (Concon 0 (Input 1)) -} [[<, b], [b, b], [b, a], [a, b], [b, a]] -> [ [<, a] , [a, b] , [b, b] , [b, b] , [ b , a ] ] {- Semlab 0 (Concon 1 (Input 1)) -} [[<, b], [b, b], [b, a], [a, b], [b, b]] -> [ [<, a] , [a, b] , [b, b] , [b, b] , [ b , b ] ] {- Semlab 0 (Concon 2 (Input 1)) -} [[a, b], [b, b], [b, a], [a, b], [b, >]] -> [ [a, a] , [a, b] , [b, b] , [b, b] , [ b , > ] ] {- Semlab 1 (Concon 0 (Input 1)) -} [[a, b], [b, b], [b, a], [a, b], [b, a]] -> [ [a, a] , [a, b] , [b, b] , [b, b] , [ b , a ] ] {- Semlab 1 (Concon 1 (Input 1)) -} [[a, b], [b, b], [b, a], [a, b], [b, b]] -> [ [a, a] , [a, b] , [b, b] , [b, b] , [ b , b ] ] {- Semlab 1 (Concon 2 (Input 1)) -} [[b, b], [b, b], [b, a], [a, b], [b, >]] -> [ [b, a] , [a, b] , [b, b] , [b, b] , [ b , > ] ] {- Semlab 2 (Concon 0 (Input 1)) -} [[b, b], [b, b], [b, a], [a, b], [b, a]] -> [ [b, a] , [a, b] , [b, b] , [b, b] , [ b , a ] ] {- Semlab 2 (Concon 1 (Input 1)) -} [[b, b], [b, b], [b, a], [a, b], [b, b]] -> [ [b, a] , [a, b] , [b, b] , [b, b] , [ b , b ] ] {- Semlab 2 (Concon 2 (Input 1)) -} [[<, a], [a, a], [a, b], [b, a], [a, >]] -> [ [<, a] , [a, a] , [a, a] , [a, a] , [ a , > ] ] {- Semlab 0 (Concon 0 (Input 2)) -} [[<, a], [a, a], [a, b], [b, a], [a, a]] -> [ [<, a] , [a, a] , [a, a] , [a, a] , [ a , a ] ] {- Semlab 0 (Concon 1 (Input 2)) -} [[<, a], [a, a], [a, b], [b, a], [a, b]] -> [ [<, a] , [a, a] , [a, a] , [a, a] , [ a , b ] ] {- Semlab 0 (Concon 2 (Input 2)) -} [[a, a], [a, a], [a, b], [b, a], [a, >]] -> [ [a, a] , [a, a] , [a, a] , [a, a] , [ a , > ] ] {- Semlab 1 (Concon 0 (Input 2)) -} [[a, a], [a, a], [a, b], [b, a], [a, a]] -> [ [a, a] , [a, a] , [a, a] , [a, a] , [ a , a ] ] {- Semlab 1 (Concon 1 (Input 2)) -} [[a, a], [a, a], [a, b], [b, a], [a, b]] -> [ [a, a] , [a, a] , [a, a] , [a, a] , [ a , b ] ] {- Semlab 1 (Concon 2 (Input 2)) -} [[b, a], [a, a], [a, b], [b, a], [a, >]] -> [ [b, a] , [a, a] , [a, a] , [a, a] , [ a , > ] ] {- Semlab 2 (Concon 0 (Input 2)) -} [[b, a], [a, a], [a, b], [b, a], [a, a]] -> [ [b, a] , [a, a] , [a, a] , [a, a] , [ a , a ] ] {- Semlab 2 (Concon 1 (Input 2)) -} [[b, a], [a, a], [a, b], [b, a], [a, b]] -> [ [b, a] , [a, a] , [a, a] , [a, a] , [ a , b ] ] {- Semlab 2 (Concon 2 (Input 2)) -} reason ([<, a], 14/1) ([a, a], 7/1) ([a, >], 1/1) ([<, b], 1/1) ([b, a], 16/1) ([a, b], 1/1) property Termination has value Just True for SRS [[b, b], [b, b], [b, a], [a, b], [b, >]] -> [ [b, a] , [a, b] , [b, b] , [b, b] , [ b , > ] ] {- Semlab 2 (Concon 0 (Input 1)) -} [[b, b], [b, b], [b, a], [a, b], [b, a]] -> [ [b, a] , [a, b] , [b, b] , [b, b] , [ b , a ] ] {- Semlab 2 (Concon 1 (Input 1)) -} [[b, b], [b, b], [b, a], [a, b], [b, b]] -> [ [b, a] , [a, b] , [b, b] , [b, b] , [ b , b ] ] {- Semlab 2 (Concon 2 (Input 1)) -} reason unlabel property Termination has value Just True for SRS [1, 1, 0, 1] -> [0, 1, 1, 1] {- Input 1 -} reason Tiling { method = Backward, width = 2, state_type = Bit64, map_type = Enum, unlabel = True, print_completion_steps = False, print_tiles = False, max_num_tiles = Just 1000, max_num_rules = Just 100000, verbose = False, tracing = False} steps 0 using 4 tiles remove some unmatched rules steps: 0 property Termination has value Just True for SRS reason no strict rules ************************************************** skeleton: (3,2)\TileAllRFCrev{2}(27,8)\Weight(3,4)\Unlabel(1,2)\TileRemoveRFCrev{2}(0,0)[] ************************************************** let {} in let {trac ?= False;loop_cap = 1;match_cap = 2;tile_cap = 3;matrix_cap = 4;mo = Pre (Or_Else Count (IfSizeLeq 100000 (Simplex Sparse) Fail));wop = Or_Else (Worker (Weight {modus = mo})) Pass;weighted = \ m -> And_Then m wop;done = Worker No_Strict_Rules;dont = \ p -> Fail;tiling = \ m w -> On tile_cap (weighted (And_Then (Worker (Tiling {method = m,width = w,map_type = Enum,max_num_tiles = Just 1000,max_num_rules = Just 100000})) (Worker Remap)));tile_roc = Tree_Search_Preemptive 0 done let {ws = [ 2, 4, 8, 12]}in (for ws (\ w -> tiling Overlap w)) <> [ Worker Unlabel];mb = \ size -> On match_cap (Apply (Worker (Matchbound {method = RFC,max_size = Just size})) done);mbs = \ size -> First_Of [ mb size, Apply (Worker Mirror) (mb size)];tile_rfc = Tree_Search_Preemptive 0 done let {ws = [ 2, 4, 8, 12]}in (for ws (\ w -> tiling Forward w)) <> ((for ws (\ w -> tiling Backward w)) <> [ Worker Unlabel]);solver = Minisatapi;qpi = \ dim bits -> On matrix_cap (weighted (Worker (QPI {tracing = trac,dim = dim,bits = bits,solver = solver})));qpis = Seq [ Timeout 10 (qpi 2 3), Timeout 30 (qpi 4 3), Timeout 50 (qpi 6 3), qpi 8 3];kbo = \ b -> On matrix_cap (weighted (Worker (KBO {bits = b,solver = solver})));matrix = \ dom dim bits -> On matrix_cap (weighted (Worker (Matrix {monotone = Weak,domain = dom,dim = dim,bits = bits,encoding = Ersatz_Binary,tracing = trac,verbose = True,solver = solver})));arctics = Seq [ Timeout 10 (matrix Arctic 2 16), Timeout 30 (matrix Arctic 4 8), Timeout 50 (matrix Arctic 6 4), matrix Arctic 8 2];naturals = Seq [ Timeout 10 (matrix Natural 2 4), Timeout 30 (matrix Natural 4 3), Timeout 50 (matrix Natural 6 2), matrix Natural 8 1];remove = First_Of [ qpis, arctics, naturals, As_Transformer tile_roc];remove_wop = And_Then wop (Or_Else (As_Transformer (Worker No_Strict_Rules)) remove);deepee = Apply (And_Then (Worker DP) (Worker Remap)) (Apply wop (Branch (Worker (EDG {tracing = False,usable = True})) remove_wop));when_small = \ m -> Apply (Worker (SizeAtmost 1000)) m;yeah = First_Of [ when_small (First_Of [ deepee, Apply (Worker Mirror) deepee]), tile_rfc, mbs 100000];noh_for = \ side -> Worker (Simple (Config {closure = side,max_closure_width = Nothing,intermediates = All,priority = Linear [ ( 1, Log2 Steps), ( -1, Width_lhs), ( -2, Log2 Width_rhs)]}));noh = First_Of [ On loop_cap (noh_for Forward), On loop_cap (noh_for Backward), On loop_cap (Worker Transport)]} popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard