details

property	value
status	complete
benchmark	abccaaaaa-aaaaaabccabcc.srs.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n139.star.cs.uiowa.edu
space	Wenzel_16

run statistics

property	value
solver	matchbox-2021-06-18b
configuration	tc21-9.sh
runtime (wallclock)	14.2221360207 seconds
cpu usage	41.121405065
max memory	1.14876416E9

stage attributes

key	value
output-size	63674
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_tc21-9.sh /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 1 rules on 3 letters DP SRS with 7 strict rules and 1 weak rules on 4 letters EDG SRS with 7 strict rules and 1 weak rules on 4 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 3, encoding = FBV, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 2 strict rules and 1 weak rules on 4 letters EDG SRS with 2 strict rules and 1 weak rules on 4 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 3, encoding = FBV, dim = 6, solver = Minisatapi, verbose = False, tracing = False} SRS with 0 strict rules and 1 weak rules on 3 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [a, b, c, c, a, a, a, a, a] -> [ a , a , a , a , a , a , b , c , c , a , b , c , c ] {- Input 0 -} reason DP property Termination has value Just True for SRS [a, b, c, c, a, a, a, a, a] ->= [ a , a , a , a , a , a , b , c , c , a , b , c , c ] {- DP Nontop (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , a , a , a , b , c , c , a , b , c , c ] {- DP (Top 0) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , a , a , b , c , c , a , b , c , c ] {- DP (Top 1) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , a , b , c , c , a , b , c , c ] {- DP (Top 2) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , b , c , c , a , b , c , c ] {- DP (Top 3) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , b , c , c , a , b , c , c ] {- DP (Top 4) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [a#, b, c, c] {- DP (Top 9) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , b , c , c , a , b , c , c ] {- DP (Top 5) (Input 0) -} reason EDG property Termination has value Just True for SRS [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , a , a , a , b , c , c , a , b , c , c ] {- DP (Top 0) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , b , c , c , a , b , c , c ] {- DP (Top 5) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [a#, b, c, c] {- DP (Top 9) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , b , c , c , a , b , c , c ] {- DP (Top 4) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , b , c , c , a , b , c , c ] {- DP (Top 3) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , a , b , c , c , a , b , c , c ] {- DP (Top 2) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [ a# , a , a , a , a , b , c , c , a , b , c , c ] {- DP (Top 1) (Input 0) -} [a, b, c, c, a, a, a, a, a] ->= [ a , a , a , a , a , a , b , c , c , a , b , c , c ] {- DP Nontop (Input 0) -} reason ( a , Wk / 0A 0A \ \ -2A -2A / ) ( b , Wk / 0A 0A \ \ 0A 0A / ) ( c , Wk / 0A 0A \ \ -2A 0A / ) ( a# , Wk / 7A 9A \ \ 7A 9A / ) property Termination has value Just True for SRS [a#, b, c, c, a, a, a, a, a] |-> [ a# , b , c , c , a , b , c , c ] {- DP (Top 5) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [a#, b, c, c] {- DP (Top 9) (Input 0) -} [a, b, c, c, a, a, a, a, a] ->= [ a , a , a , a , a , a , b , c , c , a , b , c , c ] {- DP Nontop (Input 0) -} reason EDG property Termination has value Just True for SRS [a#, b, c, c, a, a, a, a, a] |-> [ a# , b , c , c , a , b , c , c ] {- DP (Top 5) (Input 0) -} [a#, b, c, c, a, a, a, a, a] |-> [a#, b, c, c] {- DP (Top 9) (Input 0) -} [a, b, c, c, a, a, a, a, a] ->= [ a , a , a , a , a , a , b , c , c , a , b , c , c ] {- DP Nontop (Input 0) -} reason ( a , Wk / 0A 0A 0A 0A 6A 6A \ | 0A 0A 0A 0A 0A 6A | | -6A 0A 0A 0A 0A 0A | | -6A -6A 0A 0A 0A 0A | | -6A -6A -6A 0A 0A 0A | \ -6A -6A -6A -6A 0A 0A / ) ( b , Wk / 0A 0A 0A 0A 6A 6A \ | -6A -6A -6A 0A 0A 0A | | -6A -6A -6A 0A 0A 0A | | -6A -6A -6A -6A 0A 0A | | -6A -6A -6A -6A 0A 0A | \ -6A -6A -6A -6A 0A 0A / ) ( c , Wk / 0A 0A 0A 0A 0A 6A \ | 0A 0A 0A 0A 0A 6A | | -6A 0A 0A 0A 0A 0A | | -6A -6A -6A 0A 0A 0A | | -6A -6A -6A -6A -6A 0A | \ -6A -6A -6A -6A -6A 0A / ) ( a# popout

output may be truncated. 'popout' for the full output.

job log

popout

actions

all output return to SRS Standard