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SRS Standard pair #516977943
details
property
value
status
complete
benchmark
caabccaabc-aabccaabcaabcc.srs.xml
ran by
Akihisa Yamada
cpu timeout
1200 seconds
wallclock timeout
300 seconds
memory limit
137438953472 bytes
execution host
n168.star.cs.uiowa.edu
space
Wenzel_16
run statistics
property
value
solver
matchbox-2021-06-18b
configuration
tc21-9.sh
runtime (wallclock)
66.4799849987 seconds
cpu usage
244.208450444
max memory
2.733248512E9
stage attributes
key
value
output-size
114081
starexec-result
YES
output
/export/starexec/sandbox/solver/bin/starexec_run_tc21-9.sh /export/starexec/sandbox/benchmark/theBenchmark.xml /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES ************************************************** summary ************************************************** SRS with 1 rules on 3 letters mirror SRS with 1 rules on 3 letters DP SRS with 5 strict rules and 1 weak rules on 4 letters EDG SRS with 5 strict rules and 1 weak rules on 4 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 3, encoding = FBV, dim = 2, solver = Minisatapi, verbose = False, tracing = False} SRS with 3 strict rules and 1 weak rules on 4 letters EDG SRS with 3 strict rules and 1 weak rules on 4 letters Matrix { monotone = Weak, domain = Arctic, shape = Full, bits = 4, encoding = Ersatz_Binary, dim = 6, solver = Minisatapi, verbose = True, tracing = False} SRS with 0 strict rules and 1 weak rules on 3 letters EDG ************************************************** proof ************************************************** property Termination has value Just True for SRS [c, a, a, b, c, c, a, a, b, c] -> [ a , a , b , c , c , a , a , b , c , a , a , b , c , c ] {- Input 0 -} reason mirror property Termination has value Just True for SRS [c, b, a, a, c, c, b, a, a, c] -> [ c , c , b , a , a , c , b , a , a , c , c , b , a , a ] {- Mirror (Input 0) -} reason DP property Termination has value Just True for SRS [c, b, a, a, c, c, b, a, a, c] ->= [ c , c , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP Nontop (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , c , b , a , a ] {- DP (Top 9) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , c , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP (Top 0) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a ] {- DP (Top 10) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , c , b , a , a ] {- DP (Top 5) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP (Top 1) (Mirror (Input 0)) -} reason EDG property Termination has value Just True for SRS [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , c , b , a , a ] {- DP (Top 9) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP (Top 1) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , c , b , a , a ] {- DP (Top 5) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a ] {- DP (Top 10) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , c , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP (Top 0) (Mirror (Input 0)) -} [c, b, a, a, c, c, b, a, a, c] ->= [ c , c , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP Nontop (Mirror (Input 0)) -} reason ( c , Wk / 0A 0A \ \ -2A -2A / ) ( b , Wk / 0A 0A \ \ -2A 0A / ) ( a , Wk / 0A 0A \ \ 0A 0A / ) ( c# , Wk / 5A 6A \ \ 5A 6A / ) property Termination has value Just True for SRS [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP (Top 1) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , c , b , a , a ] {- DP (Top 5) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a ] {- DP (Top 10) (Mirror (Input 0)) -} [c, b, a, a, c, c, b, a, a, c] ->= [ c , c , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP Nontop (Mirror (Input 0)) -} reason EDG property Termination has value Just True for SRS [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP (Top 1) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a ] {- DP (Top 10) (Mirror (Input 0)) -} [c#, b, a, a, c, c, b, a, a, c] |-> [ c# , b , a , a , c , c , b , a , a ] {- DP (Top 5) (Mirror (Input 0)) -} [c, b, a, a, c, c, b, a, a, c] ->= [ c , c , b , a , a , c , b , a , a , c , c , b , a , a ] {- DP Nontop (Mirror (Input 0)) -} reason ( c , Wk / 1A - 0A 0A - 2A \ | - 0A 0A - 1A - | | - - 0A - - 1A | | - 0A - 0A - - | | 1A - 0A 0A - 2A | \ - - - - - 0A / ) ( b , Wk / - - - - - 1A \ | - 0A - - - - | | - 0A 0A - - - | | - - - - - - | | 0A - - - - - | \ - - - - - 0A / ) ( a , Wk / 0A - - - - - \ | - - - - 0A - |
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