details

property	value
status	complete
benchmark	MYNAT_complete-noand.xml
ran by	Akihisa Yamada
cpu timeout	1200 seconds
wallclock timeout	300 seconds
memory limit	137438953472 bytes
execution host	n086.star.cs.uiowa.edu
space	Maude_06

run statistics

property	value
solver	AProVE21
configuration	standard
runtime (wallclock)	2.59586691856 seconds
cpu usage	7.623996721
max memory	6.21232128E8

stage attributes

key	value
output-size	37680
starexec-result	YES

output

/export/starexec/sandbox2/solver/bin/starexec_run_standard /export/starexec/sandbox2/benchmark/theBenchmark.xml /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox2/benchmark/theBenchmark.xml # AProVE Commit ID: c69e44bd14796315568835c1ffa2502984884775 mhark 20210624 unpublished Termination of the given CSR could be proven: (0) CSR (1) CSDependencyPairsProof [EQUIVALENT, 108 ms] (2) QCSDP (3) QCSDependencyGraphProof [EQUIVALENT, 0 ms] (4) AND (5) QCSDP (6) QCSDPSubtermProof [EQUIVALENT, 0 ms] (7) QCSDP (8) QCSDependencyGraphProof [EQUIVALENT, 0 ms] (9) TRUE (10) QCSDP (11) QCSUsableRulesProof [EQUIVALENT, 6 ms] (12) QCSDP (13) QCSDPMuMonotonicPoloProof [EQUIVALENT, 59 ms] (14) QCSDP (15) QCSDependencyGraphProof [EQUIVALENT, 0 ms] (16) TRUE (17) QCSDP (18) QCSDPSubtermProof [EQUIVALENT, 0 ms] (19) QCSDP (20) QCSDependencyGraphProof [EQUIVALENT, 0 ms] (21) TRUE (22) QCSDP (23) QCSDPSubtermProof [EQUIVALENT, 0 ms] (24) QCSDP (25) QCSDependencyGraphProof [EQUIVALENT, 0 ms] (26) TRUE ---------------------------------------- (0) Obligation: Context-sensitive rewrite system: The TRS R consists of the following rules: U101(tt, M, N) -> U102(isNatKind(M), M, N) U102(tt, M, N) -> U103(isNat(N), M, N) U103(tt, M, N) -> U104(isNatKind(N), M, N) U104(tt, M, N) -> plus(x(N, M), N) U11(tt, V1, V2) -> U12(isNatKind(V1), V1, V2) U12(tt, V1, V2) -> U13(isNatKind(V2), V1, V2) U13(tt, V1, V2) -> U14(isNatKind(V2), V1, V2) U14(tt, V1, V2) -> U15(isNat(V1), V2) U15(tt, V2) -> U16(isNat(V2)) U16(tt) -> tt U21(tt, V1) -> U22(isNatKind(V1), V1) U22(tt, V1) -> U23(isNat(V1)) U23(tt) -> tt U31(tt, V1, V2) -> U32(isNatKind(V1), V1, V2) U32(tt, V1, V2) -> U33(isNatKind(V2), V1, V2) U33(tt, V1, V2) -> U34(isNatKind(V2), V1, V2) U34(tt, V1, V2) -> U35(isNat(V1), V2) U35(tt, V2) -> U36(isNat(V2)) U36(tt) -> tt U41(tt, V2) -> U42(isNatKind(V2)) U42(tt) -> tt U51(tt) -> tt U61(tt, V2) -> U62(isNatKind(V2)) U62(tt) -> tt U71(tt, N) -> U72(isNatKind(N), N) U72(tt, N) -> N U81(tt, M, N) -> U82(isNatKind(M), M, N) U82(tt, M, N) -> U83(isNat(N), M, N) U83(tt, M, N) -> U84(isNatKind(N), M, N) U84(tt, M, N) -> s(plus(N, M)) U91(tt, N) -> U92(isNatKind(N)) U92(tt) -> 0 isNat(0) -> tt isNat(plus(V1, V2)) -> U11(isNatKind(V1), V1, V2) isNat(s(V1)) -> U21(isNatKind(V1), V1) isNat(x(V1, V2)) -> U31(isNatKind(V1), V1, V2) isNatKind(0) -> tt isNatKind(plus(V1, V2)) -> U41(isNatKind(V1), V2) isNatKind(s(V1)) -> U51(isNatKind(V1)) isNatKind(x(V1, V2)) -> U61(isNatKind(V1), V2) plus(N, 0) -> U71(isNat(N), N) plus(N, s(M)) -> U81(isNat(M), M, N) x(N, 0) -> U91(isNat(N), N) x(N, s(M)) -> U101(isNat(M), M, N) The replacement map contains the following entries: U101: {1} tt: empty set U102: {1} isNatKind: empty set popout

output may be truncated. 'popout' for the full output.

job log

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actions

all output return to TRS Context Sensitive