/export/starexec/sandbox/solver/bin/starexec_run_c /export/starexec/sandbox/benchmark/theBenchmark.c /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.c # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 178 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 10.2 s] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 4 ms] (6) LLVM Symbolic Execution SCC (7) SCC2IRS [SOUND, 152 ms] (8) IntTRS (9) IntTRSCompressionProof [EQUIVALENT, 0 ms] (10) IntTRS (11) RankingReductionPairProof [EQUIVALENT, 29 ms] (12) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "cstrcmp" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (s1 *i8, s2 *i8) variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %2 = alloca *i8, align 8 %3 = alloca *i8, align 8 store %s1, %2 store %s2, %3 br %4 4: %5 = load %2 %6 = load %5 %7 = sext i8 %6 to i32 %8 = load %3 %9 = getelementptr %8, 1 store %9, %3 %10 = load %8 %11 = sext i8 %10 to i32 %12 = icmp eq %7 %11 br %12, %13, %21 13: %14 = load %2 %15 = getelementptr %14, 1 store %15, %2 %16 = load %14 %17 = sext i8 %16 to i32 %18 = icmp eq %17 0 br %18, %19, %20 19: store 0, %1 br %30 20: br %4 21: %22 = load %2 %23 = load %22 %24 = zext i8 %23 to i32 %25 = load %3 %26 = getelementptr %25, -1 store %26, %3 %27 = load %26 %28 = zext i8 %27 to i32 %29 = sub %24 %28 store %29, %1 br %30 30: %31 = load %1 ret %31 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %length1 = alloca i32, align 4 %length2 = alloca i32, align 4 %nondetString1 = alloca *i8, align 8 %nondetString2 = alloca *i8, align 8 store 0, %1 %2 = call i32 @__VERIFIER_nondet_int() store %2, %length1 %3 = call i32 @__VERIFIER_nondet_int() store %3, %length2 %4 = load %length1 %5 = icmp slt %4 1 br %5, %6, %7 6: store 1, %length1 br %7 7: %8 = load %length2 %9 = icmp slt %8 1 br %9, %10, %11 10: store 1, %length2 br %11 11: %12 = load %length1 %13 = sext i32 %12 to i64 %14 = mul %13 1 %15 = alloca i8, numElementsLit: %14 store %15, %nondetString1 %16 = load %length2 %17 = sext i32 %16 to i64 %18 = mul %17 1 %19 = alloca i8, numElementsLit: %18 store %19, %nondetString2 %20 = load %length1 %21 = sub %20 1 %22 = sext i32 %21 to i64 %23 = load %nondetString1 %24 = getelementptr %23, %22 store 0, %24 %25 = load %length2 %26 = sub %25 1 %27 = sext i32 %26 to i64 %28 = load %nondetString2 %29 = getelementptr %28, %27 store 0, %29 %30 = load %nondetString1 %31 = load %nondetString2 %32 = call i32 @cstrcmp(*i8 %30, *i8 %31) ret %32 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 1 SCC. ---------------------------------------- (6) Obligation: SCC ---------------------------------------- (7) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 21 rulesP rules: f_677(v978, v979, v980, v981, v982, v988, v984, v985, v986, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_678(v978, v979, v980, v981, v982, v988, v1013, v984, v985, v986, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_678(v978, v979, v980, v981, v982, v988, v1013, v984, v985, v986, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_679(v978, v979, v980, v981, v982, v988, v1013, v985, v986, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_679(v978, v979, v980, v981, v982, v988, v1013, v985, v986, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_680(v978, v979, v980, v981, v982, v988, v1013, v986, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_680(v978, v979, v980, v981, v982, v988, v1013, v986, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_681(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: v1015 = 1 + v986 && 4 <= v1015 f_681(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_682(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_682(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_683(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v1017, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_683(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v1017, v984, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_684(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v1017, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_684(v978, v979, v980, v981, v982, v988, v1013, v986, v1015, v1017, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_685(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: v1013 = v1017 f_685(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_687(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_687(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_689(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_689(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v983, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_691(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_691(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_693(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: v1072 = 1 + v988 && 4 <= v1072 f_693(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_695(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_695(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_697(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_697(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, v984, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_699(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_699(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_702(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: v1017 != 0 && v988 < v998 && v986 < v1000 && 4 <= v998 && 4 <= v1000 f_702(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_705(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 f_705(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_708(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_708(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_711(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_711(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v983, v984, v985, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_676(v978, v979, v980, v981, v982, v988, v1017, v986, v1015, 1, v1072, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: TRUE f_676(v978, v979, v980, v981, v982, v983, v984, v985, v986, 1, v988, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) -> f_677(v978, v979, v980, v981, v982, v988, v984, v985, v986, 1, v983, 0, v990, v1001, v991, v1002, v992, v1003, v993, v1004, v994, v1005, v998, v1000, v1006, v1007, v1008, v1011, v995, v996, v1009, v1012, v1010, v997, v999, 3, 7, 2, 4, 8) :|: 0 = 0 Combined rules. Obtained 2 rulesP rules: f_677(v978:0, v979:0, v980:0, v981:0, v982:0, v988:0, v984:0, v985:0, v986:0, 1, v983:0, 0, v990:0, v1001:0, v991:0, v1002:0, v992:0, v1003:0, v993:0, v1004:0, v994:0, v1005:0, v998:0, v1000:0, v1006:0, v1007:0, v1008:0, v1011:0, v995:0, v996:0, v1009:0, v1012:0, v1010:0, v997:0, v999:0, 3, 7, 2, 4, 8) -> f_677(v978:0, v979:0, v980:0, v981:0, v982:0, 1 + v988:0, v1013:0, v986:0, 1 + v986:0, 1, v988:0, 0, v990:0, v1001:0, v991:0, v1002:0, v992:0, v1003:0, v993:0, v1004:0, v994:0, v1005:0, v998:0, v1000:0, v1006:0, v1007:0, v1008:0, v1011:0, v995:0, v996:0, v1009:0, v1012:0, v1010:0, v997:0, v999:0, 3, 7, 2, 4, 8) :|: v986:0 > 2 && v988:0 > 2 && v998:0 > v988:0 && v1013:0 < 0 && v986:0 < v1000:0 && v1000:0 > 3 && v998:0 > 3 f_677(v978:0, v979:0, v980:0, v981:0, v982:0, v988:0, v984:0, v985:0, v986:0, 1, v983:0, 0, v990:0, v1001:0, v991:0, v1002:0, v992:0, v1003:0, v993:0, v1004:0, v994:0, v1005:0, v998:0, v1000:0, v1006:0, v1007:0, v1008:0, v1011:0, v995:0, v996:0, v1009:0, v1012:0, v1010:0, v997:0, v999:0, 3, 7, 2, 4, 8) -> f_677(v978:0, v979:0, v980:0, v981:0, v982:0, 1 + v988:0, v1013:0, v986:0, 1 + v986:0, 1, v988:0, 0, v990:0, v1001:0, v991:0, v1002:0, v992:0, v1003:0, v993:0, v1004:0, v994:0, v1005:0, v998:0, v1000:0, v1006:0, v1007:0, v1008:0, v1011:0, v995:0, v996:0, v1009:0, v1012:0, v1010:0, v997:0, v999:0, 3, 7, 2, 4, 8) :|: v986:0 > 2 && v988:0 > 2 && v998:0 > v988:0 && v1013:0 > 0 && v986:0 < v1000:0 && v1000:0 > 3 && v998:0 > 3 Filtered unneeded arguments: f_677(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33, x34, x35, x36, x37, x38, x39, x40) -> f_677(x6, x9, x23, x24) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_677(v988:0, v986:0, v998:0, v1000:0) -> f_677(1 + v988:0, 1 + v986:0, v998:0, v1000:0) :|: v988:0 > 2 && v986:0 > 2 && v998:0 > v988:0 && v986:0 < v1000:0 && v998:0 > 3 && v1000:0 > 3 ---------------------------------------- (8) Obligation: Rules: f_677(v988:0, v986:0, v998:0, v1000:0) -> f_677(1 + v988:0, 1 + v986:0, v998:0, v1000:0) :|: v988:0 > 2 && v986:0 > 2 && v998:0 > v988:0 && v986:0 < v1000:0 && v998:0 > 3 && v1000:0 > 3 ---------------------------------------- (9) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (10) Obligation: Rules: f_677(v988:0:0, v986:0:0, v998:0:0, v1000:0:0) -> f_677(1 + v988:0:0, 1 + v986:0:0, v998:0:0, v1000:0:0) :|: v998:0:0 > 3 && v1000:0:0 > 3 && v986:0:0 < v1000:0:0 && v998:0:0 > v988:0:0 && v986:0:0 > 2 && v988:0:0 > 2 ---------------------------------------- (11) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_677 ] = f_677_3 + -1*f_677_1 The following rules are decreasing: f_677(v988:0:0, v986:0:0, v998:0:0, v1000:0:0) -> f_677(1 + v988:0:0, 1 + v986:0:0, v998:0:0, v1000:0:0) :|: v998:0:0 > 3 && v1000:0:0 > 3 && v986:0:0 < v1000:0:0 && v998:0:0 > v988:0:0 && v986:0:0 > 2 && v988:0:0 > 2 The following rules are bounded: f_677(v988:0:0, v986:0:0, v998:0:0, v1000:0:0) -> f_677(1 + v988:0:0, 1 + v986:0:0, v998:0:0, v1000:0:0) :|: v998:0:0 > 3 && v1000:0:0 > 3 && v986:0:0 < v1000:0:0 && v998:0:0 > v988:0:0 && v986:0:0 > 2 && v988:0:0 > 2 ---------------------------------------- (12) YES