/export/starexec/sandbox/solver/bin/starexec_run_c /export/starexec/sandbox/benchmark/theBenchmark.c /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.c # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 180 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 1710 ms] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] (6) LLVM Symbolic Execution SCC (7) SCC2IRS [SOUND, 15 ms] (8) IntTRS (9) IntTRSCompressionProof [EQUIVALENT, 0 ms] (10) IntTRS (11) PolynomialOrderProcessor [EQUIVALENT, 18 ms] (12) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "test_fun" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (x i32, y i32, z i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 %4 = alloca i32, align 4 %x_ref = alloca *i32, align 8 %y_ref = alloca *i32, align 8 %z_ref = alloca *i32, align 8 store %x, %2 store %y, %3 store %z, %4 %5 = alloca i8, numElementsLit: 4 %6 = bitcast *i8 %5 to *i32 store %6, %x_ref %7 = alloca i8, numElementsLit: 4 %8 = bitcast *i8 %7 to *i32 store %8, %y_ref %9 = alloca i8, numElementsLit: 4 %10 = bitcast *i8 %9 to *i32 store %10, %z_ref %11 = load %2 %12 = load %x_ref store %11, %12 %13 = load %3 %14 = load %y_ref store %13, %14 %15 = load %4 %16 = load %z_ref store %15, %16 %17 = load %y_ref %18 = load %17 %19 = icmp sle %18 0 br %19, %20, %23 20: %21 = load %z_ref %22 = load %21 store %22, %1 br %47 23: br %24 24: %25 = load %x_ref %26 = load %25 %27 = load %z_ref %28 = load %27 %29 = icmp sge %26 %28 br %29, %30, %44 30: %31 = load %y_ref %32 = load %31 %33 = icmp sle %32 0 br %33, %34, %37 34: %35 = load %z_ref %36 = load %35 store %36, %1 br %47 37: %38 = load %z_ref %39 = load %38 %40 = load %y_ref %41 = load %40 %42 = add %39 %41 %43 = load %z_ref store %42, %43 br %24 44: %45 = load %z_ref %46 = load %45 store %46, %1 br %47 47: %48 = load %1 ret %48 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 store 0, %1 %2 = call i32 @__VERIFIER_nondet_int() %3 = call i32 @__VERIFIER_nondet_int() %4 = call i32 @__VERIFIER_nondet_int() %5 = call i32 @test_fun(i32 %2, i32 %3, i32 %4) ret %5 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 1 SCC. ---------------------------------------- (6) Obligation: SCC ---------------------------------------- (7) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 20 rulesP rules: f_327(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v71, 1, v73, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_328(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v71, 1, v73, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_328(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v71, 1, v73, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_329(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v71, 1, v73, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_329(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v71, 1, v73, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_330(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_330(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_331(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: v73 <= v57 f_331(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_333(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_333(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_335(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: TRUE f_335(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_337(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_337(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_339(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_339(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_341(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_341(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_343(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: TRUE f_343(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_345(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_345(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v71, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_347(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_347(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_349(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_349(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_350(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_350(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_351(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: v102 = v73 + v58 f_351(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_352(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 f_352(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_353(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: TRUE f_353(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_354(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: TRUE f_354(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_326(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v73, 1, v102, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: v59 <= v57 && v73 <= v57 && 1 <= v58 && 1 <= v60 && 1 <= v61 && 1 <= v62 && 1 <= v63 && 1 <= v64 && 1 <= v65 && 1 <= v66 && 1 <= v67 && 1 <= v68 && 1 <= v69 && 1 <= v74 && 4 <= v75 && 4 <= v76 && 4 <= v77 && 4 <= v78 && 4 <= v79 && 8 <= v80 && 8 <= v81 && 8 <= v82 && 4 <= v83 && 4 <= v84 && 4 <= v85 && v74 <= v75 && v60 <= v76 && v61 <= v77 && v62 <= v78 && v63 <= v79 && v64 <= v80 && v65 <= v81 && v66 <= v82 && v67 <= v83 && v68 <= v84 && v69 <= v85 f_326(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v71, 1, v73, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) -> f_327(v57, v58, v59, v60, v61, v62, v63, v64, v65, v66, v67, v68, v69, 0, v71, 1, v73, v74, v75, v76, v77, v78, v79, v80, v81, v82, v83, v84, v85, 3, 7, 4, 8) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_327(v57:0, v58:0, v59:0, v60:0, v61:0, v62:0, v63:0, v64:0, v65:0, v66:0, v67:0, v68:0, v69:0, 0, v71:0, 1, v73:0, v74:0, v75:0, v76:0, v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, v85:0, 3, 7, 4, 8) -> f_327(v57:0, v58:0, v59:0, v60:0, v61:0, v62:0, v63:0, v64:0, v65:0, v66:0, v67:0, v68:0, v69:0, 0, v73:0, 1, v73:0 + v58:0, v74:0, v75:0, v76:0, v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, v85:0, 3, 7, 4, 8) :|: v73:0 <= v57:0 && v59:0 <= v57:0 && v58:0 > 0 && v60:0 > 0 && v61:0 > 0 && v62:0 > 0 && v63:0 > 0 && v64:0 > 0 && v65:0 > 0 && v66:0 > 0 && v67:0 > 0 && v68:0 > 0 && v69:0 > 0 && v74:0 > 0 && v75:0 > 3 && v76:0 > 3 && v77:0 > 3 && v78:0 > 3 && v79:0 > 3 && v80:0 > 7 && v81:0 > 7 && v82:0 > 7 && v83:0 > 3 && v84:0 > 3 && v85:0 > 3 && v75:0 >= v74:0 && v76:0 >= v60:0 && v77:0 >= v61:0 && v78:0 >= v62:0 && v79:0 >= v63:0 && v80:0 >= v64:0 && v81:0 >= v65:0 && v82:0 >= v66:0 && v83:0 >= v67:0 && v85:0 >= v69:0 && v84:0 >= v68:0 Filtered unneeded arguments: f_327(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33) -> f_327(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_327(v57:0, v58:0, v59:0, v60:0, v61:0, v62:0, v63:0, v64:0, v65:0, v66:0, v67:0, v68:0, v69:0, v73:0, v74:0, v75:0, v76:0, v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, v85:0) -> f_327(v57:0, v58:0, v59:0, v60:0, v61:0, v62:0, v63:0, v64:0, v65:0, v66:0, v67:0, v68:0, v69:0, v73:0 + v58:0, v74:0, v75:0, v76:0, v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, v85:0) :|: v59:0 <= v57:0 && v73:0 <= v57:0 && v58:0 > 0 && v60:0 > 0 && v61:0 > 0 && v62:0 > 0 && v63:0 > 0 && v64:0 > 0 && v65:0 > 0 && v66:0 > 0 && v67:0 > 0 && v68:0 > 0 && v69:0 > 0 && v74:0 > 0 && v75:0 > 3 && v76:0 > 3 && v77:0 > 3 && v78:0 > 3 && v79:0 > 3 && v80:0 > 7 && v81:0 > 7 && v82:0 > 7 && v83:0 > 3 && v84:0 > 3 && v85:0 > 3 && v75:0 >= v74:0 && v76:0 >= v60:0 && v77:0 >= v61:0 && v78:0 >= v62:0 && v79:0 >= v63:0 && v80:0 >= v64:0 && v81:0 >= v65:0 && v82:0 >= v66:0 && v83:0 >= v67:0 && v84:0 >= v68:0 && v85:0 >= v69:0 ---------------------------------------- (8) Obligation: Rules: f_327(v57:0, v58:0, v59:0, v60:0, v61:0, v62:0, v63:0, v64:0, v65:0, v66:0, v67:0, v68:0, v69:0, v73:0, v74:0, v75:0, v76:0, v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, v85:0) -> f_327(v57:0, v58:0, v59:0, v60:0, v61:0, v62:0, v63:0, v64:0, v65:0, v66:0, v67:0, v68:0, v69:0, v73:0 + v58:0, v74:0, v75:0, v76:0, v77:0, v78:0, v79:0, v80:0, v81:0, v82:0, v83:0, v84:0, v85:0) :|: v59:0 <= v57:0 && v73:0 <= v57:0 && v58:0 > 0 && v60:0 > 0 && v61:0 > 0 && v62:0 > 0 && v63:0 > 0 && v64:0 > 0 && v65:0 > 0 && v66:0 > 0 && v67:0 > 0 && v68:0 > 0 && v69:0 > 0 && v74:0 > 0 && v75:0 > 3 && v76:0 > 3 && v77:0 > 3 && v78:0 > 3 && v79:0 > 3 && v80:0 > 7 && v81:0 > 7 && v82:0 > 7 && v83:0 > 3 && v84:0 > 3 && v85:0 > 3 && v75:0 >= v74:0 && v76:0 >= v60:0 && v77:0 >= v61:0 && v78:0 >= v62:0 && v79:0 >= v63:0 && v80:0 >= v64:0 && v81:0 >= v65:0 && v82:0 >= v66:0 && v83:0 >= v67:0 && v84:0 >= v68:0 && v85:0 >= v69:0 ---------------------------------------- (9) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (10) Obligation: Rules: f_327(v57:0:0, v58:0:0, v59:0:0, v60:0:0, v61:0:0, v62:0:0, v63:0:0, v64:0:0, v65:0:0, v66:0:0, v67:0:0, v68:0:0, v69:0:0, v73:0:0, v74:0:0, v75:0:0, v76:0:0, v77:0:0, v78:0:0, v79:0:0, v80:0:0, v81:0:0, v82:0:0, v83:0:0, v84:0:0, v85:0:0) -> f_327(v57:0:0, v58:0:0, v59:0:0, v60:0:0, v61:0:0, v62:0:0, v63:0:0, v64:0:0, v65:0:0, v66:0:0, v67:0:0, v68:0:0, v69:0:0, v73:0:0 + v58:0:0, v74:0:0, v75:0:0, v76:0:0, v77:0:0, v78:0:0, v79:0:0, v80:0:0, v81:0:0, v82:0:0, v83:0:0, v84:0:0, v85:0:0) :|: v84:0:0 >= v68:0:0 && v85:0:0 >= v69:0:0 && v83:0:0 >= v67:0:0 && v82:0:0 >= v66:0:0 && v81:0:0 >= v65:0:0 && v80:0:0 >= v64:0:0 && v79:0:0 >= v63:0:0 && v78:0:0 >= v62:0:0 && v77:0:0 >= v61:0:0 && v76:0:0 >= v60:0:0 && v75:0:0 >= v74:0:0 && v85:0:0 > 3 && v84:0:0 > 3 && v83:0:0 > 3 && v82:0:0 > 7 && v81:0:0 > 7 && v80:0:0 > 7 && v79:0:0 > 3 && v78:0:0 > 3 && v77:0:0 > 3 && v76:0:0 > 3 && v75:0:0 > 3 && v74:0:0 > 0 && v69:0:0 > 0 && v68:0:0 > 0 && v67:0:0 > 0 && v66:0:0 > 0 && v65:0:0 > 0 && v64:0:0 > 0 && v63:0:0 > 0 && v62:0:0 > 0 && v61:0:0 > 0 && v60:0:0 > 0 && v58:0:0 > 0 && v73:0:0 <= v57:0:0 && v59:0:0 <= v57:0:0 ---------------------------------------- (11) PolynomialOrderProcessor (EQUIVALENT) Found the following polynomial interpretation: [f_327(x, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25)] = x - x13 The following rules are decreasing: f_327(v57:0:0, v58:0:0, v59:0:0, v60:0:0, v61:0:0, v62:0:0, v63:0:0, v64:0:0, v65:0:0, v66:0:0, v67:0:0, v68:0:0, v69:0:0, v73:0:0, v74:0:0, v75:0:0, v76:0:0, v77:0:0, v78:0:0, v79:0:0, v80:0:0, v81:0:0, v82:0:0, v83:0:0, v84:0:0, v85:0:0) -> f_327(v57:0:0, v58:0:0, v59:0:0, v60:0:0, v61:0:0, v62:0:0, v63:0:0, v64:0:0, v65:0:0, v66:0:0, v67:0:0, v68:0:0, v69:0:0, v73:0:0 + v58:0:0, v74:0:0, v75:0:0, v76:0:0, v77:0:0, v78:0:0, v79:0:0, v80:0:0, v81:0:0, v82:0:0, v83:0:0, v84:0:0, v85:0:0) :|: v84:0:0 >= v68:0:0 && v85:0:0 >= v69:0:0 && v83:0:0 >= v67:0:0 && v82:0:0 >= v66:0:0 && v81:0:0 >= v65:0:0 && v80:0:0 >= v64:0:0 && v79:0:0 >= v63:0:0 && v78:0:0 >= v62:0:0 && v77:0:0 >= v61:0:0 && v76:0:0 >= v60:0:0 && v75:0:0 >= v74:0:0 && v85:0:0 > 3 && v84:0:0 > 3 && v83:0:0 > 3 && v82:0:0 > 7 && v81:0:0 > 7 && v80:0:0 > 7 && v79:0:0 > 3 && v78:0:0 > 3 && v77:0:0 > 3 && v76:0:0 > 3 && v75:0:0 > 3 && v74:0:0 > 0 && v69:0:0 > 0 && v68:0:0 > 0 && v67:0:0 > 0 && v66:0:0 > 0 && v65:0:0 > 0 && v64:0:0 > 0 && v63:0:0 > 0 && v62:0:0 > 0 && v61:0:0 > 0 && v60:0:0 > 0 && v58:0:0 > 0 && v73:0:0 <= v57:0:0 && v59:0:0 <= v57:0:0 The following rules are bounded: f_327(v57:0:0, v58:0:0, v59:0:0, v60:0:0, v61:0:0, v62:0:0, v63:0:0, v64:0:0, v65:0:0, v66:0:0, v67:0:0, v68:0:0, v69:0:0, v73:0:0, v74:0:0, v75:0:0, v76:0:0, v77:0:0, v78:0:0, v79:0:0, v80:0:0, v81:0:0, v82:0:0, v83:0:0, v84:0:0, v85:0:0) -> f_327(v57:0:0, v58:0:0, v59:0:0, v60:0:0, v61:0:0, v62:0:0, v63:0:0, v64:0:0, v65:0:0, v66:0:0, v67:0:0, v68:0:0, v69:0:0, v73:0:0 + v58:0:0, v74:0:0, v75:0:0, v76:0:0, v77:0:0, v78:0:0, v79:0:0, v80:0:0, v81:0:0, v82:0:0, v83:0:0, v84:0:0, v85:0:0) :|: v84:0:0 >= v68:0:0 && v85:0:0 >= v69:0:0 && v83:0:0 >= v67:0:0 && v82:0:0 >= v66:0:0 && v81:0:0 >= v65:0:0 && v80:0:0 >= v64:0:0 && v79:0:0 >= v63:0:0 && v78:0:0 >= v62:0:0 && v77:0:0 >= v61:0:0 && v76:0:0 >= v60:0:0 && v75:0:0 >= v74:0:0 && v85:0:0 > 3 && v84:0:0 > 3 && v83:0:0 > 3 && v82:0:0 > 7 && v81:0:0 > 7 && v80:0:0 > 7 && v79:0:0 > 3 && v78:0:0 > 3 && v77:0:0 > 3 && v76:0:0 > 3 && v75:0:0 > 3 && v74:0:0 > 0 && v69:0:0 > 0 && v68:0:0 > 0 && v67:0:0 > 0 && v66:0:0 > 0 && v65:0:0 > 0 && v64:0:0 > 0 && v63:0:0 > 0 && v62:0:0 > 0 && v61:0:0 > 0 && v60:0:0 > 0 && v58:0:0 > 0 && v73:0:0 <= v57:0:0 && v59:0:0 <= v57:0:0 ---------------------------------------- (12) YES