/export/starexec/sandbox/solver/bin/starexec_run_c /export/starexec/sandbox/benchmark/theBenchmark.c /export/starexec/sandbox/output/output_files -------------------------------------------------------------------------------- YES proof of /export/starexec/sandbox/benchmark/theBenchmark.c # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty Termination of the given C Problem could be proven: (0) C Problem (1) CToLLVMProof [EQUIVALENT, 154 ms] (2) LLVM problem (3) LLVMToTerminationGraphProof [EQUIVALENT, 5410 ms] (4) LLVM Symbolic Execution Graph (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] (6) AND (7) LLVM Symbolic Execution SCC (8) SCC2IRS [SOUND, 11 ms] (9) IntTRS (10) IntTRSCompressionProof [EQUIVALENT, 0 ms] (11) IntTRS (12) RankingReductionPairProof [EQUIVALENT, 0 ms] (13) YES (14) LLVM Symbolic Execution SCC (15) SCC2IRS [SOUND, 19 ms] (16) IntTRS (17) IntTRSCompressionProof [EQUIVALENT, 0 ms] (18) IntTRS (19) RankingReductionPairProof [EQUIVALENT, 0 ms] (20) YES ---------------------------------------- (0) Obligation: c file /export/starexec/sandbox/benchmark/theBenchmark.c ---------------------------------------- (1) CToLLVMProof (EQUIVALENT) Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. ---------------------------------------- (2) Obligation: LLVM Problem Aliases: Data layout: "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" Machine: "x86_64-pc-linux-gnu" Type definitions: Global variables: Function declarations and definitions: *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 0: %1 = alloca i32, align 4 %a = alloca i32, align 4 %b = alloca i32, align 4 %x = alloca i32, align 4 %y = alloca i32, align 4 store 0, %1 %2 = call i32 @__VERIFIER_nondet_int() store %2, %a %3 = call i32 @__VERIFIER_nondet_int() store %3, %b %4 = call i32 @__VERIFIER_nondet_int() store %4, %x %5 = call i32 @__VERIFIER_nondet_int() store %5, %y %6 = load %a %7 = load %b %8 = icmp eq %6 %7 br %8, %9, %32 9: br %10 10: %11 = load %x %12 = icmp sge %11 0 br %12, %16, %13 13: %14 = load %y %15 = icmp sge %14 0 br %16 16: %17 = phi [1, %10], [%15, %13] br %17, %18, %31 18: %19 = load %x %20 = load %a %21 = add %19 %20 %22 = load %b %23 = sub %21 %22 %24 = sub %23 1 store %24, %x %25 = load %y %26 = load %b %27 = add %25 %26 %28 = load %a %29 = sub %27 %28 %30 = sub %29 1 store %30, %y br %10 31: br %32 32: ret 0 Analyze Termination of all function calls matching the pattern: main() ---------------------------------------- (3) LLVMToTerminationGraphProof (EQUIVALENT) Constructed symbolic execution graph for LLVM program and proved memory safety. ---------------------------------------- (4) Obligation: SE Graph ---------------------------------------- (5) SymbolicExecutionGraphToSCCProof (SOUND) Splitted symbolic execution graph to 2 SCCs. ---------------------------------------- (6) Complex Obligation (AND) ---------------------------------------- (7) Obligation: SCC ---------------------------------------- (8) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 25 rulesP rules: f_414(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v966, v964, v967, v969, v970, v971, v972, v973, v974, v975, 3, 2, 4) -> f_415(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v966, v964, v967, v969, v970, v971, v972, v973, v974, v975, 3, 2, 4) :|: 0 = 0 f_415(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v966, v964, v967, v969, v970, v971, v972, v973, v974, v975, 3, 2, 4) -> f_416(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v966, v964, v967, v969, v970, v971, v972, v973, v974, v975, 3, 2, 4) :|: TRUE f_416(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v966, v964, v967, v969, v970, v971, v972, v973, v974, v975, 3, 2, 4) -> f_417(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) :|: 0 = 0 f_417(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) -> f_418(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) :|: 0 <= v970 && 1 <= v966 && 1 <= v962 f_418(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) -> f_420(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) :|: 0 = 0 f_420(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) -> f_422(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) :|: 0 = 0 f_422(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v970, v964, v967, v966, v969, v971, v972, v973, v974, v975, 3, 2, 4) -> f_423(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v964, v967, v966, v969, v970, v971, v972, v973, v974, v975, 3, 4) :|: TRUE f_423(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1037, v1038, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) -> f_425(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1037, v1038, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) :|: TRUE f_425(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1037, v1038, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) -> f_427(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1038, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) :|: 0 = 0 f_427(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1038, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) -> f_429(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1038, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) :|: 0 = 0 f_429(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1038, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) -> f_430(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) :|: v1119 = v1035 + v1031 f_430(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) -> f_431(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) :|: 0 = 0 f_431(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1037, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) -> f_432(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) :|: v1035 + v1031 = v1119 f_432(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4) -> f_433(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: 1 + v1120 = v1035 && 2 + v1120 <= 0 f_433(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_434(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: TRUE f_434(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1039, v1040, v1041, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_435(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1040, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: 0 = 0 f_435(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1040, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_436(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1040, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: 0 = 0 f_436(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1040, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_437(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: v1122 = v1041 + v1031 f_437(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_438(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: 0 = 0 f_438(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1039, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_439(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: v1041 + v1031 = v1122 f_439(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_440(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1123, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: 1 + v1123 = v1041 && 0 <= 1 + v1123 f_440(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1123, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_441(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1123, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: TRUE f_441(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1123, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_442(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1123, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) :|: TRUE f_442(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1119, v1120, v1041, v1122, v1123, v1042, v1043, v1044, v1045, v1046, 3, 4, 2) -> f_413(v1026, v1027, v1028, v1029, v1030, v1031, v1032, v1033, 1, v1035, 0, v1041, v1119, v1120, v1122, v1123, v1042, v1043, v1044, v1045, v1046, 3, 2, 4) :|: TRUE f_413(v955, v956, v957, v958, v959, v960, v961, v962, 1, v964, 0, v966, v967, v968, v969, v970, v971, v972, v973, v974, v975, 3, 2, 4) -> f_414(v955, v956, v957, v958, v959, v960, v961, v962, 1, v968, 0, v966, v964, v967, v969, v970, v971, v972, v973, v974, v975, 3, 2, 4) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_414(v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, 1, 1 + v1120:0, 0, v966:0, v964:0, v967:0, v969:0, 1 + v1123:0, v971:0, v972:0, v973:0, v974:0, v975:0, 3, 2, 4) -> f_414(v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, 1, v1120:0, 0, 1 + v1123:0, 1 + v1120:0, 1 + v1120:0 + v960:0, 1 + v1123:0 + v960:0, v1123:0, v971:0, v972:0, v973:0, v974:0, v975:0, 3, 2, 4) :|: v966:0 > 0 && v1123:0 > -2 && v962:0 > 0 && v1120:0 < -1 Filtered unneeded arguments: f_414(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24) -> f_414(x8, x10, x12, x16) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_414(v962:0, sum~cons_1~v1120:0, v966:0, sum~cons_1~v1123:0) -> f_414(v962:0, v1120:0, 1 + v1123:0, v1123:0) :|: v1123:0 > -2 && v966:0 > 0 && v1120:0 < -1 && v962:0 > 0 && sum~cons_1~v1120:0 = 1 + v1120:0 && sum~cons_1~v1123:0 = 1 + v1123:0 ---------------------------------------- (9) Obligation: Rules: f_414(v962:0, sum~cons_1~v1120:0, v966:0, sum~cons_1~v1123:0) -> f_414(v962:0, v1120:0, 1 + v1123:0, v1123:0) :|: v1123:0 > -2 && v966:0 > 0 && v1120:0 < -1 && v962:0 > 0 && sum~cons_1~v1120:0 = 1 + v1120:0 && sum~cons_1~v1123:0 = 1 + v1123:0 ---------------------------------------- (10) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (11) Obligation: Rules: f_414(v962:0:0, sum~cons_1~v1120:0:0, v966:0:0, sum~cons_1~v1123:0:0) -> f_414(v962:0:0, v1120:0:0, 1 + v1123:0:0, v1123:0:0) :|: v1120:0:0 < -1 && v962:0:0 > 0 && v966:0:0 > 0 && v1123:0:0 > -2 && sum~cons_1~v1120:0:0 = 1 + v1120:0:0 && sum~cons_1~v1123:0:0 = 1 + v1123:0:0 ---------------------------------------- (12) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_414 ] = f_414_4 The following rules are decreasing: f_414(v962:0:0, sum~cons_1~v1120:0:0, v966:0:0, sum~cons_1~v1123:0:0) -> f_414(v962:0:0, v1120:0:0, 1 + v1123:0:0, v1123:0:0) :|: v1120:0:0 < -1 && v962:0:0 > 0 && v966:0:0 > 0 && v1123:0:0 > -2 && sum~cons_1~v1120:0:0 = 1 + v1120:0:0 && sum~cons_1~v1123:0:0 = 1 + v1123:0:0 The following rules are bounded: f_414(v962:0:0, sum~cons_1~v1120:0:0, v966:0:0, sum~cons_1~v1123:0:0) -> f_414(v962:0:0, v1120:0:0, 1 + v1123:0:0, v1123:0:0) :|: v1120:0:0 < -1 && v962:0:0 > 0 && v966:0:0 > 0 && v1123:0:0 > -2 && sum~cons_1~v1120:0:0 = 1 + v1120:0:0 && sum~cons_1~v1123:0:0 = 1 + v1123:0:0 ---------------------------------------- (13) YES ---------------------------------------- (14) Obligation: SCC ---------------------------------------- (15) SCC2IRS (SOUND) Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: Generated rules. Obtained 21 rulesP rules: f_336(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_338(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 <= v596 && 1 <= v594 && 1 <= v591 f_338(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_341(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_341(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_344(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_344(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_347(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: TRUE f_347(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_350(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v595, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_350(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v595, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_354(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v595, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_354(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v595, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_358(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: v661 = v596 + v590 f_358(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_362(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_362(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v594, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_366(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: v596 + v590 = v661 f_366(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_371(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 1 + v798 = v596 && 0 <= 1 + v798 f_371(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_374(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: TRUE f_374(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_377(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v598, v597, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_377(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v598, v597, v600, v601, v602, v603, v604, 0, 3, 4) -> f_380(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v598, v597, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_380(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v598, v597, v600, v601, v602, v603, v604, 0, 3, 4) -> f_383(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v597, v600, v601, v602, v603, v604, 0, 3, 4) :|: v808 = v599 + v590 f_383(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v597, v600, v601, v602, v603, v604, 0, 3, 4) -> f_387(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v597, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 f_387(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v597, v600, v601, v602, v603, v604, 0, 3, 4) -> f_391(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v600, v601, v602, v603, v604, 0, 3, 4) :|: v599 + v590 = v808 f_391(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v600, v601, v602, v603, v604, 0, 3, 4) -> f_395(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v876, v600, v601, v602, v603, v604, 0, 3, 4) :|: 1 + v876 = v599 f_395(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v876, v600, v601, v602, v603, v604, 0, 3, 4) -> f_399(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v876, v600, v601, v602, v603, v604, 0, 3, 4) :|: TRUE f_399(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v876, v600, v601, v602, v603, v604, 0, 3, 4) -> f_403(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v876, v600, v601, v602, v603, v604, 0, 3, 4) :|: TRUE f_403(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v876, v600, v601, v602, v603, v604, 0, 3, 4) -> f_334(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v661, v798, v599, v808, v876, v600, v601, v602, v603, v604, 0, 3, 4) :|: TRUE f_334(v585, v586, v587, v588, v589, v590, v591, v592, 1, v594, v595, v596, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) -> f_336(v585, v586, v587, v588, v589, v590, v591, v592, 1, v596, v594, v595, v597, v598, v599, v600, v601, v602, v603, v604, 0, 3, 4) :|: 0 = 0 Combined rules. Obtained 1 rulesP rules: f_336(v585:0, v586:0, v587:0, v588:0, v589:0, v590:0, v591:0, v592:0, 1, 1 + v798:0, v594:0, v595:0, v597:0, v598:0, 1 + v876:0, v600:0, v601:0, v602:0, v603:0, v604:0, 0, 3, 4) -> f_336(v585:0, v586:0, v587:0, v588:0, v589:0, v590:0, v591:0, v592:0, 1, v798:0, 1 + v798:0, 1 + v798:0 + v590:0, 1 + v876:0, 1 + v876:0 + v590:0, v876:0, v600:0, v601:0, v602:0, v603:0, v604:0, 0, 3, 4) :|: v594:0 > 0 && v798:0 > -2 && v591:0 > 0 Filtered unneeded arguments: f_336(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23) -> f_336(x7, x10, x11, x15) Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: f_336(v591:0, sum~cons_1~v798:0, v594:0, sum~cons_1~v876:0) -> f_336(v591:0, v798:0, 1 + v798:0, v876:0) :|: v798:0 > -2 && v591:0 > 0 && v594:0 > 0 && sum~cons_1~v798:0 = 1 + v798:0 && sum~cons_1~v876:0 = 1 + v876:0 ---------------------------------------- (16) Obligation: Rules: f_336(v591:0, sum~cons_1~v798:0, v594:0, sum~cons_1~v876:0) -> f_336(v591:0, v798:0, 1 + v798:0, v876:0) :|: v798:0 > -2 && v591:0 > 0 && v594:0 > 0 && sum~cons_1~v798:0 = 1 + v798:0 && sum~cons_1~v876:0 = 1 + v876:0 ---------------------------------------- (17) IntTRSCompressionProof (EQUIVALENT) Compressed rules. ---------------------------------------- (18) Obligation: Rules: f_336(v591:0:0, sum~cons_1~v798:0:0, v594:0:0, sum~cons_1~v876:0:0) -> f_336(v591:0:0, v798:0:0, 1 + v798:0:0, v876:0:0) :|: v798:0:0 > -2 && v591:0:0 > 0 && v594:0:0 > 0 && sum~cons_1~v798:0:0 = 1 + v798:0:0 && sum~cons_1~v876:0:0 = 1 + v876:0:0 ---------------------------------------- (19) RankingReductionPairProof (EQUIVALENT) Interpretation: [ f_336 ] = f_336_2 The following rules are decreasing: f_336(v591:0:0, sum~cons_1~v798:0:0, v594:0:0, sum~cons_1~v876:0:0) -> f_336(v591:0:0, v798:0:0, 1 + v798:0:0, v876:0:0) :|: v798:0:0 > -2 && v591:0:0 > 0 && v594:0:0 > 0 && sum~cons_1~v798:0:0 = 1 + v798:0:0 && sum~cons_1~v876:0:0 = 1 + v876:0:0 The following rules are bounded: f_336(v591:0:0, sum~cons_1~v798:0:0, v594:0:0, sum~cons_1~v876:0:0) -> f_336(v591:0:0, v798:0:0, 1 + v798:0:0, v876:0:0) :|: v798:0:0 > -2 && v591:0:0 > 0 && v594:0:0 > 0 && sum~cons_1~v798:0:0 = 1 + v798:0:0 && sum~cons_1~v876:0:0 = 1 + v876:0:0 ---------------------------------------- (20) YES