/export/starexec/sandbox/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox/benchmark/theBenchmark.smt2 /export/starexec/sandbox/output/output_files


--------------------------------------------------------------------------------


NO

Solver Timeout: 4
Global Timeout: 300
Maximum number of concurrent processes: 900
No parsing errors!
Init Location: 0
Transitions:
<l0, l23, true>
<l1, l2, true>
<l3, l4, true>
<l5, l6, true, par{i^0 -> (1 + i^0)}>
<l7, l8, true>
<l8, l7, true>
<l9, l5, (undef142 = undef142) /\ (undef140 = undef140), par{bufHdr___01515^0 -> undef140, bufHdr_cntxDirty^0 -> 0, bufHdr_flags^0 -> undef142}>
<l9, l10, (undef162 = undef162), par{a1414^0 -> undef162}>
<l11, l5, ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0))>
<l11, l9, ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0))>
<l12, l5, ((0 + tmp___14^0) <= 0) /\ (0 <= (0 + tmp___14^0))>
<l12, l11, (1 <= (0 + tmp___14^0))>
<l12, l11, ((1 + tmp___14^0) <= 0)>
<l6, l13, true>
<l13, l14, ((1 + NBuffers^0) <= (0 + i^0)) /\ (undef365 = 1), par{R^0 -> 0}>
<l13, l10, ((0 + i^0) <= (0 + NBuffers^0)) /\ (undef390 = undef390), par{tmp___03^0 -> undef390}>
<l15, l16, true>
<l16, l6, (undef444 = 1), par{A^0 -> 0, i^0 -> 1}>
<l10, l12, (undef466 = undef466) /\ (undef463 = (0 + undef466)), par{a1010^0 -> (0 + bufHdr_tag_rnode^0), b1111^0 -> (0 + rnode^0), ret_RelFileNodeEquals1313^0 -> undef463, tmp1212^0 -> undef466, tmp___14^0 -> (0 + undef463)}>
<l17, l3, true, par{i^0 -> (1 + i^0)}>
<l18, l17, ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0))>
<l18, l17, ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef534 = undef534), par{bufHdr_cntxDirty^0 -> 0, bufHdr_flags^0 -> undef534, bufHdr_tag_rnode_relNode^0 -> 1}>
<l19, l17, ((0 + tmp1^0) <= 0) /\ (0 <= (0 + tmp1^0))>
<l19, l18, (1 <= (0 + tmp1^0))>
<l19, l18, ((1 + tmp1^0) <= 0)>
<l14, l20, true>
<l20, l14, true>
<l4, l7, ((0 + NLocBuffer^0) <= (0 + i^0))>
<l4, l19, ((1 + i^0) <= (0 + NLocBuffer^0)) /\ (undef728 = undef728) /\ (undef724 = (0 + undef728)), par{a66^0 -> (0 + bufHdr_tag_rnode^0), b77^0 -> (0 + rnode^0), ret_RelFileNodeEquals99^0 -> undef724, tmp1^0 -> (0 + undef724), tmp88^0 -> undef728}>
<l21, l16, (2 <= (0 + istemp^0))>
<l21, l16, ((1 + istemp^0) <= 1)>
<l21, l3, ((0 + istemp^0) <= 1) /\ (1 <= (0 + istemp^0)), par{i^0 -> 0}>
<l22, l21, (undef826 = undef826) /\ (undef812 = 0) /\ (undef811 = undef811) /\ (undef810 = undef810), par{A^0 -> (0 + undef812), NBuffers^0 -> undef810, NLocBuffer^0 -> undef811, R^0 -> undef812, istemp^0 -> undef826}>
<l23, l22, true>

Fresh variables:
undef140, undef142, undef162, undef365, undef390, undef444, undef463, undef466, undef534, undef724, undef728, undef810, undef811, undef812, undef826, 

Undef variables:
undef140, undef142, undef162, undef365, undef390, undef444, undef463, undef466, undef534, undef724, undef728, undef810, undef811, undef812, undef826, 

Abstraction variables:

Exit nodes:

Accepting locations:

Asserts:

Preprocessed LLVMGraph
Init Location: 0
Transitions:
<l0, l14, (NBuffers^0 = undef810) /\ (NLocBuffer^0 = undef811) /\ (undef826 = undef826) /\ (undef812 = 0) /\ (undef811 = undef811) /\ (undef810 = undef810) /\ (2 <= (0 + undef826)) /\ (undef444 = 1) /\ ((1 + undef810) <= (0 + 1)) /\ (undef365 = 1), par{i^0 -> 1}>
<l0, l10, (NBuffers^0 = undef810) /\ (NLocBuffer^0 = undef811) /\ (undef826 = undef826) /\ (undef812 = 0) /\ (undef811 = undef811) /\ (undef810 = undef810) /\ (2 <= (0 + undef826)) /\ (undef444 = 1) /\ ((0 + 1) <= (0 + undef810)) /\ (undef390 = undef390), par{i^0 -> 1}>
<l0, l14, (NBuffers^0 = undef810) /\ (NLocBuffer^0 = undef811) /\ (undef826 = undef826) /\ (undef812 = 0) /\ (undef811 = undef811) /\ (undef810 = undef810) /\ ((1 + undef826) <= 1) /\ (undef444 = 1) /\ ((1 + undef810) <= (0 + 1)) /\ (undef365 = 1), par{i^0 -> 1}>
<l0, l10, (NBuffers^0 = undef810) /\ (NLocBuffer^0 = undef811) /\ (undef826 = undef826) /\ (undef812 = 0) /\ (undef811 = undef811) /\ (undef810 = undef810) /\ ((1 + undef826) <= 1) /\ (undef444 = 1) /\ ((0 + 1) <= (0 + undef810)) /\ (undef390 = undef390), par{i^0 -> 1}>
<l0, l3, (NBuffers^0 = undef810) /\ (NLocBuffer^0 = undef811) /\ (undef826 = undef826) /\ (undef812 = 0) /\ (undef811 = undef811) /\ (undef810 = undef810) /\ ((0 + undef826) <= 1) /\ (1 <= (0 + undef826)), par{i^0 -> 0}>
<l3, l7, ((0 + NLocBuffer^0) <= (0 + i^0))>
<l3, l3, ((1 + i^0) <= (0 + NLocBuffer^0)) /\ (undef728 = undef728) /\ (undef724 = (0 + undef728)) /\ ((0 + (0 + undef724)) <= 0) /\ (0 <= (0 + (0 + undef724))), par{i^0 -> (1 + i^0)}>
<l3, l3, ((1 + i^0) <= (0 + NLocBuffer^0)) /\ (undef728 = undef728) /\ (undef724 = (0 + undef728)) /\ (1 <= (0 + (0 + undef724))) /\ ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0)), par{i^0 -> (1 + i^0)}>
<l3, l3, ((1 + i^0) <= (0 + NLocBuffer^0)) /\ (undef728 = undef728) /\ (undef724 = (0 + undef728)) /\ (1 <= (0 + (0 + undef724))) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef534 = undef534), par{i^0 -> (1 + i^0)}>
<l3, l3, ((1 + i^0) <= (0 + NLocBuffer^0)) /\ (undef728 = undef728) /\ (undef724 = (0 + undef728)) /\ ((1 + (0 + undef724)) <= 0) /\ ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0)), par{i^0 -> (1 + i^0)}>
<l3, l3, ((1 + i^0) <= (0 + NLocBuffer^0)) /\ (undef728 = undef728) /\ (undef724 = (0 + undef728)) /\ ((1 + (0 + undef724)) <= 0) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef534 = undef534), par{i^0 -> (1 + i^0)}>
<l7, l7, true>
<l10, l14, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ ((0 + (0 + undef463)) <= 0) /\ (0 <= (0 + (0 + undef463))) /\ ((1 + NBuffers^0) <= (0 + (1 + i^0))) /\ (undef365 = 1), par{i^0 -> (1 + i^0)}>
<l10, l10, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ ((0 + (0 + undef463)) <= 0) /\ (0 <= (0 + (0 + undef463))) /\ ((0 + (1 + i^0)) <= (0 + NBuffers^0)) /\ (undef390 = undef390), par{i^0 -> (1 + i^0)}>
<l10, l14, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ (1 <= (0 + (0 + undef463))) /\ ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0)) /\ ((1 + NBuffers^0) <= (0 + (1 + i^0))) /\ (undef365 = 1), par{i^0 -> (1 + i^0)}>
<l10, l10, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ (1 <= (0 + (0 + undef463))) /\ ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0)) /\ ((0 + (1 + i^0)) <= (0 + NBuffers^0)) /\ (undef390 = undef390), par{i^0 -> (1 + i^0)}>
<l10, l14, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ (1 <= (0 + (0 + undef463))) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef142 = undef142) /\ (undef140 = undef140) /\ ((1 + NBuffers^0) <= (0 + (1 + i^0))) /\ (undef365 = 1), par{i^0 -> (1 + i^0)}>
<l10, l10, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ (1 <= (0 + (0 + undef463))) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef142 = undef142) /\ (undef140 = undef140) /\ ((0 + (1 + i^0)) <= (0 + NBuffers^0)) /\ (undef390 = undef390), par{i^0 -> (1 + i^0)}>
<l10, l10, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ (1 <= (0 + (0 + undef463))) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef162 = undef162)>
<l10, l14, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ ((1 + (0 + undef463)) <= 0) /\ ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0)) /\ ((1 + NBuffers^0) <= (0 + (1 + i^0))) /\ (undef365 = 1), par{i^0 -> (1 + i^0)}>
<l10, l10, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ ((1 + (0 + undef463)) <= 0) /\ ((1 + bufHdr_tag_blockNum^0) <= (0 + firstDelBlock^0)) /\ ((0 + (1 + i^0)) <= (0 + NBuffers^0)) /\ (undef390 = undef390), par{i^0 -> (1 + i^0)}>
<l10, l14, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ ((1 + (0 + undef463)) <= 0) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef142 = undef142) /\ (undef140 = undef140) /\ ((1 + NBuffers^0) <= (0 + (1 + i^0))) /\ (undef365 = 1), par{i^0 -> (1 + i^0)}>
<l10, l10, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ ((1 + (0 + undef463)) <= 0) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef142 = undef142) /\ (undef140 = undef140) /\ ((0 + (1 + i^0)) <= (0 + NBuffers^0)) /\ (undef390 = undef390), par{i^0 -> (1 + i^0)}>
<l10, l10, (undef466 = undef466) /\ (undef463 = (0 + undef466)) /\ ((1 + (0 + undef463)) <= 0) /\ ((0 + firstDelBlock^0) <= (0 + bufHdr_tag_blockNum^0)) /\ (undef162 = undef162)>
<l14, l14, true>

Fresh variables:
undef140, undef142, undef162, undef365, undef390, undef444, undef463, undef466, undef534, undef724, undef728, undef810, undef811, undef812, undef826, 

Undef variables:
undef140, undef142, undef162, undef365, undef390, undef444, undef463, undef466, undef534, undef724, undef728, undef810, undef811, undef812, undef826, 

Abstraction variables:

Exit nodes:

Accepting locations:

Asserts:

*************************************************************
*******************************************************************************************
***********************       WORKING TRANSITION SYSTEM (DAG)       ***********************
*******************************************************************************************

Init Location: 0
Graph 0:
Transitions:
Variables:

Graph 1:
Transitions:
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ undef724 = 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 <= undef724 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 <= undef724 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 + undef724 <= 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + undef724 <= 0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
Variables:
NLocBuffer^0, i^0, bufHdr_tag_blockNum^0, firstDelBlock^0

Graph 2:
Transitions:
<l7, l7, true, {all remain the same}>
Variables:

Graph 3:
Transitions:
<l10, l10, 1 + i^0 <= NBuffers^0 /\ undef463 = 0 /\ undef463 = undef466, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l10, 1 + i^0 <= NBuffers^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 <= undef463 /\ undef463 = undef466, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l10, 1 + i^0 <= NBuffers^0 /\ 1 <= undef463 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef463 = undef466, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l10, 1 <= undef463 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef463 = undef466, {all remain the same}>
<l10, l10, 1 + i^0 <= NBuffers^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 + undef463 <= 0 /\ undef463 = undef466, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l10, 1 + i^0 <= NBuffers^0 /\ 1 + undef463 <= 0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef463 = undef466, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l10, 1 + undef463 <= 0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef463 = undef466, {all remain the same}>
Variables:
NBuffers^0, i^0, bufHdr_tag_blockNum^0, firstDelBlock^0

Graph 4:
Transitions:
<l14, l14, true, {all remain the same}>
Variables:

Precedence: 
Graph 0

Graph 1
<l0, l3, NBuffers^0 = undef810 /\ NLocBuffer^0 = undef811 /\ undef812 = 0 /\ undef826 = 1, {i^0 -> 0, rest remain the same}>

Graph 2
<l3, l7, NLocBuffer^0 <= i^0, {all remain the same}>

Graph 3
<l0, l10, 1 <= undef810 /\ 2 <= undef826 /\ NBuffers^0 = undef810 /\ NLocBuffer^0 = undef811 /\ undef812 = 0 /\ undef444 = 1, {i^0 -> 1, rest remain the same}>
<l0, l10, 1 <= undef810 /\ undef826 <= 0 /\ NBuffers^0 = undef810 /\ NLocBuffer^0 = undef811 /\ undef812 = 0 /\ undef444 = 1, {i^0 -> 1, rest remain the same}>

Graph 4
<l0, l14, undef810 <= 0 /\ 2 <= undef826 /\ NBuffers^0 = undef810 /\ NLocBuffer^0 = undef811 /\ undef812 = 0 /\ undef365 = 1 /\ undef444 = 1, {i^0 -> 1, rest remain the same}>
<l0, l14, undef810 <= 0 /\ undef826 <= 0 /\ NBuffers^0 = undef810 /\ NLocBuffer^0 = undef811 /\ undef812 = 0 /\ undef365 = 1 /\ undef444 = 1, {i^0 -> 1, rest remain the same}>
<l10, l14, NBuffers^0 <= i^0 /\ undef463 = 0 /\ undef463 = undef466 /\ undef365 = 1, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l14, 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 <= undef463 /\ NBuffers^0 <= i^0 /\ undef463 = undef466 /\ undef365 = 1, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l14, 1 <= undef463 /\ NBuffers^0 <= i^0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef463 = undef466 /\ undef365 = 1, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l14, 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 + undef463 <= 0 /\ NBuffers^0 <= i^0 /\ undef463 = undef466 /\ undef365 = 1, {i^0 -> 1 + i^0, rest remain the same}>
<l10, l14, 1 + undef463 <= 0 /\ NBuffers^0 <= i^0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef463 = undef466 /\ undef365 = 1, {i^0 -> 1 + i^0, rest remain the same}>

Map Locations to Subgraph:
( 0 , 0 )
( 3 , 1 )
( 7 , 2 )
( 10 , 3 )
( 14 , 4 )

*******************************************************************************************
********************************    CHECKING ASSERTIONS    ********************************
*******************************************************************************************

Proving termination of subgraph 0
Proving termination of subgraph 1
Checking unfeasibility...
Time used: 0.015539

Checking conditional termination of SCC {l3}...

LOG: CALL solveLinear

LOG: RETURN solveLinear - Elapsed time: 0.005097s
Ranking function: -2 + NLocBuffer^0 - 2*bufHdr_tag_blockNum^0 + 2*firstDelBlock^0 - i^0
New Graphs: 
Transitions:
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ undef724 = 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 <= undef724 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + undef724 <= 0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
Variables:
NLocBuffer^0, bufHdr_tag_blockNum^0, firstDelBlock^0, i^0
Checking conditional termination of SCC {l3}...

LOG: CALL solveLinear

LOG: RETURN solveLinear - Elapsed time: 0.002660s
Ranking function: NLocBuffer^0 + bufHdr_tag_blockNum^0 - firstDelBlock^0 - i^0
New Graphs: 
Transitions:
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ undef724 = 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
Variables:
NLocBuffer^0, i^0
Checking conditional termination of SCC {l3}...

LOG: CALL solveLinear

LOG: RETURN solveLinear - Elapsed time: 0.001218s
Ranking function: -1 + NLocBuffer^0 - i^0
New Graphs: 
Proving termination of subgraph 2
Checking unfeasibility...
Time used: 0.001043

> No variable changes in termination graph.
Checking conditional unfeasibility...
Termination failed. Trying to show unreachability...
Proving unreachability of entry: <l3, l7, NLocBuffer^0 <= i^0, {all remain the same}>

LOG: CALL check - Post:1 <= 0 - Process 1
* Exit transition: <l3, l7, NLocBuffer^0 <= i^0, {all remain the same}>
* Postcondition  : 1 <= 0
Postcodition moved up: 1 <= 0

LOG: Try proving POST

LOG: CALL check - Post:1 <= 0 - Process 2
* Exit transition: <l0, l3, NBuffers^0 = undef810 /\ NLocBuffer^0 = undef811 /\ undef812 = 0 /\ undef826 = 1, {i^0 -> 0, rest remain the same}>
* Postcondition  : 1 <= 0

LOG: CALL solveLinear

LOG: RETURN solveLinear - Elapsed time: 0.000858s
> Postcondition is not implied!

LOG: RETURN check - Elapsed time: 0.000952s

LOG: NarrowEntry size 1
Narrowing transition: 
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ undef724 = 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>

LOG: Narrow transition size 1
Narrowing transition: 
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 <= undef724 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>

LOG: Narrow transition size 1
Narrowing transition: 
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 <= undef724 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>

LOG: Narrow transition size 1
Narrowing transition: 
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 + undef724 <= 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>

LOG: Narrow transition size 1
Narrowing transition: 
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + undef724 <= 0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>

LOG: Narrow transition size 1
ENTRIES:
<l0, l3, 0 <= 0 /\ NBuffers^0 = undef810 /\ NLocBuffer^0 = undef811 /\ undef812 = 0 /\ undef826 = 1, {i^0 -> 0, rest remain the same}>
END ENTRIES:
GRAPH:
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 0 <= 0 /\ undef724 = 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 <= undef724 /\ 0 <= 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 <= undef724 /\ 0 <= 0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + bufHdr_tag_blockNum^0 <= firstDelBlock^0 /\ 1 + undef724 <= 0 /\ 0 <= 0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
<l3, l3, 1 + i^0 <= NLocBuffer^0 /\ 1 + undef724 <= 0 /\ 0 <= 0 /\ firstDelBlock^0 <= bufHdr_tag_blockNum^0 /\ undef724 = undef728, {i^0 -> 1 + i^0, rest remain the same}>
END GRAPH:
EXIT: <l3, l7, NLocBuffer^0 <= i^0, {all remain the same}>
POST: 1 <= 0


LOG: Try proving POST
[4266 : 4267]
[4266 : 4268]
[4266 : 4269]

LOG: Postcondition is not implied - no solution
> Postcondition is not implied!

LOG: RETURN check - Elapsed time: 1.384218s
Cannot prove unreachability

[4266 : 4270]
[4266 : 4271]
Successful child: 4270

Program does NOT terminate