/export/starexec/sandbox2/solver/bin/starexec_run_termcomp17 /export/starexec/sandbox2/benchmark/theBenchmark.smt2 /export/starexec/sandbox2/output/output_files -------------------------------------------------------------------------------- NO Solver Timeout: 4 Global Timeout: 300 Maximum number of concurrent processes: 900 No parsing errors! Init Location: 0 Transitions: undef14, a22^0 -> 1, got_SIGHUP^0 -> 0, tt1^0 -> (0 + undef14)}> undef49}> 1}> undef95}> undef136, last_copy_time^0 -> (0 + undef136), wakend^0 -> 0}> undef167, got_SIGHUP^0 -> (0 + undef167), wakend^0 -> 1}> Fresh variables: undef14, undef49, undef95, undef136, undef167, undef177, Undef variables: undef14, undef49, undef95, undef136, undef167, undef177, Abstraction variables: Exit nodes: Accepting locations: Asserts: Preprocessed LLVMGraph Init Location: 0 Transitions: (0 + undef136)}> (0 + undef136)}> (0 + undef136)}> (0 + undef136)}> Fresh variables: undef14, undef49, undef95, undef136, undef167, undef177, Undef variables: undef14, undef49, undef95, undef136, undef167, undef177, Abstraction variables: Exit nodes: Accepting locations: Asserts: ************************************************************* ******************************************************************************************* *********************** WORKING TRANSITION SYSTEM (DAG) *********************** ******************************************************************************************* Init Location: 0 Graph 0: Transitions: Variables: Graph 1: Transitions: Variables: Precedence: Graph 0 Graph 1 undef136, rest remain the same}> undef136, rest remain the same}> undef136, rest remain the same}> undef136, rest remain the same}> Map Locations to Subgraph: ( 0 , 0 ) ( 7 , 1 ) ******************************************************************************************* ******************************** CHECKING ASSERTIONS ******************************** ******************************************************************************************* Proving termination of subgraph 0 Proving termination of subgraph 1 Checking unfeasibility... Time used: 0.001724 > No variable changes in termination graph. Checking conditional unfeasibility... Termination failed. Trying to show unreachability... Proving unreachability of entry: undef136, rest remain the same}> LOG: CALL check - Post:1 <= 0 - Process 1 * Exit transition: undef136, rest remain the same}> * Postcondition : 1 <= 0 LOG: CALL solveLinear LOG: RETURN solveLinear - Elapsed time: 0.000453s > Postcondition is not implied! LOG: RETURN check - Elapsed time: 0.000546s Cannot prove unreachability [41102 : 41103] [41102 : 41104] Successful child: 41103 Program does NOT terminate