7.89/3.10 YES 7.89/3.10 proof of /export/starexec/sandbox/benchmark/theBenchmark.c 7.89/3.10 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 7.89/3.10 7.89/3.10 7.89/3.10 Termination of the given C Problem could be proven: 7.89/3.10 7.89/3.10 (0) C Problem 7.89/3.10 (1) CToLLVMProof [EQUIVALENT, 173 ms] 7.89/3.10 (2) LLVM problem 7.89/3.10 (3) LLVMToTerminationGraphProof [EQUIVALENT, 686 ms] 7.89/3.10 (4) LLVM Symbolic Execution Graph 7.89/3.10 (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] 7.89/3.10 (6) LLVM Symbolic Execution SCC 7.89/3.10 (7) SCC2IRS [SOUND, 42 ms] 7.89/3.10 (8) IntTRS 7.89/3.10 (9) IntTRSCompressionProof [EQUIVALENT, 0 ms] 7.89/3.10 (10) IntTRS 7.89/3.10 (11) PolynomialOrderProcessor [EQUIVALENT, 0 ms] 7.89/3.10 (12) YES 7.89/3.10 7.89/3.10 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (0) 7.89/3.10 Obligation: 7.89/3.10 c file /export/starexec/sandbox/benchmark/theBenchmark.c 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (1) CToLLVMProof (EQUIVALENT) 7.89/3.10 Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (2) 7.89/3.10 Obligation: 7.89/3.10 LLVM Problem 7.89/3.10 7.89/3.10 Aliases: 7.89/3.10 7.89/3.10 Data layout: 7.89/3.10 7.89/3.10 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 7.89/3.10 7.89/3.10 Machine: 7.89/3.10 7.89/3.10 "x86_64-pc-linux-gnu" 7.89/3.10 7.89/3.10 Type definitions: 7.89/3.10 7.89/3.10 Global variables: 7.89/3.10 7.89/3.10 Function declarations and definitions: 7.89/3.10 7.89/3.10 *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: true visibilityType: DEFAULT callingConvention: ccc 7.89/3.10 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 7.89/3.10 0: 7.89/3.10 %1 = alloca i32, align 4 7.89/3.10 %x = alloca i32, align 4 7.89/3.10 %b = alloca i32, align 4 7.89/3.10 store 0, %1 7.89/3.10 %2 = call i32 (...)* @__VERIFIER_nondet_int() 7.89/3.10 store %2, %x 7.89/3.10 %3 = call i32 (...)* @__VERIFIER_nondet_int() 7.89/3.10 store %3, %b 7.89/3.10 br %4 7.89/3.10 4: 7.89/3.10 %5 = load %b 7.89/3.10 %6 = icmp ne %5 0 7.89/3.10 br %6, %8, %7 7.89/3.10 7: 7.89/3.10 br %15 7.89/3.10 8: 7.89/3.10 %9 = call i32 (...)* @__VERIFIER_nondet_int() 7.89/3.10 store %9, %b 7.89/3.10 %10 = load %x 7.89/3.10 %11 = sub %10 1 7.89/3.10 store %11, %x 7.89/3.10 %12 = load %x 7.89/3.10 %13 = icmp sge %12 0 7.89/3.10 %14 = zext i1 %13 to i32 7.89/3.10 store %14, %b 7.89/3.10 br %4 7.89/3.10 15: 7.89/3.10 ret 0 7.89/3.10 7.89/3.10 7.89/3.10 Analyze Termination of all function calls matching the pattern: 7.89/3.10 main() 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (3) LLVMToTerminationGraphProof (EQUIVALENT) 7.89/3.10 Constructed symbolic execution graph for LLVM program and proved memory safety. 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (4) 7.89/3.10 Obligation: 7.89/3.10 SE Graph 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (5) SymbolicExecutionGraphToSCCProof (SOUND) 7.89/3.10 Splitted symbolic execution graph to 1 SCC. 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (6) 7.89/3.10 Obligation: 7.89/3.10 SCC 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (7) SCC2IRS (SOUND) 7.89/3.10 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 7.89/3.10 Generated rules. Obtained 15 rulesP rules: 7.89/3.10 f_151(v60, v61, v62, v63, v64, 1, v67, v68, v69, v70, v71, v72, 0, 3, 4) -> f_152(v60, v61, v62, v63, v64, 1, v67, v68, v69, v70, v71, v72, 0, 3, 4) :|: 0 = 0 7.89/3.10 f_152(v60, v61, v62, v63, v64, 1, v67, v68, v69, v70, v71, v72, 0, 3, 4) -> f_153(v60, v61, v62, v63, v64, 1, v67, v68, v69, v70, v71, v72, 0, 3, 4) :|: TRUE 7.89/3.10 f_153(v60, v61, v62, v63, v64, 1, v67, v68, v69, v70, v71, v72, 0, 3, 4) -> f_154(v60, v61, v62, v63, v64, 1, v74, v68, v69, v70, v71, v72, 0, 3, 4) :|: TRUE 7.89/3.10 f_154(v60, v61, v62, v63, v64, 1, v74, v68, v69, v70, v71, v72, 0, 3, 4) -> f_155(v60, v61, v62, v63, v64, 1, v74, v68, v69, v70, v71, v72, 0, 3, 4) :|: TRUE 7.89/3.10 f_155(v60, v61, v62, v63, v64, 1, v74, v68, v69, v70, v71, v72, 0, 3, 4) -> f_156(v60, v61, v62, v63, v64, 1, v74, v69, v70, v71, v72, 0, 3, 4) :|: 0 = 0 7.89/3.10 f_156(v60, v61, v62, v63, v64, 1, v74, v69, v70, v71, v72, 0, 3, 4) -> f_157(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 4) :|: 1 + v76 = v69 && 0 <= 1 + v76 7.89/3.10 f_157(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 4) -> f_158(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 4) :|: TRUE 7.89/3.10 f_158(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 4) -> f_159(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 4) :|: 0 = 0 7.89/3.10 f_159(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 4) -> f_160(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) :|: 0 <= v76 && 1 <= v69 && 2 <= v63 7.89/3.10 f_160(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) -> f_162(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) :|: 0 = 0 7.89/3.10 f_162(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) -> f_164(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) :|: 0 = 0 7.89/3.10 f_164(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) -> f_166(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) :|: TRUE 7.89/3.10 f_166(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) -> f_168(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) :|: TRUE 7.89/3.10 f_168(v60, v61, v62, v63, v64, 1, v74, v69, v76, v70, v71, v72, 0, 3, 2, 4) -> f_150(v60, v61, v62, v63, v64, 1, 1, v74, v69, v76, v70, v71, v72, 0, 3, 4) :|: TRUE 7.89/3.10 f_150(v60, v61, v62, v63, v64, v65, 1, v67, v68, v69, v70, v71, v72, 0, 3, 4) -> f_151(v60, v61, v62, v63, v64, 1, v67, v68, v69, v70, v71, v72, 0, 3, 4) :|: 0 = 0 7.89/3.10 Combined rules. Obtained 1 rulesP rules: 7.89/3.10 f_151(v60:0, v61:0, v62:0, v63:0, v64:0, 1, v67:0, v68:0, 1 + v76:0, v70:0, v71:0, v72:0, 0, 3, 4) -> f_151(v60:0, v61:0, v62:0, v63:0, v64:0, 1, v74:0, 1 + v76:0, v76:0, v70:0, v71:0, v72:0, 0, 3, 4) :|: v76:0 > -1 && v63:0 > 1 7.89/3.10 Filtered unneeded arguments: 7.89/3.10 f_151(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15) -> f_151(x4, x9) 7.89/3.10 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 7.89/3.10 f_151(v63:0, sum~cons_1~v76:0) -> f_151(v63:0, v76:0) :|: v76:0 > -1 && v63:0 > 1 && sum~cons_1~v76:0 = 1 + v76:0 7.89/3.10 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (8) 7.89/3.10 Obligation: 7.89/3.10 Rules: 7.89/3.10 f_151(v63:0, sum~cons_1~v76:0) -> f_151(v63:0, v76:0) :|: v76:0 > -1 && v63:0 > 1 && sum~cons_1~v76:0 = 1 + v76:0 7.89/3.10 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (9) IntTRSCompressionProof (EQUIVALENT) 7.89/3.10 Compressed rules. 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (10) 7.89/3.10 Obligation: 7.89/3.10 Rules: 7.89/3.10 f_151(v63:0:0, sum~cons_1~v76:0:0) -> f_151(v63:0:0, v76:0:0) :|: v76:0:0 > -1 && v63:0:0 > 1 && sum~cons_1~v76:0:0 = 1 + v76:0:0 7.89/3.10 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (11) PolynomialOrderProcessor (EQUIVALENT) 7.89/3.10 Found the following polynomial interpretation: 7.89/3.10 [f_151(x, x1)] = x1 7.89/3.10 7.89/3.10 The following rules are decreasing: 7.89/3.10 f_151(v63:0:0, sum~cons_1~v76:0:0) -> f_151(v63:0:0, v76:0:0) :|: v76:0:0 > -1 && v63:0:0 > 1 && sum~cons_1~v76:0:0 = 1 + v76:0:0 7.89/3.10 The following rules are bounded: 7.89/3.10 f_151(v63:0:0, sum~cons_1~v76:0:0) -> f_151(v63:0:0, v76:0:0) :|: v76:0:0 > -1 && v63:0:0 > 1 && sum~cons_1~v76:0:0 = 1 + v76:0:0 7.89/3.10 7.89/3.10 ---------------------------------------- 7.89/3.10 7.89/3.10 (12) 7.89/3.10 YES 8.25/3.12 EOF