33.41/10.35 YES 33.41/10.36 proof of /export/starexec/sandbox/benchmark/theBenchmark.c 33.41/10.36 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 33.41/10.36 33.41/10.36 33.41/10.36 Termination of the given C Problem could be proven: 33.41/10.36 33.41/10.36 (0) C Problem 33.41/10.36 (1) CToLLVMProof [EQUIVALENT, 172 ms] 33.41/10.36 (2) LLVM problem 33.41/10.36 (3) LLVMToTerminationGraphProof [EQUIVALENT, 4369 ms] 33.41/10.36 (4) LLVM Symbolic Execution Graph 33.41/10.36 (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] 33.41/10.36 (6) AND 33.41/10.36 (7) LLVM Symbolic Execution SCC 33.41/10.36 (8) SCC2IRS [SOUND, 49 ms] 33.41/10.36 (9) IntTRS 33.41/10.36 (10) IntTRSCompressionProof [EQUIVALENT, 0 ms] 33.41/10.36 (11) IntTRS 33.41/10.36 (12) PolynomialOrderProcessor [EQUIVALENT, 0 ms] 33.41/10.36 (13) YES 33.41/10.36 (14) LLVM Symbolic Execution SCC 33.41/10.36 (15) SCC2IRS [SOUND, 73 ms] 33.41/10.36 (16) IntTRS 33.41/10.36 (17) IntTRSCompressionProof [EQUIVALENT, 0 ms] 33.41/10.36 (18) IntTRS 33.41/10.36 (19) RankingReductionPairProof [EQUIVALENT, 0 ms] 33.41/10.36 (20) YES 33.41/10.36 (21) LLVM Symbolic Execution SCC 33.41/10.36 (22) SCC2IRS [SOUND, 57 ms] 33.41/10.36 (23) IntTRS 33.41/10.36 (24) IntTRSCompressionProof [EQUIVALENT, 0 ms] 33.41/10.36 (25) IntTRS 33.41/10.36 (26) RankingReductionPairProof [EQUIVALENT, 0 ms] 33.41/10.36 (27) YES 33.41/10.36 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (0) 33.41/10.36 Obligation: 33.41/10.36 c file /export/starexec/sandbox/benchmark/theBenchmark.c 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (1) CToLLVMProof (EQUIVALENT) 33.41/10.36 Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (2) 33.41/10.36 Obligation: 33.41/10.36 LLVM Problem 33.41/10.36 33.41/10.36 Aliases: 33.41/10.36 33.41/10.36 Data layout: 33.41/10.36 33.41/10.36 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 33.41/10.36 33.41/10.36 Machine: 33.41/10.36 33.41/10.36 "x86_64-pc-linux-gnu" 33.41/10.36 33.41/10.36 Type definitions: 33.41/10.36 33.41/10.36 Global variables: 33.41/10.36 33.41/10.36 Function declarations and definitions: 33.41/10.36 33.41/10.36 *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 33.41/10.36 *BasicFunctionTypename: "test_fun" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (x i32, y i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc 33.41/10.36 0: 33.41/10.36 %1 = alloca i32, align 4 33.41/10.36 %2 = alloca i32, align 4 33.41/10.36 %c = alloca i32, align 4 33.41/10.36 store %x, %1 33.41/10.36 store %y, %2 33.41/10.36 store 0, %c 33.41/10.36 br %3 33.41/10.36 3: 33.41/10.36 %4 = load %1 33.41/10.36 %5 = load %2 33.41/10.36 %6 = add %4 %5 33.41/10.36 %7 = icmp sgt %6 0 33.41/10.36 br %7, %8, %25 33.41/10.36 8: 33.41/10.36 %9 = load %1 33.41/10.36 %10 = icmp sgt %9 0 33.41/10.36 br %10, %11, %14 33.41/10.36 11: 33.41/10.36 %12 = load %1 33.41/10.36 %13 = sub %12 1 33.41/10.36 store %13, %1 33.41/10.36 br %22 33.41/10.36 14: 33.41/10.36 %15 = load %2 33.41/10.36 %16 = icmp sgt %15 0 33.41/10.36 br %16, %17, %20 33.41/10.36 17: 33.41/10.36 %18 = load %2 33.41/10.36 %19 = sub %18 1 33.41/10.36 store %19, %2 33.41/10.36 br %21 33.41/10.36 20: 33.41/10.36 br %21 33.41/10.36 21: 33.41/10.36 br %22 33.41/10.36 22: 33.41/10.36 %23 = load %c 33.41/10.36 %24 = add %23 1 33.41/10.36 store %24, %c 33.41/10.36 br %3 33.41/10.36 25: 33.41/10.36 %26 = load %c 33.41/10.36 ret %26 33.41/10.36 33.41/10.36 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 33.41/10.36 0: 33.41/10.36 %1 = alloca i32, align 4 33.41/10.36 store 0, %1 33.41/10.36 %2 = call i32 @__VERIFIER_nondet_int() 33.41/10.36 %3 = call i32 @__VERIFIER_nondet_int() 33.41/10.36 %4 = call i32 @test_fun(i32 %2, i32 %3) 33.41/10.36 ret %4 33.41/10.36 33.41/10.36 33.41/10.36 Analyze Termination of all function calls matching the pattern: 33.41/10.36 main() 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (3) LLVMToTerminationGraphProof (EQUIVALENT) 33.41/10.36 Constructed symbolic execution graph for LLVM program and proved memory safety. 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (4) 33.41/10.36 Obligation: 33.41/10.36 SE Graph 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (5) SymbolicExecutionGraphToSCCProof (SOUND) 33.41/10.36 Splitted symbolic execution graph to 3 SCCs. 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (6) 33.41/10.36 Complex Obligation (AND) 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (7) 33.41/10.36 Obligation: 33.41/10.36 SCC 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (8) SCC2IRS (SOUND) 33.41/10.36 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 33.41/10.36 Generated rules. Obtained 22 rulesP rules: 33.41/10.36 f_593(v631, v632, v633, v634, v635, 0, v637, 1, v639, v640, v641, v642, v643, v644, v645, v646, 3, 4) -> f_594(v631, v632, v633, v634, v635, 0, v637, 1, v640, v641, v642, v643, v644, v645, v646, 3, 4) :|: 0 = 0 33.41/10.36 f_594(v631, v632, v633, v634, v635, 0, v637, 1, v640, v641, v642, v643, v644, v645, v646, 3, 4) -> f_595(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) :|: v647 = 1 + v640 && 2 <= v647 33.41/10.36 f_595(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) -> f_596(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) :|: TRUE 33.41/10.36 f_596(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) -> f_597(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) :|: TRUE 33.41/10.36 f_597(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) -> f_598(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) :|: 0 = 0 33.41/10.36 f_598(v631, v632, v633, v634, v635, 0, v637, 1, v640, v647, v641, v642, v643, v644, v645, v646, 3, 4, 2) -> f_599(v631, v632, v633, v634, v635, 0, v641, v637, 1, v640, v647, v642, v643, v644, v645, v646, 3, 4, 2) :|: 0 = 0 33.41/10.36 f_599(v631, v632, v633, v634, v635, 0, v641, v637, 1, v640, v647, v642, v643, v644, v645, v646, 3, 4, 2) -> f_600(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 4, 2) :|: 0 = 0 33.41/10.36 f_600(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 4, 2) -> f_601(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: 0 < v641 && 2 <= v637 && 2 <= v632 33.41/10.36 f_601(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_603(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_603(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_605(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: TRUE 33.41/10.36 f_605(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_607(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_607(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_609(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_609(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_611(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: TRUE 33.41/10.36 f_611(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_612(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_612(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_613(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_613(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_614(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) :|: TRUE 33.41/10.36 f_614(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v637, v642, v643, v644, v645, v646, 3, 2, 4) -> f_615(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v642, v643, v644, v645, v646, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_615(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v642, v643, v644, v645, v646, 3, 2, 4) -> f_616(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v676, v642, v643, v644, v645, v646, 3, 2, 4) :|: 1 + v676 = v641 && 0 <= v676 33.41/10.36 f_616(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v676, v642, v643, v644, v645, v646, 3, 2, 4) -> f_617(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v676, v642, v643, v644, v645, v646, 3, 2, 4) :|: TRUE 33.41/10.36 f_617(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v676, v642, v643, v644, v645, v646, 3, 2, 4) -> f_618(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v676, v642, v643, v644, v645, v646, 3, 2, 4) :|: TRUE 33.41/10.36 f_618(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v676, v642, v643, v644, v645, v646, 3, 2, 4) -> f_592(v631, v632, v633, v634, v635, 0, v641, 1, v640, v647, v676, v642, v643, v644, v645, v646, 3, 4) :|: TRUE 33.41/10.36 f_592(v631, v632, v633, v634, v635, 0, v637, 1, v639, v640, v641, v642, v643, v644, v645, v646, 3, 4) -> f_593(v631, v632, v633, v634, v635, 0, v637, 1, v639, v640, v641, v642, v643, v644, v645, v646, 3, 4) :|: TRUE 33.41/10.36 Combined rules. Obtained 1 rulesP rules: 33.41/10.36 f_593(v631:0, v632:0, v633:0, v634:0, v635:0, 0, v637:0, 1, v639:0, v640:0, 1 + v676:0, v642:0, v643:0, v644:0, v645:0, v646:0, 3, 4) -> f_593(v631:0, v632:0, v633:0, v634:0, v635:0, 0, 1 + v676:0, 1, v640:0, 1 + v640:0, v676:0, v642:0, v643:0, v644:0, v645:0, v646:0, 3, 4) :|: v640:0 > 0 && v637:0 > 1 && v676:0 > -1 && v632:0 > 1 33.41/10.36 Filtered unneeded arguments: 33.41/10.36 f_593(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18) -> f_593(x2, x7, x10, x11) 33.41/10.36 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 33.41/10.36 f_593(v632:0, v637:0, v640:0, sum~cons_1~v676:0) -> f_593(v632:0, 1 + v676:0, 1 + v640:0, v676:0) :|: v637:0 > 1 && v640:0 > 0 && v632:0 > 1 && v676:0 > -1 && sum~cons_1~v676:0 = 1 + v676:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (9) 33.41/10.36 Obligation: 33.41/10.36 Rules: 33.41/10.36 f_593(v632:0, v637:0, v640:0, sum~cons_1~v676:0) -> f_593(v632:0, 1 + v676:0, 1 + v640:0, v676:0) :|: v637:0 > 1 && v640:0 > 0 && v632:0 > 1 && v676:0 > -1 && sum~cons_1~v676:0 = 1 + v676:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (10) IntTRSCompressionProof (EQUIVALENT) 33.41/10.36 Compressed rules. 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (11) 33.41/10.36 Obligation: 33.41/10.36 Rules: 33.41/10.36 f_593(v632:0:0, v637:0:0, v640:0:0, sum~cons_1~v676:0:0) -> f_593(v632:0:0, 1 + v676:0:0, 1 + v640:0:0, v676:0:0) :|: v632:0:0 > 1 && v676:0:0 > -1 && v640:0:0 > 0 && v637:0:0 > 1 && sum~cons_1~v676:0:0 = 1 + v676:0:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (12) PolynomialOrderProcessor (EQUIVALENT) 33.41/10.36 Found the following polynomial interpretation: 33.41/10.36 [f_593(x, x1, x2, x3)] = x3 33.41/10.36 33.41/10.36 The following rules are decreasing: 33.41/10.36 f_593(v632:0:0, v637:0:0, v640:0:0, sum~cons_1~v676:0:0) -> f_593(v632:0:0, 1 + v676:0:0, 1 + v640:0:0, v676:0:0) :|: v632:0:0 > 1 && v676:0:0 > -1 && v640:0:0 > 0 && v637:0:0 > 1 && sum~cons_1~v676:0:0 = 1 + v676:0:0 33.41/10.36 The following rules are bounded: 33.41/10.36 f_593(v632:0:0, v637:0:0, v640:0:0, sum~cons_1~v676:0:0) -> f_593(v632:0:0, 1 + v676:0:0, 1 + v640:0:0, v676:0:0) :|: v632:0:0 > 1 && v676:0:0 > -1 && v640:0:0 > 0 && v637:0:0 > 1 && sum~cons_1~v676:0:0 = 1 + v676:0:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (13) 33.41/10.36 YES 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (14) 33.41/10.36 Obligation: 33.41/10.36 SCC 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (15) SCC2IRS (SOUND) 33.41/10.36 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 33.41/10.36 Generated rules. Obtained 22 rulesP rules: 33.41/10.36 f_516(v400, v401, v402, v403, v404, v405, v406, 1, 0, v409, v410, v411, v412, v413, v414, v415, v416, 3, 4) -> f_518(v400, v401, v402, v403, v404, v409, v406, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 4) :|: 0 = 0 33.41/10.36 f_518(v400, v401, v402, v403, v404, v409, v406, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 4) -> f_520(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 4) :|: v449 = v400 + v409 33.41/10.36 f_520(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 4) -> f_522(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 < v449 && 1 <= v409 && 2 <= v405 && 2 <= v401 33.41/10.36 f_522(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_525(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_525(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_528(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_528(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_532(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_532(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_536(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_536(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_540(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_540(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_543(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_543(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_546(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_546(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_548(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_548(v400, v401, v402, v403, v404, v409, v449, 1, 0, v405, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_550(v400, v401, v402, v403, v404, v409, v449, 1, 0, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_550(v400, v401, v402, v403, v404, v409, v449, 1, 0, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_552(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 1 + v497 = v409 && 0 <= v497 33.41/10.36 f_552(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_554(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_554(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_556(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_556(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_558(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_558(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v410, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_560(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v412, v413, v414, v415, v416, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_560(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v412, v413, v414, v415, v416, 3, 2, 4) -> f_563(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v559, v412, v413, v414, v415, v416, 3, 2, 4) :|: v559 = 1 + v411 && 2 <= v559 33.41/10.36 f_563(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v559, v412, v413, v414, v415, v416, 3, 2, 4) -> f_565(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v559, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_565(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v559, v412, v413, v414, v415, v416, 3, 2, 4) -> f_567(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v559, v412, v413, v414, v415, v416, 3, 2, 4) :|: TRUE 33.41/10.36 f_567(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v559, v412, v413, v414, v415, v416, 3, 2, 4) -> f_514(v400, v401, v402, v403, v404, v409, v449, 1, 0, v497, v411, v559, v412, v413, v414, v415, v416, 3, 4) :|: TRUE 33.41/10.36 f_514(v400, v401, v402, v403, v404, v405, v406, 1, 0, v409, v410, v411, v412, v413, v414, v415, v416, 3, 4) -> f_516(v400, v401, v402, v403, v404, v405, v406, 1, 0, v409, v410, v411, v412, v413, v414, v415, v416, 3, 4) :|: 0 = 0 33.41/10.36 Combined rules. Obtained 1 rulesP rules: 33.41/10.36 f_516(v400:0, v401:0, v402:0, v403:0, v404:0, v405:0, v406:0, 1, 0, 1 + v497:0, v410:0, v411:0, v412:0, v413:0, v414:0, v415:0, v416:0, 3, 4) -> f_516(v400:0, v401:0, v402:0, v403:0, v404:0, 1 + v497:0, v400:0 + (1 + v497:0), 1, 0, v497:0, v411:0, 1 + v411:0, v412:0, v413:0, v414:0, v415:0, v416:0, 3, 4) :|: v497:0 > -1 && v400:0 + (1 + v497:0) > 0 && v405:0 > 1 && v401:0 > 1 && v411:0 > 0 33.41/10.36 Filtered unneeded arguments: 33.41/10.36 f_516(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19) -> f_516(x1, x2, x6, x10, x12) 33.41/10.36 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 33.41/10.36 f_516(v400:0, v401:0, v405:0, sum~cons_1~v497:0, v411:0) -> f_516(v400:0, v401:0, 1 + v497:0, v497:0, 1 + v411:0) :|: v400:0 + (1 + v497:0) > 0 && v497:0 > -1 && v405:0 > 1 && v411:0 > 0 && v401:0 > 1 && sum~cons_1~v497:0 = 1 + v497:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (16) 33.41/10.36 Obligation: 33.41/10.36 Rules: 33.41/10.36 f_516(v400:0, v401:0, v405:0, sum~cons_1~v497:0, v411:0) -> f_516(v400:0, v401:0, 1 + v497:0, v497:0, 1 + v411:0) :|: v400:0 + (1 + v497:0) > 0 && v497:0 > -1 && v405:0 > 1 && v411:0 > 0 && v401:0 > 1 && sum~cons_1~v497:0 = 1 + v497:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (17) IntTRSCompressionProof (EQUIVALENT) 33.41/10.36 Compressed rules. 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (18) 33.41/10.36 Obligation: 33.41/10.36 Rules: 33.41/10.36 f_516(v400:0:0, v401:0:0, v405:0:0, sum~cons_1~v497:0:0, v411:0:0) -> f_516(v400:0:0, v401:0:0, 1 + v497:0:0, v497:0:0, 1 + v411:0:0) :|: v411:0:0 > 0 && v401:0:0 > 1 && v405:0:0 > 1 && v497:0:0 > -1 && v400:0:0 + (1 + v497:0:0) > 0 && sum~cons_1~v497:0:0 = 1 + v497:0:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (19) RankingReductionPairProof (EQUIVALENT) 33.41/10.36 Interpretation: 33.41/10.36 [ f_516 ] = f_516_4 33.41/10.36 33.41/10.36 The following rules are decreasing: 33.41/10.36 f_516(v400:0:0, v401:0:0, v405:0:0, sum~cons_1~v497:0:0, v411:0:0) -> f_516(v400:0:0, v401:0:0, 1 + v497:0:0, v497:0:0, 1 + v411:0:0) :|: v411:0:0 > 0 && v401:0:0 > 1 && v405:0:0 > 1 && v497:0:0 > -1 && v400:0:0 + (1 + v497:0:0) > 0 && sum~cons_1~v497:0:0 = 1 + v497:0:0 33.41/10.36 33.41/10.36 The following rules are bounded: 33.41/10.36 f_516(v400:0:0, v401:0:0, v405:0:0, sum~cons_1~v497:0:0, v411:0:0) -> f_516(v400:0:0, v401:0:0, 1 + v497:0:0, v497:0:0, 1 + v411:0:0) :|: v411:0:0 > 0 && v401:0:0 > 1 && v405:0:0 > 1 && v497:0:0 > -1 && v400:0:0 + (1 + v497:0:0) > 0 && sum~cons_1~v497:0:0 = 1 + v497:0:0 33.41/10.36 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (20) 33.41/10.36 YES 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (21) 33.41/10.36 Obligation: 33.41/10.36 SCC 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (22) SCC2IRS (SOUND) 33.41/10.36 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 33.41/10.36 Generated rules. Obtained 19 rulesP rules: 33.41/10.36 f_455(v299, v300, v301, v302, v303, v307, v305, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_457(v299, v300, v301, v302, v303, v307, v305, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) :|: 0 = 0 33.41/10.36 f_457(v299, v300, v301, v302, v303, v307, v305, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_460(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) :|: v326 = v307 + v300 33.41/10.36 f_460(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_463(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) :|: 0 < v326 33.41/10.36 f_463(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_467(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) :|: 0 = 0 33.41/10.36 f_467(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_471(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) :|: TRUE 33.41/10.36 f_471(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_475(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) :|: 0 = 0 33.41/10.36 f_475(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_478(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: 0 < v307 && 2 <= v304 && 2 <= v299 33.41/10.36 f_478(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_482(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_482(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_485(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: TRUE 33.41/10.36 f_485(v299, v300, v301, v302, v303, v307, v326, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_488(v299, v300, v301, v302, v303, v307, v326, 1, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_488(v299, v300, v301, v302, v303, v307, v326, 1, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_491(v299, v300, v301, v302, v303, v307, v326, 1, v327, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: 1 + v327 = v307 && 0 <= v327 33.41/10.36 f_491(v299, v300, v301, v302, v303, v307, v326, 1, v327, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_494(v299, v300, v301, v302, v303, v307, v326, 1, v327, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: TRUE 33.41/10.36 f_494(v299, v300, v301, v302, v303, v307, v326, 1, v327, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_497(v299, v300, v301, v302, v303, v307, v326, 1, v327, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: TRUE 33.41/10.36 f_497(v299, v300, v301, v302, v303, v307, v326, 1, v327, v308, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_500(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: 0 = 0 33.41/10.36 f_500(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_503(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v338, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: v338 = 1 + v309 && 2 <= v338 33.41/10.36 f_503(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v338, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_506(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v338, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: TRUE 33.41/10.36 f_506(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v338, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_509(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v338, v310, v311, v312, v313, v314, 0, 3, 2, 4) :|: TRUE 33.41/10.36 f_509(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v338, v310, v311, v312, v313, v314, 0, 3, 2, 4) -> f_453(v299, v300, v301, v302, v303, v307, v326, 1, v327, v309, v338, v310, v311, v312, v313, v314, 0, 3, 4) :|: TRUE 33.41/10.36 f_453(v299, v300, v301, v302, v303, v304, v305, 1, v307, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) -> f_455(v299, v300, v301, v302, v303, v307, v305, 1, v304, v308, v309, v310, v311, v312, v313, v314, 0, 3, 4) :|: 0 = 0 33.41/10.36 Combined rules. Obtained 1 rulesP rules: 33.41/10.36 f_455(v299:0, v300:0, v301:0, v302:0, v303:0, 1 + v327:0, v305:0, 1, v304:0, v308:0, v309:0, v310:0, v311:0, v312:0, v313:0, v314:0, 0, 3, 4) -> f_455(v299:0, v300:0, v301:0, v302:0, v303:0, v327:0, 1 + v327:0 + v300:0, 1, 1 + v327:0, v309:0, 1 + v309:0, v310:0, v311:0, v312:0, v313:0, v314:0, 0, 3, 4) :|: 1 + v327:0 + v300:0 > 0 && v304:0 > 1 && v327:0 > -1 && v299:0 > 1 && v309:0 > 0 33.41/10.36 Filtered unneeded arguments: 33.41/10.36 f_455(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19) -> f_455(x1, x2, x6, x9, x11) 33.41/10.36 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 33.41/10.36 f_455(v299:0, v300:0, sum~cons_1~v327:0, v304:0, v309:0) -> f_455(v299:0, v300:0, v327:0, 1 + v327:0, 1 + v309:0) :|: v304:0 > 1 && 1 + v327:0 + v300:0 > 0 && v327:0 > -1 && v309:0 > 0 && v299:0 > 1 && sum~cons_1~v327:0 = 1 + v327:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (23) 33.41/10.36 Obligation: 33.41/10.36 Rules: 33.41/10.36 f_455(v299:0, v300:0, sum~cons_1~v327:0, v304:0, v309:0) -> f_455(v299:0, v300:0, v327:0, 1 + v327:0, 1 + v309:0) :|: v304:0 > 1 && 1 + v327:0 + v300:0 > 0 && v327:0 > -1 && v309:0 > 0 && v299:0 > 1 && sum~cons_1~v327:0 = 1 + v327:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (24) IntTRSCompressionProof (EQUIVALENT) 33.41/10.36 Compressed rules. 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (25) 33.41/10.36 Obligation: 33.41/10.36 Rules: 33.41/10.36 f_455(v299:0:0, v300:0:0, sum~cons_1~v327:0:0, v304:0:0, v309:0:0) -> f_455(v299:0:0, v300:0:0, v327:0:0, 1 + v327:0:0, 1 + v309:0:0) :|: v309:0:0 > 0 && v299:0:0 > 1 && v327:0:0 > -1 && 1 + v327:0:0 + v300:0:0 > 0 && v304:0:0 > 1 && sum~cons_1~v327:0:0 = 1 + v327:0:0 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (26) RankingReductionPairProof (EQUIVALENT) 33.41/10.36 Interpretation: 33.41/10.36 [ f_455 ] = f_455_3 33.41/10.36 33.41/10.36 The following rules are decreasing: 33.41/10.36 f_455(v299:0:0, v300:0:0, sum~cons_1~v327:0:0, v304:0:0, v309:0:0) -> f_455(v299:0:0, v300:0:0, v327:0:0, 1 + v327:0:0, 1 + v309:0:0) :|: v309:0:0 > 0 && v299:0:0 > 1 && v327:0:0 > -1 && 1 + v327:0:0 + v300:0:0 > 0 && v304:0:0 > 1 && sum~cons_1~v327:0:0 = 1 + v327:0:0 33.41/10.36 33.41/10.36 The following rules are bounded: 33.41/10.36 f_455(v299:0:0, v300:0:0, sum~cons_1~v327:0:0, v304:0:0, v309:0:0) -> f_455(v299:0:0, v300:0:0, v327:0:0, 1 + v327:0:0, 1 + v309:0:0) :|: v309:0:0 > 0 && v299:0:0 > 1 && v327:0:0 > -1 && 1 + v327:0:0 + v300:0:0 > 0 && v304:0:0 > 1 && sum~cons_1~v327:0:0 = 1 + v327:0:0 33.41/10.36 33.41/10.36 33.41/10.36 ---------------------------------------- 33.41/10.36 33.41/10.36 (27) 33.41/10.36 YES 33.83/12.74 EOF