18.11/5.99	YES
18.11/6.00	proof of /export/starexec/sandbox2/benchmark/theBenchmark.c
18.11/6.00	# AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty
18.11/6.00	
18.11/6.00	
18.11/6.00	Termination of the given C Problem could be proven:
18.11/6.00	
18.11/6.00	(0) C Problem
18.11/6.00	(1) CToLLVMProof [EQUIVALENT, 176 ms]
18.11/6.00	(2) LLVM problem
18.11/6.00	(3) LLVMToTerminationGraphProof [EQUIVALENT, 2754 ms]
18.11/6.00	(4) LLVM Symbolic Execution Graph
18.11/6.00	(5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms]
18.11/6.00	(6) LLVM Symbolic Execution SCC
18.11/6.00	(7) SCC2IRS [SOUND, 172 ms]
18.11/6.00	(8) IntTRS
18.11/6.00	(9) IntTRSCompressionProof [EQUIVALENT, 1 ms]
18.11/6.00	(10) IntTRS
18.11/6.00	(11) RankingReductionPairProof [EQUIVALENT, 30 ms]
18.11/6.00	(12) YES
18.11/6.00	
18.11/6.00	
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(0)
18.11/6.00	Obligation:
18.11/6.00	c file /export/starexec/sandbox2/benchmark/theBenchmark.c
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(1) CToLLVMProof (EQUIVALENT)
18.11/6.00	Compiled c-file /export/starexec/sandbox2/benchmark/theBenchmark.c to LLVM.
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(2)
18.11/6.00	Obligation:
18.11/6.00	LLVM Problem
18.11/6.00	
18.11/6.00	Aliases:
18.11/6.00	
18.11/6.00	Data layout:
18.11/6.00	
18.11/6.00	"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
18.11/6.00	
18.11/6.00	Machine:
18.11/6.00	
18.11/6.00	"x86_64-pc-linux-gnu"
18.11/6.00	
18.11/6.00	Type definitions:
18.11/6.00	
18.11/6.00	Global variables:
18.11/6.00	
18.11/6.00	Function declarations and definitions:
18.11/6.00	
18.11/6.00	*BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc
18.11/6.00	*BasicFunctionTypename: "malloc" returnParam: *i8 parameters: (i64) variableLength: false visibilityType: DEFAULT callingConvention: ccc
18.11/6.00	*BasicFunctionTypename: "__VERIFIER_nondet_String" linkageType: EXTERNALLY_VISIBLE returnParam: *i8 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc
18.11/6.00		0:
18.11/6.00			%length = alloca i32, align 4
18.11/6.00			%nondetString = alloca *i8, align 8
18.11/6.00			%1 = call i32 @__VERIFIER_nondet_int()
18.11/6.00			store %1, %length
18.11/6.00			%2 = load %length
18.11/6.00			%3 = icmp slt %2 1
18.11/6.00			br %3, %4, %5
18.11/6.00		4:
18.11/6.00			store 1, %length
18.11/6.00			br %5
18.11/6.00		5:
18.11/6.00			%6 = load %length
18.11/6.00			%7 = sext i32 %6 to i64
18.11/6.00			%8 = mul %7 1
18.11/6.00			%9 = call *i8 @malloc(i64 %8)
18.11/6.00			store %9, %nondetString
18.11/6.00			%10 = load %length
18.11/6.00			%11 = sub %10 1
18.11/6.00			%12 = sext i32 %11 to i64
18.11/6.00			%13 = load %nondetString
18.11/6.00			%14 = getelementptr %13, %12
18.11/6.00			store 0, %14
18.11/6.00			%15 = load %nondetString
18.11/6.00			ret %15
18.11/6.00	
18.11/6.00	*BasicFunctionTypename: "cstrncmp" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (s1 *i8, s2 *i8, n i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc
18.11/6.00		0:
18.11/6.00			%1 = alloca i32, align 4
18.11/6.00			%2 = alloca *i8, align 8
18.11/6.00			%3 = alloca *i8, align 8
18.11/6.00			%4 = alloca i32, align 4
18.11/6.00			%uc1 = alloca i8, align 1
18.11/6.00			%uc2 = alloca i8, align 1
18.11/6.00			store %s1, %2
18.11/6.00			store %s2, %3
18.11/6.00			store %n, %4
18.11/6.00			%5 = load %4
18.11/6.00			%6 = icmp eq %5 0
18.11/6.00			br %6, %7, %8
18.11/6.00		7:
18.11/6.00			store 0, %1
18.11/6.00			br %57
18.11/6.00		8:
18.11/6.00			br %9
18.11/6.00		9:
18.11/6.00			%10 = load %4
18.11/6.00			%11 = add %10 -1
18.11/6.00			store %11, %4
18.11/6.00			%12 = icmp sgt %10 0
18.11/6.00			br %12, %13, %21
18.11/6.00		13:
18.11/6.00			%14 = load %2
18.11/6.00			%15 = load %14
18.11/6.00			%16 = sext i8 %15 to i32
18.11/6.00			%17 = load %3
18.11/6.00			%18 = load %17
18.11/6.00			%19 = sext i8 %18 to i32
18.11/6.00			%20 = icmp eq %16 %19
18.11/6.00			br %21
18.11/6.00		21:
18.11/6.00			%22 = phi [0, %9], [%20, %13]
18.11/6.00			br %22, %23, %37
18.11/6.00		23:
18.11/6.00			%24 = load %4
18.11/6.00			%25 = icmp eq %24 0
18.11/6.00			br %25, %31, %26
18.11/6.00		26:
18.11/6.00			%27 = load %2
18.11/6.00			%28 = load %27
18.11/6.00			%29 = sext i8 %28 to i32
18.11/6.00			%30 = icmp eq %29 0
18.11/6.00			br %30, %31, %32
18.11/6.00		31:
18.11/6.00			store 0, %1
18.11/6.00			br %57
18.11/6.00		32:
18.11/6.00			%33 = load %2
18.11/6.00			%34 = getelementptr %33, 1
18.11/6.00			store %34, %2
18.11/6.00			%35 = load %3
18.11/6.00			%36 = getelementptr %35, 1
18.11/6.00			store %36, %3
18.11/6.00			br %9
18.11/6.00		37:
18.11/6.00			%38 = load %2
18.11/6.00			%39 = load %38
18.11/6.00			store %39, %uc1
18.11/6.00			%40 = load %3
18.11/6.00			%41 = load %40
18.11/6.00			store %41, %uc2
18.11/6.00			%42 = load %uc1
18.11/6.00			%43 = zext i8 %42 to i32
18.11/6.00			%44 = load %uc2
18.11/6.00			%45 = zext i8 %44 to i32
18.11/6.00			%46 = icmp slt %43 %45
18.11/6.00			br %46, %47, %48
18.11/6.00		47:
18.11/6.00			br %55
18.11/6.00		48:
18.11/6.00			%49 = load %uc1
18.11/6.00			%50 = zext i8 %49 to i32
18.11/6.00			%51 = load %uc2
18.11/6.00			%52 = zext i8 %51 to i32
18.11/6.00			%53 = icmp sgt %50 %52
18.11/6.00			%54 = zext i1 %53 to i32
18.11/6.00			br %55
18.11/6.00		55:
18.11/6.00			%56 = phi [-1, %47], [%54, %48]
18.11/6.00			store %56, %1
18.11/6.00			br %57
18.11/6.00		57:
18.11/6.00			%58 = load %1
18.11/6.00			ret %58
18.11/6.00	
18.11/6.00	*BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc
18.11/6.00		0:
18.11/6.00			%1 = alloca i32, align 4
18.11/6.00			store 0, %1
18.11/6.00			%2 = call *i8 @__VERIFIER_nondet_String()
18.11/6.00			%3 = call *i8 @__VERIFIER_nondet_String()
18.11/6.00			%4 = call i32 @__VERIFIER_nondet_int()
18.11/6.00			%5 = call i32 @cstrncmp(*i8 %2, *i8 %3, i32 %4)
18.11/6.00			ret %5
18.11/6.00	
18.11/6.00	
18.11/6.00	Analyze Termination of all function calls matching the pattern:
18.11/6.00	main()
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(3) LLVMToTerminationGraphProof (EQUIVALENT)
18.11/6.00	Constructed symbolic execution graph for LLVM program and proved memory safety.
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(4)
18.11/6.00	Obligation:
18.11/6.00	SE Graph
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(5) SymbolicExecutionGraphToSCCProof (SOUND)
18.11/6.00	Splitted symbolic execution graph to 1 SCC.
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(6)
18.11/6.00	Obligation:
18.11/6.00	SCC
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(7) SCC2IRS (SOUND)
18.11/6.00	Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 
18.11/6.00	Generated rules. Obtained 33 rulesP rules:
18.11/6.00	f_620(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_621(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 1 + v1016 = v1000 && 0 <= v1016
18.11/6.00	f_621(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_622(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_622(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_623(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_623(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_624(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_624(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_625(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1003, v1004, v1002, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_625(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1003, v1004, v1002, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_626(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1003, v1004, v1002, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_626(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1003, v1004, v1002, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_627(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1004, v1003, v1002, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_627(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1004, v1003, v1002, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_628(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1006, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_628(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1006, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_629(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1006, v1020, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_629(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1006, v1020, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_630(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1006, v1020, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_630(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1018, v1006, v1020, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_631(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: v1018 = v1020
18.11/6.00	f_631(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_633(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_633(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_635(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_635(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_637(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_637(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_639(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_639(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_642(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: v1016 != 0 && 2 <= v1000 && 3 <= v991
18.11/6.00	f_642(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_645(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_645(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_648(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_648(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1003, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_651(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_651(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_654(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_654(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1003, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_657(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_657(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) -> f_661(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) :|: v1020 != 0 && v1005 < v1009 && v1006 < v1010 && 3 <= v1009 && 3 <= v1010
18.11/6.00	f_661(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) -> f_664(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_664(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) -> f_667(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_667(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1002, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1003, 3, 7, 2, 4, 8) -> f_670(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_670(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, 3, 7, 2, 4, 8) -> f_674(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, 3, 7, 2, 4, 8) :|: v1242 = 1 + v1005 && 3 <= v1242
18.11/6.00	f_674(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, 3, 7, 2, 4, 8) -> f_678(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_678(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1004, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, 3, 7, 2, 4, 8) -> f_682(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	f_682(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) -> f_685(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1303, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) :|: v1303 = 1 + v1006 && 3 <= v1303
18.11/6.00	f_685(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1303, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) -> f_688(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1303, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_688(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1303, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) -> f_691(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1303, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_691(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1303, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, v1002, v1003, v1004, 3, 7, 2, 4, 8) -> f_619(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, v1016, 1, v1005, v1020, v1006, v1242, v1303, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: TRUE
18.11/6.00	f_619(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v999, v1000, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) -> f_620(v989, v990, v991, v992, v993, v994, v995, v996, v997, 0, v1000, 1, v1002, v1003, v1004, v1005, v1006, v1007, v1008, v1009, v1010, v1011, v1012, v1013, v1014, v1015, 3, 7, 2, 4, 8) :|: 0 = 0
18.11/6.00	Combined rules. Obtained 2 rulesP rules:
18.11/6.00	f_620(v989:0, v990:0, v991:0, v992:0, v993:0, v994:0, v995:0, v996:0, v997:0, 0, 1 + v1016:0, 1, v1002:0, v1003:0, v1004:0, v1005:0, v1006:0, v1007:0, v1008:0, v1009:0, v1010:0, v1011:0, v1012:0, v1013:0, v1014:0, v1015:0, 3, 7, 2, 4, 8) -> f_620(v989:0, v990:0, v991:0, v992:0, v993:0, v994:0, v995:0, v996:0, v997:0, 0, v1016:0, 1, v1005:0, v1018:0, v1006:0, 1 + v1005:0, 1 + v1006:0, v1007:0, v1008:0, v1009:0, v1010:0, v1011:0, v1012:0, v1013:0, v1014:0, v1015:0, 3, 7, 2, 4, 8) :|: v1016:0 > 0 && v991:0 > 2 && v1009:0 > v1005:0 && v1018:0 < 0 && v1010:0 > v1006:0 && v1009:0 > 2 && v1010:0 > 2 && v1006:0 > 1 && v1005:0 > 1
18.11/6.00	f_620(v989:0, v990:0, v991:0, v992:0, v993:0, v994:0, v995:0, v996:0, v997:0, 0, 1 + v1016:0, 1, v1002:0, v1003:0, v1004:0, v1005:0, v1006:0, v1007:0, v1008:0, v1009:0, v1010:0, v1011:0, v1012:0, v1013:0, v1014:0, v1015:0, 3, 7, 2, 4, 8) -> f_620(v989:0, v990:0, v991:0, v992:0, v993:0, v994:0, v995:0, v996:0, v997:0, 0, v1016:0, 1, v1005:0, v1018:0, v1006:0, 1 + v1005:0, 1 + v1006:0, v1007:0, v1008:0, v1009:0, v1010:0, v1011:0, v1012:0, v1013:0, v1014:0, v1015:0, 3, 7, 2, 4, 8) :|: v1016:0 > 0 && v991:0 > 2 && v1009:0 > v1005:0 && v1018:0 > 0 && v1010:0 > v1006:0 && v1009:0 > 2 && v1010:0 > 2 && v1006:0 > 1 && v1005:0 > 1
18.11/6.00	Filtered unneeded arguments:
18.11/6.00	   f_620(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31) -> f_620(x3, x11, x16, x17, x20, x21)
18.11/6.00	Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules:
18.11/6.00	f_620(v991:0, sum~cons_1~v1016:0, v1005:0, v1006:0, v1009:0, v1010:0) -> f_620(v991:0, v1016:0, 1 + v1005:0, 1 + v1006:0, v1009:0, v1010:0) :|: v991:0 > 2 && v1016:0 > 0 && v1009:0 > v1005:0 && v1010:0 > v1006:0 && v1009:0 > 2 && v1010:0 > 2 && v1005:0 > 1 && v1006:0 > 1 && sum~cons_1~v1016:0 = 1 + v1016:0
18.11/6.00	
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(8)
18.11/6.00	Obligation:
18.11/6.00	Rules:
18.11/6.00	f_620(v991:0, sum~cons_1~v1016:0, v1005:0, v1006:0, v1009:0, v1010:0) -> f_620(v991:0, v1016:0, 1 + v1005:0, 1 + v1006:0, v1009:0, v1010:0) :|: v991:0 > 2 && v1016:0 > 0 && v1009:0 > v1005:0 && v1010:0 > v1006:0 && v1009:0 > 2 && v1010:0 > 2 && v1005:0 > 1 && v1006:0 > 1 && sum~cons_1~v1016:0 = 1 + v1016:0
18.11/6.00	
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(9) IntTRSCompressionProof (EQUIVALENT)
18.11/6.00	Compressed rules.
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(10)
18.11/6.00	Obligation:
18.11/6.00	Rules:
18.11/6.00	f_620(v991:0:0, sum~cons_1~v1016:0:0, v1005:0:0, v1006:0:0, v1009:0:0, v1010:0:0) -> f_620(v991:0:0, v1016:0:0, 1 + v1005:0:0, 1 + v1006:0:0, v1009:0:0, v1010:0:0) :|: v1005:0:0 > 1 && v1006:0:0 > 1 && v1010:0:0 > 2 && v1009:0:0 > 2 && v1010:0:0 > v1006:0:0 && v1009:0:0 > v1005:0:0 && v1016:0:0 > 0 && v991:0:0 > 2 && sum~cons_1~v1016:0:0 = 1 + v1016:0:0
18.11/6.00	
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(11) RankingReductionPairProof (EQUIVALENT)
18.11/6.00	Interpretation:
18.11/6.00	[ f_620 ] = f_620_2
18.11/6.00	
18.11/6.00	The following rules are decreasing:
18.11/6.00	f_620(v991:0:0, sum~cons_1~v1016:0:0, v1005:0:0, v1006:0:0, v1009:0:0, v1010:0:0) -> f_620(v991:0:0, v1016:0:0, 1 + v1005:0:0, 1 + v1006:0:0, v1009:0:0, v1010:0:0) :|: v1005:0:0 > 1 && v1006:0:0 > 1 && v1010:0:0 > 2 && v1009:0:0 > 2 && v1010:0:0 > v1006:0:0 && v1009:0:0 > v1005:0:0 && v1016:0:0 > 0 && v991:0:0 > 2 && sum~cons_1~v1016:0:0 = 1 + v1016:0:0
18.11/6.00	
18.11/6.00	The following rules are bounded:
18.11/6.00	f_620(v991:0:0, sum~cons_1~v1016:0:0, v1005:0:0, v1006:0:0, v1009:0:0, v1010:0:0) -> f_620(v991:0:0, v1016:0:0, 1 + v1005:0:0, 1 + v1006:0:0, v1009:0:0, v1010:0:0) :|: v1005:0:0 > 1 && v1006:0:0 > 1 && v1010:0:0 > 2 && v1009:0:0 > 2 && v1010:0:0 > v1006:0:0 && v1009:0:0 > v1005:0:0 && v1016:0:0 > 0 && v991:0:0 > 2 && sum~cons_1~v1016:0:0 = 1 + v1016:0:0
18.11/6.00	
18.11/6.00	
18.11/6.00	----------------------------------------
18.11/6.00	
18.11/6.00	(12)
18.11/6.00	YES
18.11/6.04	EOF