31.15/9.60 YES 31.15/9.64 proof of /export/starexec/sandbox2/benchmark/theBenchmark.c 31.15/9.64 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 31.15/9.64 31.15/9.64 31.15/9.64 Termination of the given C Problem could be proven: 31.15/9.64 31.15/9.64 (0) C Problem 31.15/9.64 (1) CToLLVMProof [EQUIVALENT, 173 ms] 31.15/9.64 (2) LLVM problem 31.15/9.64 (3) LLVMToTerminationGraphProof [EQUIVALENT, 4370 ms] 31.15/9.64 (4) LLVM Symbolic Execution Graph 31.15/9.64 (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] 31.15/9.64 (6) AND 31.15/9.64 (7) LLVM Symbolic Execution SCC 31.15/9.64 (8) SCC2IRS [SOUND, 95 ms] 31.15/9.64 (9) IntTRS 31.15/9.64 (10) IRS2T2 [EQUIVALENT, 0 ms] 31.15/9.64 (11) T2IntSys 31.15/9.64 (12) T2 [EQUIVALENT, 1214 ms] 31.15/9.64 (13) YES 31.15/9.64 (14) LLVM Symbolic Execution SCC 31.15/9.64 (15) SCC2IRS [SOUND, 54 ms] 31.15/9.64 (16) IntTRS 31.15/9.64 (17) IntTRSCompressionProof [EQUIVALENT, 0 ms] 31.15/9.64 (18) IntTRS 31.15/9.64 (19) PolynomialOrderProcessor [EQUIVALENT, 9 ms] 31.15/9.64 (20) YES 31.15/9.64 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (0) 31.15/9.64 Obligation: 31.15/9.64 c file /export/starexec/sandbox2/benchmark/theBenchmark.c 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (1) CToLLVMProof (EQUIVALENT) 31.15/9.64 Compiled c-file /export/starexec/sandbox2/benchmark/theBenchmark.c to LLVM. 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (2) 31.15/9.64 Obligation: 31.15/9.64 LLVM Problem 31.15/9.64 31.15/9.64 Aliases: 31.15/9.64 31.15/9.64 Data layout: 31.15/9.64 31.15/9.64 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 31.15/9.64 31.15/9.64 Machine: 31.15/9.64 31.15/9.64 "x86_64-pc-linux-gnu" 31.15/9.64 31.15/9.64 Type definitions: 31.15/9.64 31.15/9.64 Global variables: 31.15/9.64 31.15/9.64 Function declarations and definitions: 31.15/9.64 31.15/9.64 *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 31.15/9.64 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 31.15/9.64 0: 31.15/9.64 %1 = alloca i32, align 4 31.15/9.64 %n = alloca i32, align 4 31.15/9.64 %m = alloca i32, align 4 31.15/9.64 %i = alloca i32, align 4 31.15/9.64 %j = alloca i32, align 4 31.15/9.64 store 0, %1 31.15/9.64 %2 = call i32 @__VERIFIER_nondet_int() 31.15/9.64 store %2, %n 31.15/9.64 %3 = call i32 @__VERIFIER_nondet_int() 31.15/9.64 store %3, %m 31.15/9.64 %4 = load %m 31.15/9.64 %5 = icmp sgt %4 0 31.15/9.64 br %5, %6, %27 31.15/9.64 6: 31.15/9.64 %7 = load %n 31.15/9.64 %8 = load %m 31.15/9.64 %9 = icmp sgt %7 %8 31.15/9.64 br %9, %10, %27 31.15/9.64 10: 31.15/9.64 store 0, %i 31.15/9.64 store 0, %j 31.15/9.64 br %11 31.15/9.64 11: 31.15/9.64 %12 = load %i 31.15/9.64 %13 = load %n 31.15/9.64 %14 = icmp slt %12 %13 31.15/9.64 br %14, %15, %26 31.15/9.64 15: 31.15/9.64 %16 = load %j 31.15/9.64 %17 = load %m 31.15/9.64 %18 = icmp slt %16 %17 31.15/9.64 br %18, %19, %22 31.15/9.64 19: 31.15/9.64 %20 = load %j 31.15/9.64 %21 = add %20 1 31.15/9.64 store %21, %j 31.15/9.64 br %25 31.15/9.64 22: 31.15/9.64 store 0, %j 31.15/9.64 %23 = load %i 31.15/9.64 %24 = add %23 1 31.15/9.64 store %24, %i 31.15/9.64 br %25 31.15/9.64 25: 31.15/9.64 br %11 31.15/9.64 26: 31.15/9.64 br %27 31.15/9.64 27: 31.15/9.64 ret 0 31.15/9.64 31.15/9.64 31.15/9.64 Analyze Termination of all function calls matching the pattern: 31.15/9.64 main() 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (3) LLVMToTerminationGraphProof (EQUIVALENT) 31.15/9.64 Constructed symbolic execution graph for LLVM program and proved memory safety. 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (4) 31.15/9.64 Obligation: 31.15/9.64 SE Graph 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (5) SymbolicExecutionGraphToSCCProof (SOUND) 31.15/9.64 Splitted symbolic execution graph to 2 SCCs. 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (6) 31.15/9.64 Complex Obligation (AND) 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (7) 31.15/9.64 Obligation: 31.15/9.64 SCC 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (8) SCC2IRS (SOUND) 31.15/9.64 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 31.15/9.64 Generated rules. Obtained 35 rulesP rules: 31.15/9.64 f_566(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1537, 0, v1539, v1540, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_567(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_567(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_568(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_568(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_569(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: v1540 < v1534 31.15/9.64 f_569(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_571(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_571(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_573(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: TRUE 31.15/9.64 f_573(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_575(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_575(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_577(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_577(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_578(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_578(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_579(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: TRUE 31.15/9.64 f_579(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1537, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_580(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1540, 0, v1539, v1535, v1537, v1541, v1542, v1543, v1544, v1545, 0, 3, 2, 4) :|: TRUE 31.15/9.64 f_580(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1626, v1627, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_581(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1627, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_581(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1627, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_582(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: v1635 = 1 + v1625 && 1 <= v1635 31.15/9.64 f_582(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_583(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: TRUE 31.15/9.64 f_583(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_584(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: TRUE 31.15/9.64 f_584(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_585(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: TRUE 31.15/9.64 f_585(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_586(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_586(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_587(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_587(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_588(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_588(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_589(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: TRUE 31.15/9.64 f_589(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_590(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_590(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_591(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_591(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_592(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: v1635 < v1622 && 2 <= v1622 && 3 <= v1621 31.15/9.64 f_591(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_593(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: v1622 <= v1635 && v1622 = v1635 31.15/9.64 f_592(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_594(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_594(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_596(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: TRUE 31.15/9.64 f_596(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_580(v1616, v1617, v1618, v1619, v1620, v1621, v1622, 1, v1624, v1635, v1625, v1635, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) :|: TRUE 31.15/9.64 f_593(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 0, 3, 2, 4) -> f_595(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_595(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) -> f_597(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: TRUE 31.15/9.64 f_597(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) -> f_598(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: TRUE 31.15/9.64 f_598(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1628, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) -> f_599(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_599(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) -> f_600(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1738, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: v1738 = 1 + v1624 && 2 <= v1738 31.15/9.64 f_600(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1738, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) -> f_601(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1738, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: TRUE 31.15/9.64 f_601(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1738, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) -> f_602(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1738, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: TRUE 31.15/9.64 f_602(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1738, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) -> f_565(v1616, v1617, v1618, v1619, v1620, v1621, v1635, 1, v1624, 0, v1625, v1738, v1629, v1630, v1631, v1632, v1633, 3, 2, 4) :|: TRUE 31.15/9.64 f_565(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1537, 0, v1539, v1540, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) -> f_566(v1529, v1530, v1531, v1532, v1533, v1534, v1535, 1, v1537, 0, v1539, v1540, v1541, v1542, v1543, v1544, v1545, 3, 2, 4) :|: TRUE 31.15/9.64 Combined rules. Obtained 2 rulesP rules: 31.15/9.64 f_591(v1616:0, v1617:0, v1618:0, v1619:0, v1620:0, v1621:0, v1622:0, 1, v1624:0, v1635:0, v1625:0, v1628:0, v1629:0, v1630:0, v1631:0, v1632:0, v1633:0, 0, 3, 2, 4) -> f_591(v1616:0, v1617:0, v1618:0, v1619:0, v1620:0, v1621:0, v1622:0, 1, v1624:0, 1 + v1635:0, v1635:0, v1628:0, v1629:0, v1630:0, v1631:0, v1632:0, v1633:0, 0, 3, 2, 4) :|: v1635:0 > -1 && v1622:0 > 1 && v1621:0 > 2 && v1635:0 < v1622:0 31.15/9.64 f_591(v1616:0, v1617:0, v1618:0, v1619:0, v1620:0, v1621:0, v1622:0, 1, v1624:0, v1622:0, v1625:0, v1628:0, v1629:0, v1630:0, v1631:0, v1632:0, v1633:0, 0, 3, 2, 4) -> f_591(v1616:0, v1617:0, v1618:0, v1619:0, v1620:0, v1621:0, v1622:0, 1, 1 + v1624:0, 1, 0, v1624:0, v1629:0, v1630:0, v1631:0, v1632:0, v1633:0, 0, 3, 2, 4) :|: v1624:0 > 0 && v1621:0 > 1 + v1624:0 31.15/9.64 Filtered unneeded arguments: 31.15/9.64 f_591(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21) -> f_591(x6, x7, x9, x10) 31.15/9.64 Removed division, modulo operations, cleaned up constraints. Obtained 2 rules.P rules: 31.15/9.64 f_591(v1621:0, v1622:0, v1624:0, v1635:0) -> f_591(v1621:0, v1622:0, v1624:0, 1 + v1635:0) :|: v1622:0 > 1 && v1635:0 > -1 && v1635:0 < v1622:0 && v1621:0 > 2 31.15/9.64 f_591(v1621:0, v1622:0, v1624:0, v1622:01) -> f_591(v1621:0, v1622:0, 1 + v1624:0, 1) :|: v1624:0 > 0 && v1621:0 > 1 + v1624:0 && v1622:0 = v1622:01 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (9) 31.15/9.64 Obligation: 31.15/9.64 Rules: 31.15/9.64 f_591(v1621:0, v1622:0, v1624:0, v1635:0) -> f_591(v1621:0, v1622:0, v1624:0, 1 + v1635:0) :|: v1622:0 > 1 && v1635:0 > -1 && v1635:0 < v1622:0 && v1621:0 > 2 31.15/9.64 f_591(x, x1, x2, x3) -> f_591(x, x1, 1 + x2, 1) :|: x2 > 0 && x > 1 + x2 && x1 = x3 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (10) IRS2T2 (EQUIVALENT) 31.15/9.64 Transformed input IRS into an integer transition system.Used the following mapping from defined symbols to location IDs: 31.15/9.64 31.15/9.64 (f_591_4,1) 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (11) 31.15/9.64 Obligation: 31.15/9.64 START: 0; 31.15/9.64 31.15/9.64 FROM: 0; 31.15/9.64 TO: 1; 31.15/9.64 31.15/9.64 FROM: 1; 31.15/9.64 oldX0 := x0; 31.15/9.64 oldX1 := x1; 31.15/9.64 oldX2 := x2; 31.15/9.64 oldX3 := x3; 31.15/9.64 assume(oldX1 > 1 && oldX3 > -1 && oldX3 < oldX1 && oldX0 > 2); 31.15/9.64 x0 := oldX0; 31.15/9.64 x1 := oldX1; 31.15/9.64 x2 := oldX2; 31.15/9.64 x3 := 1 + oldX3; 31.15/9.64 TO: 1; 31.15/9.64 31.15/9.64 FROM: 1; 31.15/9.64 oldX0 := x0; 31.15/9.64 oldX1 := x1; 31.15/9.64 oldX2 := x2; 31.15/9.64 oldX3 := x3; 31.15/9.64 assume(oldX2 > 0 && oldX0 > 1 + oldX2 && oldX1 = oldX3); 31.15/9.64 x0 := oldX0; 31.15/9.64 x1 := oldX1; 31.15/9.64 x2 := 1 + oldX2; 31.15/9.64 x3 := 1; 31.15/9.64 TO: 1; 31.15/9.64 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (12) T2 (EQUIVALENT) 31.15/9.64 Initially, performed program simplifications using lexicographic rank functions: 31.15/9.64 * Removed transitions 1, 4, 5 using the following rank functions: 31.15/9.64 - Rank function 1: 31.15/9.64 RF for loc. 5: x0-x2 31.15/9.64 RF for loc. 6: x0-x2 31.15/9.64 Bound for (chained) transitions 5: 2 31.15/9.64 - Rank function 2: 31.15/9.64 RF for loc. 5: 1+2*x1-2*x3 31.15/9.64 RF for loc. 6: 2*x1-2*x3 31.15/9.64 Bound for (chained) transitions 4: 2 31.15/9.64 - Rank function 3: 31.15/9.64 RF for loc. 5: 0 31.15/9.64 RF for loc. 6: -1 31.15/9.64 Bound for (chained) transitions 1: 0 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (13) 31.15/9.64 YES 31.15/9.64 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (14) 31.15/9.64 Obligation: 31.15/9.64 SCC 31.15/9.64 ---------------------------------------- 31.15/9.64 31.15/9.64 (15) SCC2IRS (SOUND) 31.15/9.64 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 31.15/9.64 Generated rules. Obtained 15 rulesP rules: 31.15/9.64 f_275(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) -> f_276(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) :|: 0 = 0 31.15/9.64 f_276(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) -> f_277(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) :|: 0 = 0 31.32/9.64 f_277(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) -> f_278(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) :|: TRUE 31.32/9.64 f_278(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) -> f_279(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) :|: 0 = 0 31.32/9.64 f_279(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) -> f_280(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) :|: 0 = 0 31.32/9.64 f_280(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) -> f_281(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) :|: v97 < v93 && 2 <= v93 && 3 <= v92 31.32/9.64 f_281(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) -> f_283(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) :|: 0 = 0 31.32/9.64 f_283(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) -> f_285(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) :|: TRUE 31.32/9.64 f_285(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v96, v98, v99, v100, v101, v102, 3, 2, 4) -> f_287(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v98, v99, v100, v101, v102, 3, 2, 4) :|: 0 = 0 31.32/9.64 f_287(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v98, v99, v100, v101, v102, 3, 2, 4) -> f_289(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) :|: v103 = 1 + v97 && 2 <= v103 31.32/9.64 f_289(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) -> f_291(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) :|: TRUE 31.32/9.64 f_291(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) -> f_293(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) :|: TRUE 31.32/9.64 f_293(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) -> f_295(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) :|: TRUE 31.32/9.64 f_295(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) -> f_274(v87, v88, v89, v90, v91, v92, v93, 1, 0, v97, v103, v98, v99, v100, v101, v102, 3, 2, 4) :|: TRUE 31.32/9.64 f_274(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) -> f_275(v87, v88, v89, v90, v91, v92, v93, 1, 0, v96, v97, v98, v99, v100, v101, v102, 3, 2, 4) :|: 0 = 0 31.32/9.64 Combined rules. Obtained 1 rulesP rules: 31.32/9.64 f_275(v87:0, v88:0, v89:0, v90:0, v91:0, v92:0, v93:0, 1, 0, v96:0, v97:0, v98:0, v99:0, v100:0, v101:0, v102:0, 3, 2, 4) -> f_275(v87:0, v88:0, v89:0, v90:0, v91:0, v92:0, v93:0, 1, 0, v97:0, 1 + v97:0, v98:0, v99:0, v100:0, v101:0, v102:0, 3, 2, 4) :|: v93:0 > 1 && v97:0 < v93:0 && v97:0 > 0 && v92:0 > 2 31.32/9.64 Filtered unneeded arguments: 31.32/9.64 f_275(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19) -> f_275(x6, x7, x11) 31.32/9.64 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 31.32/9.64 f_275(v92:0, v93:0, v97:0) -> f_275(v92:0, v93:0, 1 + v97:0) :|: v97:0 < v93:0 && v93:0 > 1 && v92:0 > 2 && v97:0 > 0 31.32/9.64 31.32/9.64 ---------------------------------------- 31.32/9.64 31.32/9.64 (16) 31.32/9.64 Obligation: 31.32/9.64 Rules: 31.32/9.64 f_275(v92:0, v93:0, v97:0) -> f_275(v92:0, v93:0, 1 + v97:0) :|: v97:0 < v93:0 && v93:0 > 1 && v92:0 > 2 && v97:0 > 0 31.32/9.64 31.32/9.64 ---------------------------------------- 31.32/9.64 31.32/9.64 (17) IntTRSCompressionProof (EQUIVALENT) 31.32/9.64 Compressed rules. 31.32/9.64 ---------------------------------------- 31.32/9.64 31.32/9.64 (18) 31.32/9.64 Obligation: 31.32/9.64 Rules: 31.32/9.64 f_275(v92:0:0, v93:0:0, v97:0:0) -> f_275(v92:0:0, v93:0:0, 1 + v97:0:0) :|: v92:0:0 > 2 && v97:0:0 > 0 && v93:0:0 > 1 && v97:0:0 < v93:0:0 31.32/9.64 31.32/9.64 ---------------------------------------- 31.32/9.64 31.32/9.64 (19) PolynomialOrderProcessor (EQUIVALENT) 31.32/9.64 Found the following polynomial interpretation: 31.32/9.64 [f_275(x, x1, x2)] = -1 + x1 - x2 31.32/9.64 31.32/9.64 The following rules are decreasing: 31.32/9.64 f_275(v92:0:0, v93:0:0, v97:0:0) -> f_275(v92:0:0, v93:0:0, 1 + v97:0:0) :|: v92:0:0 > 2 && v97:0:0 > 0 && v93:0:0 > 1 && v97:0:0 < v93:0:0 31.32/9.64 The following rules are bounded: 31.32/9.64 f_275(v92:0:0, v93:0:0, v97:0:0) -> f_275(v92:0:0, v93:0:0, 1 + v97:0:0) :|: v92:0:0 > 2 && v97:0:0 > 0 && v93:0:0 > 1 && v97:0:0 < v93:0:0 31.32/9.64 31.32/9.64 ---------------------------------------- 31.32/9.64 31.32/9.64 (20) 31.32/9.64 YES 31.49/9.80 EOF