76.99/51.00 YES 76.99/51.00 76.99/51.00 Ultimate: Cannot open display: 76.99/51.00 This is Ultimate 0.1.24-8dc7c08-m 76.99/51.00 [2019-03-28 12:50:29,729 INFO L170 SettingsManager]: Resetting all preferences to default values... 76.99/51.00 [2019-03-28 12:50:29,732 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values 76.99/51.00 [2019-03-28 12:50:29,743 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,743 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values 76.99/51.00 [2019-03-28 12:50:29,744 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values 76.99/51.00 [2019-03-28 12:50:29,746 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values 76.99/51.00 [2019-03-28 12:50:29,747 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values 76.99/51.00 [2019-03-28 12:50:29,749 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values 76.99/51.00 [2019-03-28 12:50:29,749 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values 76.99/51.00 [2019-03-28 12:50:29,750 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,751 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values 76.99/51.00 [2019-03-28 12:50:29,751 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values 76.99/51.00 [2019-03-28 12:50:29,752 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values 76.99/51.00 [2019-03-28 12:50:29,753 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values 76.99/51.00 [2019-03-28 12:50:29,754 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values 76.99/51.00 [2019-03-28 12:50:29,755 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values 76.99/51.00 [2019-03-28 12:50:29,756 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values 76.99/51.00 [2019-03-28 12:50:29,759 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values 76.99/51.00 [2019-03-28 12:50:29,760 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values 76.99/51.00 [2019-03-28 12:50:29,761 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values 76.99/51.00 [2019-03-28 12:50:29,762 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values 76.99/51.00 [2019-03-28 12:50:29,764 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,765 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,765 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values 76.99/51.00 [2019-03-28 12:50:29,766 INFO L174 SettingsManager]: Resetting IcfgToChc preferences to default values 76.99/51.00 [2019-03-28 12:50:29,766 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values 76.99/51.00 [2019-03-28 12:50:29,767 INFO L177 SettingsManager]: ReqToTest provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,767 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values 76.99/51.00 [2019-03-28 12:50:29,768 INFO L174 SettingsManager]: Resetting ChcSmtPrinter preferences to default values 76.99/51.00 [2019-03-28 12:50:29,768 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values 76.99/51.00 [2019-03-28 12:50:29,769 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values 76.99/51.00 [2019-03-28 12:50:29,770 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,770 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values 76.99/51.00 [2019-03-28 12:50:29,771 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,771 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... 76.99/51.00 [2019-03-28 12:50:29,771 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values 76.99/51.00 [2019-03-28 12:50:29,772 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values 76.99/51.00 [2019-03-28 12:50:29,773 INFO L181 SettingsManager]: Finished resetting all preferences to default values... 76.99/51.00 [2019-03-28 12:50:29,773 INFO L98 SettingsManager]: Beginning loading settings from /export/starexec/sandbox/solver/bin/./../termcomp2017.epf 76.99/51.00 [2019-03-28 12:50:29,787 INFO L110 SettingsManager]: Loading preferences was successful 76.99/51.00 [2019-03-28 12:50:29,788 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: 76.99/51.00 [2019-03-28 12:50:29,789 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: 76.99/51.00 [2019-03-28 12:50:29,789 INFO L133 SettingsManager]: * Rewrite not-equals=true 76.99/51.00 [2019-03-28 12:50:29,789 INFO L133 SettingsManager]: * Create parallel compositions if possible=false 76.99/51.00 [2019-03-28 12:50:29,789 INFO L133 SettingsManager]: * Minimize states using LBE with the strategy=SINGLE 76.99/51.00 [2019-03-28 12:50:29,789 INFO L133 SettingsManager]: * Use SBE=true 76.99/51.00 [2019-03-28 12:50:29,790 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: 76.99/51.00 [2019-03-28 12:50:29,790 INFO L133 SettingsManager]: * Use old map elimination=false 76.99/51.00 [2019-03-28 12:50:29,790 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false 76.99/51.00 [2019-03-28 12:50:29,790 INFO L133 SettingsManager]: * Buchi interpolant automaton construction strategy=DANDELION 76.99/51.00 [2019-03-28 12:50:29,790 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true 76.99/51.00 [2019-03-28 12:50:29,790 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES 76.99/51.00 [2019-03-28 12:50:29,791 INFO L133 SettingsManager]: * Construct termination proof for TermComp=true 76.99/51.00 [2019-03-28 12:50:29,791 INFO L133 SettingsManager]: * Command for external solver (GNTA synthesis)=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:12000 76.99/51.00 [2019-03-28 12:50:29,791 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: 76.99/51.00 [2019-03-28 12:50:29,791 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false 76.99/51.00 [2019-03-28 12:50:29,791 INFO L133 SettingsManager]: * Check division by zero=IGNORE 76.99/51.00 [2019-03-28 12:50:29,791 INFO L133 SettingsManager]: * Check if freed pointer was valid=false 76.99/51.00 [2019-03-28 12:50:29,792 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false 76.99/51.00 [2019-03-28 12:50:29,792 INFO L133 SettingsManager]: * How to treat unsigned ints differently from normal ones=IGNORE 76.99/51.00 [2019-03-28 12:50:29,792 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: 76.99/51.00 [2019-03-28 12:50:29,792 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements 76.99/51.00 [2019-03-28 12:50:29,792 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump 76.99/51.00 [2019-03-28 12:50:29,792 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 76.99/51.00 [2019-03-28 12:50:29,793 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: 76.99/51.00 [2019-03-28 12:50:29,793 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles 76.99/51.00 [2019-03-28 12:50:29,793 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL 76.99/51.00 [2019-03-28 12:50:29,793 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true 76.99/51.00 [2019-03-28 12:50:29,818 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp 76.99/51.00 [2019-03-28 12:50:29,832 INFO L259 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized 76.99/51.00 [2019-03-28 12:50:29,835 INFO L215 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. 76.99/51.00 [2019-03-28 12:50:29,837 INFO L271 PluginConnector]: Initializing CDTParser... 76.99/51.00 [2019-03-28 12:50:29,837 INFO L276 PluginConnector]: CDTParser initialized 76.99/51.00 [2019-03-28 12:50:29,838 INFO L430 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /export/starexec/sandbox/benchmark/theBenchmark.c 76.99/51.00 [2019-03-28 12:50:29,902 INFO L221 CDTParser]: Created temporary CDT project at /export/starexec/sandbox/tmp/84a5eb3cd6434f8ca81b14321138932f/FLAGe62db38dc 76.99/51.00 [2019-03-28 12:50:30,247 INFO L307 CDTParser]: Found 1 translation units. 76.99/51.00 [2019-03-28 12:50:30,248 INFO L161 CDTParser]: Scanning /export/starexec/sandbox/benchmark/theBenchmark.c 76.99/51.00 [2019-03-28 12:50:30,248 WARN L117 ultiparseSymbolTable]: System include stdlib.h could not be resolved by CDT -- only built-in system includes are available. 76.99/51.00 [2019-03-28 12:50:30,255 INFO L355 CDTParser]: About to delete temporary CDT project at /export/starexec/sandbox/tmp/84a5eb3cd6434f8ca81b14321138932f/FLAGe62db38dc 76.99/51.00 [2019-03-28 12:50:30,658 INFO L363 CDTParser]: Successfully deleted /export/starexec/sandbox/tmp/84a5eb3cd6434f8ca81b14321138932f 76.99/51.00 [2019-03-28 12:50:30,670 INFO L297 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### 76.99/51.00 [2019-03-28 12:50:30,672 INFO L131 ToolchainWalker]: Walking toolchain with 7 elements. 76.99/51.00 [2019-03-28 12:50:30,673 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- 76.99/51.00 [2019-03-28 12:50:30,673 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... 76.99/51.00 [2019-03-28 12:50:30,677 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized 76.99/51.00 [2019-03-28 12:50:30,678 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:30,681 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b0df479 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30, skipping insertion in model container 76.99/51.00 [2019-03-28 12:50:30,681 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:30,689 INFO L145 MainTranslator]: Starting translation in SV-COMP mode 76.99/51.00 [2019-03-28 12:50:30,710 INFO L176 MainTranslator]: Built tables and reachable declarations 76.99/51.00 [2019-03-28 12:50:30,885 INFO L206 PostProcessor]: Analyzing one entry point: main 76.99/51.00 [2019-03-28 12:50:30,898 INFO L191 MainTranslator]: Completed pre-run 76.99/51.00 [2019-03-28 12:50:30,980 INFO L206 PostProcessor]: Analyzing one entry point: main 76.99/51.00 [2019-03-28 12:50:30,996 INFO L195 MainTranslator]: Completed translation 76.99/51.00 [2019-03-28 12:50:30,997 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30 WrapperNode 76.99/51.00 [2019-03-28 12:50:30,997 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- 76.99/51.00 [2019-03-28 12:50:30,998 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- 76.99/51.00 [2019-03-28 12:50:30,998 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... 76.99/51.00 [2019-03-28 12:50:30,998 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized 76.99/51.00 [2019-03-28 12:50:31,008 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,017 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,040 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- 76.99/51.00 [2019-03-28 12:50:31,041 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- 76.99/51.00 [2019-03-28 12:50:31,041 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... 76.99/51.00 [2019-03-28 12:50:31,041 INFO L276 PluginConnector]: Boogie Preprocessor initialized 76.99/51.00 [2019-03-28 12:50:31,050 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,051 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,053 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,053 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,059 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,064 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,065 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,068 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- 76.99/51.00 [2019-03-28 12:50:31,068 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- 76.99/51.00 [2019-03-28 12:50:31,069 INFO L271 PluginConnector]: Initializing RCFGBuilder... 76.99/51.00 [2019-03-28 12:50:31,069 INFO L276 PluginConnector]: RCFGBuilder initialized 76.99/51.00 [2019-03-28 12:50:31,070 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (1/1) ... 76.99/51.00 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 76.99/51.00 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 (exit command is (exit), workingDir is null) 76.99/51.00 Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 76.99/51.00 [2019-03-28 12:50:31,132 INFO L130 BoogieDeclarations]: Found specification of procedure write~int 76.99/51.00 [2019-03-28 12:50:31,132 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start 76.99/51.00 [2019-03-28 12:50:31,132 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start 76.99/51.00 [2019-03-28 12:50:31,132 INFO L130 BoogieDeclarations]: Found specification of procedure read~int 76.99/51.00 [2019-03-28 12:50:31,133 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack 76.99/51.00 [2019-03-28 12:50:31,133 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc 76.99/51.00 [2019-03-28 12:50:31,410 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) 76.99/51.00 [2019-03-28 12:50:31,410 INFO L286 CfgBuilder]: Removed 7 assue(true) statements. 76.99/51.00 [2019-03-28 12:50:31,412 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:50:31 BoogieIcfgContainer 76.99/51.00 [2019-03-28 12:50:31,412 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- 76.99/51.00 [2019-03-28 12:50:31,412 INFO L113 PluginConnector]: ------------------------BlockEncodingV2---------------------------- 76.99/51.00 [2019-03-28 12:50:31,413 INFO L271 PluginConnector]: Initializing BlockEncodingV2... 76.99/51.00 [2019-03-28 12:50:31,415 INFO L276 PluginConnector]: BlockEncodingV2 initialized 76.99/51.00 [2019-03-28 12:50:31,415 INFO L185 PluginConnector]: Executing the observer BlockEncodingObserver from plugin BlockEncodingV2 for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:50:31" (1/1) ... 76.99/51.00 [2019-03-28 12:50:31,434 INFO L313 BlockEncoder]: Initial Icfg 43 locations, 51 edges 76.99/51.00 [2019-03-28 12:50:31,436 INFO L258 BlockEncoder]: Using Remove infeasible edges 76.99/51.00 [2019-03-28 12:50:31,436 INFO L263 BlockEncoder]: Using Maximize final states 76.99/51.00 [2019-03-28 12:50:31,437 INFO L270 BlockEncoder]: Using Minimize states even if more edges are added than removed.=false 76.99/51.00 [2019-03-28 12:50:31,437 INFO L276 BlockEncoder]: Using Minimize states using LBE with the strategy=SINGLE 76.99/51.00 [2019-03-28 12:50:31,439 INFO L296 BlockEncoder]: Using Remove sink states 76.99/51.00 [2019-03-28 12:50:31,440 INFO L171 BlockEncoder]: Using Apply optimizations until nothing changes=true 76.99/51.00 [2019-03-28 12:50:31,440 INFO L179 BlockEncoder]: Using Rewrite not-equals 76.99/51.00 [2019-03-28 12:50:31,469 INFO L185 BlockEncoder]: Using Use SBE 76.99/51.00 [2019-03-28 12:50:31,503 INFO L200 BlockEncoder]: SBE split 21 edges 76.99/51.00 [2019-03-28 12:50:31,508 INFO L70 emoveInfeasibleEdges]: Removed 1 edges and 0 locations because of local infeasibility 76.99/51.00 [2019-03-28 12:50:31,510 INFO L71 MaximizeFinalStates]: 0 new accepting states 76.99/51.00 [2019-03-28 12:50:31,543 INFO L100 BaseMinimizeStates]: Removed 12 edges and 6 locations by large block encoding 76.99/51.00 [2019-03-28 12:50:31,546 INFO L70 RemoveSinkStates]: Removed 8 edges and 4 locations by removing sink states 76.99/51.00 [2019-03-28 12:50:31,548 INFO L70 emoveInfeasibleEdges]: Removed 0 edges and 0 locations because of local infeasibility 76.99/51.00 [2019-03-28 12:50:31,548 INFO L71 MaximizeFinalStates]: 0 new accepting states 76.99/51.00 [2019-03-28 12:50:31,548 INFO L100 BaseMinimizeStates]: Removed 0 edges and 0 locations by large block encoding 76.99/51.00 [2019-03-28 12:50:31,549 INFO L70 RemoveSinkStates]: Removed 0 edges and 0 locations by removing sink states 76.99/51.00 [2019-03-28 12:50:31,549 INFO L313 BlockEncoder]: Encoded RCFG 33 locations, 62 edges 76.99/51.00 [2019-03-28 12:50:31,550 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:50:31 BasicIcfg 76.99/51.00 [2019-03-28 12:50:31,550 INFO L132 PluginConnector]: ------------------------ END BlockEncodingV2---------------------------- 76.99/51.00 [2019-03-28 12:50:31,551 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- 76.99/51.00 [2019-03-28 12:50:31,551 INFO L271 PluginConnector]: Initializing TraceAbstraction... 76.99/51.00 [2019-03-28 12:50:31,555 INFO L276 PluginConnector]: TraceAbstraction initialized 76.99/51.00 [2019-03-28 12:50:31,555 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.03 12:50:30" (1/4) ... 76.99/51.00 [2019-03-28 12:50:31,556 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74a97fa9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 12:50:31, skipping insertion in model container 76.99/51.00 [2019-03-28 12:50:31,556 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (2/4) ... 76.99/51.00 [2019-03-28 12:50:31,556 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74a97fa9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 12:50:31, skipping insertion in model container 76.99/51.00 [2019-03-28 12:50:31,556 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:50:31" (3/4) ... 76.99/51.00 [2019-03-28 12:50:31,557 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@74a97fa9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:50:31, skipping insertion in model container 76.99/51.00 [2019-03-28 12:50:31,557 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:50:31" (4/4) ... 76.99/51.00 [2019-03-28 12:50:31,559 INFO L112 eAbstractionObserver]: Analyzing ICFG theBenchmark.c_BEv2 76.99/51.00 [2019-03-28 12:50:31,569 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION 76.99/51.00 [2019-03-28 12:50:31,577 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 14 error locations. 76.99/51.00 [2019-03-28 12:50:31,594 INFO L257 AbstractCegarLoop]: Starting to check reachability of 14 error locations. 76.99/51.00 [2019-03-28 12:50:31,623 INFO L133 ementStrategyFactory]: Using default assertion order modulation 76.99/51.00 [2019-03-28 12:50:31,624 INFO L382 AbstractCegarLoop]: Interprodecural is true 76.99/51.00 [2019-03-28 12:50:31,624 INFO L383 AbstractCegarLoop]: Hoare is true 76.99/51.00 [2019-03-28 12:50:31,624 INFO L384 AbstractCegarLoop]: Compute interpolants for ForwardPredicates 76.99/51.00 [2019-03-28 12:50:31,624 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE 76.99/51.00 [2019-03-28 12:50:31,624 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION 76.99/51.00 [2019-03-28 12:50:31,625 INFO L387 AbstractCegarLoop]: Difference is false 76.99/51.00 [2019-03-28 12:50:31,625 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA 76.99/51.00 [2019-03-28 12:50:31,625 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== 76.99/51.00 [2019-03-28 12:50:31,640 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states. 76.99/51.00 [2019-03-28 12:50:31,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 76.99/51.00 [2019-03-28 12:50:31,646 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:31,647 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:31,648 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:31,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:31,653 INFO L82 PathProgramCache]: Analyzing trace with hash 225676850, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:31,655 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:31,656 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:31,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:31,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:31,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:31,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:31,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:31,839 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:31,839 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 76.99/51.00 [2019-03-28 12:50:31,843 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:31,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:31,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:31,860 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:32,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:32,017 INFO L93 Difference]: Finished difference Result 33 states and 62 transitions. 76.99/51.00 [2019-03-28 12:50:32,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,019 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 76.99/51.00 [2019-03-28 12:50:32,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:32,033 INFO L225 Difference]: With dead ends: 33 76.99/51.00 [2019-03-28 12:50:32,033 INFO L226 Difference]: Without dead ends: 32 76.99/51.00 [2019-03-28 12:50:32,037 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. 76.99/51.00 [2019-03-28 12:50:32,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. 76.99/51.00 [2019-03-28 12:50:32,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. 76.99/51.00 [2019-03-28 12:50:32,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 60 transitions. 76.99/51.00 [2019-03-28 12:50:32,078 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 60 transitions. Word has length 5 76.99/51.00 [2019-03-28 12:50:32,079 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:32,079 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 60 transitions. 76.99/51.00 [2019-03-28 12:50:32,079 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,080 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 60 transitions. 76.99/51.00 [2019-03-28 12:50:32,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 76.99/51.00 [2019-03-28 12:50:32,080 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:32,080 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:32,081 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:32,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:32,081 INFO L82 PathProgramCache]: Analyzing trace with hash 225676852, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:32,081 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:32,081 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:32,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,083 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,083 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:32,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:32,133 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:32,133 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 76.99/51.00 [2019-03-28 12:50:32,135 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:32,135 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:32,135 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,136 INFO L87 Difference]: Start difference. First operand 32 states and 60 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:32,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:32,226 INFO L93 Difference]: Finished difference Result 33 states and 60 transitions. 76.99/51.00 [2019-03-28 12:50:32,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,226 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 76.99/51.00 [2019-03-28 12:50:32,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:32,228 INFO L225 Difference]: With dead ends: 33 76.99/51.00 [2019-03-28 12:50:32,228 INFO L226 Difference]: Without dead ends: 32 76.99/51.00 [2019-03-28 12:50:32,229 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. 76.99/51.00 [2019-03-28 12:50:32,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. 76.99/51.00 [2019-03-28 12:50:32,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. 76.99/51.00 [2019-03-28 12:50:32,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 59 transitions. 76.99/51.00 [2019-03-28 12:50:32,234 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 59 transitions. Word has length 5 76.99/51.00 [2019-03-28 12:50:32,235 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:32,235 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 59 transitions. 76.99/51.00 [2019-03-28 12:50:32,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,235 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 59 transitions. 76.99/51.00 [2019-03-28 12:50:32,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 76.99/51.00 [2019-03-28 12:50:32,236 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:32,236 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:32,236 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:32,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:32,236 INFO L82 PathProgramCache]: Analyzing trace with hash 225676853, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:32,237 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:32,237 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:32,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:32,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:32,275 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:32,275 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:32,276 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 76.99/51.00 [2019-03-28 12:50:32,276 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 76.99/51.00 [2019-03-28 12:50:32,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 76.99/51.00 [2019-03-28 12:50:32,277 INFO L87 Difference]: Start difference. First operand 32 states and 59 transitions. Second operand 4 states. 76.99/51.00 [2019-03-28 12:50:32,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:32,369 INFO L93 Difference]: Finished difference Result 32 states and 59 transitions. 76.99/51.00 [2019-03-28 12:50:32,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:32,370 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 5 76.99/51.00 [2019-03-28 12:50:32,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:32,370 INFO L225 Difference]: With dead ends: 32 76.99/51.00 [2019-03-28 12:50:32,371 INFO L226 Difference]: Without dead ends: 31 76.99/51.00 [2019-03-28 12:50:32,371 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 76.99/51.00 [2019-03-28 12:50:32,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. 76.99/51.00 [2019-03-28 12:50:32,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. 76.99/51.00 [2019-03-28 12:50:32,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. 76.99/51.00 [2019-03-28 12:50:32,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 58 transitions. 76.99/51.00 [2019-03-28 12:50:32,376 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 58 transitions. Word has length 5 76.99/51.00 [2019-03-28 12:50:32,376 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:32,376 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 58 transitions. 76.99/51.00 [2019-03-28 12:50:32,377 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:32,377 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 58 transitions. 76.99/51.00 [2019-03-28 12:50:32,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 76.99/51.00 [2019-03-28 12:50:32,377 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:32,377 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:32,378 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:32,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:32,378 INFO L82 PathProgramCache]: Analyzing trace with hash -1593954334, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:32,378 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:32,378 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:32,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:32,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:32,407 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:32,407 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 76.99/51.00 [2019-03-28 12:50:32,407 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:32,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:32,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,408 INFO L87 Difference]: Start difference. First operand 31 states and 58 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:32,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:32,480 INFO L93 Difference]: Finished difference Result 31 states and 58 transitions. 76.99/51.00 [2019-03-28 12:50:32,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,480 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 6 76.99/51.00 [2019-03-28 12:50:32,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:32,481 INFO L225 Difference]: With dead ends: 31 76.99/51.00 [2019-03-28 12:50:32,482 INFO L226 Difference]: Without dead ends: 30 76.99/51.00 [2019-03-28 12:50:32,482 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. 76.99/51.00 [2019-03-28 12:50:32,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. 76.99/51.00 [2019-03-28 12:50:32,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. 76.99/51.00 [2019-03-28 12:50:32,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 56 transitions. 76.99/51.00 [2019-03-28 12:50:32,487 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 56 transitions. Word has length 6 76.99/51.00 [2019-03-28 12:50:32,487 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:32,487 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 56 transitions. 76.99/51.00 [2019-03-28 12:50:32,487 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,487 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 56 transitions. 76.99/51.00 [2019-03-28 12:50:32,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 76.99/51.00 [2019-03-28 12:50:32,488 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:32,488 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:32,488 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:32,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:32,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1593954332, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:32,489 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:32,489 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:32,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,490 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,490 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:32,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:32,527 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:32,527 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 76.99/51.00 [2019-03-28 12:50:32,527 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:32,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:32,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,528 INFO L87 Difference]: Start difference. First operand 30 states and 56 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:32,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:32,616 INFO L93 Difference]: Finished difference Result 31 states and 56 transitions. 76.99/51.00 [2019-03-28 12:50:32,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,617 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 6 76.99/51.00 [2019-03-28 12:50:32,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:32,618 INFO L225 Difference]: With dead ends: 31 76.99/51.00 [2019-03-28 12:50:32,618 INFO L226 Difference]: Without dead ends: 30 76.99/51.00 [2019-03-28 12:50:32,619 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. 76.99/51.00 [2019-03-28 12:50:32,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. 76.99/51.00 [2019-03-28 12:50:32,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. 76.99/51.00 [2019-03-28 12:50:32,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 55 transitions. 76.99/51.00 [2019-03-28 12:50:32,624 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 55 transitions. Word has length 6 76.99/51.00 [2019-03-28 12:50:32,624 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:32,624 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 55 transitions. 76.99/51.00 [2019-03-28 12:50:32,624 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,624 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 55 transitions. 76.99/51.00 [2019-03-28 12:50:32,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 76.99/51.00 [2019-03-28 12:50:32,625 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:32,625 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:32,625 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:32,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:32,625 INFO L82 PathProgramCache]: Analyzing trace with hash -1593954331, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:32,625 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:32,626 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:32,627 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,627 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,627 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:32,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:32,660 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:32,660 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:32,660 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 76.99/51.00 [2019-03-28 12:50:32,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 76.99/51.00 [2019-03-28 12:50:32,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 76.99/51.00 [2019-03-28 12:50:32,661 INFO L87 Difference]: Start difference. First operand 30 states and 55 transitions. Second operand 4 states. 76.99/51.00 [2019-03-28 12:50:32,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:32,736 INFO L93 Difference]: Finished difference Result 30 states and 55 transitions. 76.99/51.00 [2019-03-28 12:50:32,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:32,736 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 6 76.99/51.00 [2019-03-28 12:50:32,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:32,737 INFO L225 Difference]: With dead ends: 30 76.99/51.00 [2019-03-28 12:50:32,737 INFO L226 Difference]: Without dead ends: 29 76.99/51.00 [2019-03-28 12:50:32,738 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 76.99/51.00 [2019-03-28 12:50:32,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. 76.99/51.00 [2019-03-28 12:50:32,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. 76.99/51.00 [2019-03-28 12:50:32,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. 76.99/51.00 [2019-03-28 12:50:32,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 54 transitions. 76.99/51.00 [2019-03-28 12:50:32,743 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 54 transitions. Word has length 6 76.99/51.00 [2019-03-28 12:50:32,744 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:32,744 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 54 transitions. 76.99/51.00 [2019-03-28 12:50:32,744 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:32,744 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 54 transitions. 76.99/51.00 [2019-03-28 12:50:32,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 76.99/51.00 [2019-03-28 12:50:32,745 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:32,745 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:32,745 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:32,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:32,746 INFO L82 PathProgramCache]: Analyzing trace with hash -1757036471, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:32,746 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:32,746 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:32,747 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,748 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:32,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:32,778 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:32,778 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:32,778 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:32,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:32,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,779 INFO L87 Difference]: Start difference. First operand 29 states and 54 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:32,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:32,894 INFO L93 Difference]: Finished difference Result 58 states and 108 transitions. 76.99/51.00 [2019-03-28 12:50:32,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,894 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 10 76.99/51.00 [2019-03-28 12:50:32,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:32,895 INFO L225 Difference]: With dead ends: 58 76.99/51.00 [2019-03-28 12:50:32,895 INFO L226 Difference]: Without dead ends: 36 76.99/51.00 [2019-03-28 12:50:32,896 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:32,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. 76.99/51.00 [2019-03-28 12:50:32,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 34. 76.99/51.00 [2019-03-28 12:50:32,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. 76.99/51.00 [2019-03-28 12:50:32,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 66 transitions. 76.99/51.00 [2019-03-28 12:50:32,902 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 66 transitions. Word has length 10 76.99/51.00 [2019-03-28 12:50:32,902 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:32,902 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 66 transitions. 76.99/51.00 [2019-03-28 12:50:32,902 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:32,903 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 66 transitions. 76.99/51.00 [2019-03-28 12:50:32,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 76.99/51.00 [2019-03-28 12:50:32,903 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:32,903 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:32,903 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:32,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:32,904 INFO L82 PathProgramCache]: Analyzing trace with hash -1757035510, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:32,904 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:32,904 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:32,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:32,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:32,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:32,942 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:32,942 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:32,942 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 76.99/51.00 [2019-03-28 12:50:32,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 76.99/51.00 [2019-03-28 12:50:32,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 76.99/51.00 [2019-03-28 12:50:32,943 INFO L87 Difference]: Start difference. First operand 34 states and 66 transitions. Second operand 4 states. 76.99/51.00 [2019-03-28 12:50:33,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,021 INFO L93 Difference]: Finished difference Result 34 states and 66 transitions. 76.99/51.00 [2019-03-28 12:50:33,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:33,022 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 76.99/51.00 [2019-03-28 12:50:33,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,023 INFO L225 Difference]: With dead ends: 34 76.99/51.00 [2019-03-28 12:50:33,023 INFO L226 Difference]: Without dead ends: 31 76.99/51.00 [2019-03-28 12:50:33,024 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 76.99/51.00 [2019-03-28 12:50:33,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. 76.99/51.00 [2019-03-28 12:50:33,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. 76.99/51.00 [2019-03-28 12:50:33,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. 76.99/51.00 [2019-03-28 12:50:33,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 58 transitions. 76.99/51.00 [2019-03-28 12:50:33,028 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 58 transitions. Word has length 10 76.99/51.00 [2019-03-28 12:50:33,028 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,029 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 58 transitions. 76.99/51.00 [2019-03-28 12:50:33,029 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:33,029 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 58 transitions. 76.99/51.00 [2019-03-28 12:50:33,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 76.99/51.00 [2019-03-28 12:50:33,029 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,029 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,030 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1757035508, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,030 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,030 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,032 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,072 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:33,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 76.99/51.00 [2019-03-28 12:50:33,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 76.99/51.00 [2019-03-28 12:50:33,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 76.99/51.00 [2019-03-28 12:50:33,074 INFO L87 Difference]: Start difference. First operand 31 states and 58 transitions. Second operand 4 states. 76.99/51.00 [2019-03-28 12:50:33,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,178 INFO L93 Difference]: Finished difference Result 58 states and 103 transitions. 76.99/51.00 [2019-03-28 12:50:33,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:33,178 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 76.99/51.00 [2019-03-28 12:50:33,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,179 INFO L225 Difference]: With dead ends: 58 76.99/51.00 [2019-03-28 12:50:33,179 INFO L226 Difference]: Without dead ends: 55 76.99/51.00 [2019-03-28 12:50:33,179 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 76.99/51.00 [2019-03-28 12:50:33,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. 76.99/51.00 [2019-03-28 12:50:33,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 43. 76.99/51.00 [2019-03-28 12:50:33,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. 76.99/51.00 [2019-03-28 12:50:33,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 87 transitions. 76.99/51.00 [2019-03-28 12:50:33,187 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 87 transitions. Word has length 10 76.99/51.00 [2019-03-28 12:50:33,187 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,187 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 87 transitions. 76.99/51.00 [2019-03-28 12:50:33,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 76.99/51.00 [2019-03-28 12:50:33,187 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 87 transitions. 76.99/51.00 [2019-03-28 12:50:33,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 76.99/51.00 [2019-03-28 12:50:33,188 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,188 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,188 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,188 INFO L82 PathProgramCache]: Analyzing trace with hash -1757035507, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,189 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,189 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,252 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,252 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 76.99/51.00 [2019-03-28 12:50:33,252 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 76.99/51.00 [2019-03-28 12:50:33,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 76.99/51.00 [2019-03-28 12:50:33,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 76.99/51.00 [2019-03-28 12:50:33,253 INFO L87 Difference]: Start difference. First operand 43 states and 87 transitions. Second operand 6 states. 76.99/51.00 [2019-03-28 12:50:33,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,381 INFO L93 Difference]: Finished difference Result 55 states and 99 transitions. 76.99/51.00 [2019-03-28 12:50:33,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 76.99/51.00 [2019-03-28 12:50:33,382 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 10 76.99/51.00 [2019-03-28 12:50:33,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,383 INFO L225 Difference]: With dead ends: 55 76.99/51.00 [2019-03-28 12:50:33,383 INFO L226 Difference]: Without dead ends: 52 76.99/51.00 [2019-03-28 12:50:33,383 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 76.99/51.00 [2019-03-28 12:50:33,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. 76.99/51.00 [2019-03-28 12:50:33,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 43. 76.99/51.00 [2019-03-28 12:50:33,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. 76.99/51.00 [2019-03-28 12:50:33,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 83 transitions. 76.99/51.00 [2019-03-28 12:50:33,389 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 83 transitions. Word has length 10 76.99/51.00 [2019-03-28 12:50:33,390 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,390 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 83 transitions. 76.99/51.00 [2019-03-28 12:50:33,390 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 76.99/51.00 [2019-03-28 12:50:33,390 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 83 transitions. 76.99/51.00 [2019-03-28 12:50:33,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 76.99/51.00 [2019-03-28 12:50:33,391 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,391 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,391 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,391 INFO L82 PathProgramCache]: Analyzing trace with hash 1366471907, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,391 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,392 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,392 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,433 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,433 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 76.99/51.00 [2019-03-28 12:50:33,433 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:33,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:33,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,434 INFO L87 Difference]: Start difference. First operand 43 states and 83 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:33,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,484 INFO L93 Difference]: Finished difference Result 43 states and 83 transitions. 76.99/51.00 [2019-03-28 12:50:33,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,484 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 76.99/51.00 [2019-03-28 12:50:33,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,485 INFO L225 Difference]: With dead ends: 43 76.99/51.00 [2019-03-28 12:50:33,485 INFO L226 Difference]: Without dead ends: 41 76.99/51.00 [2019-03-28 12:50:33,486 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. 76.99/51.00 [2019-03-28 12:50:33,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. 76.99/51.00 [2019-03-28 12:50:33,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. 76.99/51.00 [2019-03-28 12:50:33,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 77 transitions. 76.99/51.00 [2019-03-28 12:50:33,491 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 77 transitions. Word has length 11 76.99/51.00 [2019-03-28 12:50:33,491 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,491 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 77 transitions. 76.99/51.00 [2019-03-28 12:50:33,491 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,492 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 77 transitions. 76.99/51.00 [2019-03-28 12:50:33,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 76.99/51.00 [2019-03-28 12:50:33,492 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,492 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,492 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1366471909, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,493 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,493 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,545 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,545 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 76.99/51.00 [2019-03-28 12:50:33,545 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states 76.99/51.00 [2019-03-28 12:50:33,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 76.99/51.00 [2019-03-28 12:50:33,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 76.99/51.00 [2019-03-28 12:50:33,546 INFO L87 Difference]: Start difference. First operand 41 states and 77 transitions. Second operand 5 states. 76.99/51.00 [2019-03-28 12:50:33,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,642 INFO L93 Difference]: Finished difference Result 48 states and 87 transitions. 76.99/51.00 [2019-03-28 12:50:33,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 76.99/51.00 [2019-03-28 12:50:33,643 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 76.99/51.00 [2019-03-28 12:50:33,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,643 INFO L225 Difference]: With dead ends: 48 76.99/51.00 [2019-03-28 12:50:33,644 INFO L226 Difference]: Without dead ends: 44 76.99/51.00 [2019-03-28 12:50:33,644 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 76.99/51.00 [2019-03-28 12:50:33,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. 76.99/51.00 [2019-03-28 12:50:33,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 40. 76.99/51.00 [2019-03-28 12:50:33,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. 76.99/51.00 [2019-03-28 12:50:33,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 73 transitions. 76.99/51.00 [2019-03-28 12:50:33,649 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 73 transitions. Word has length 11 76.99/51.00 [2019-03-28 12:50:33,649 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,649 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 73 transitions. 76.99/51.00 [2019-03-28 12:50:33,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. 76.99/51.00 [2019-03-28 12:50:33,649 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 73 transitions. 76.99/51.00 [2019-03-28 12:50:33,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 76.99/51.00 [2019-03-28 12:50:33,650 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,650 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,650 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,651 INFO L82 PathProgramCache]: Analyzing trace with hash -172792944, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,651 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,651 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,672 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,672 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,673 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:33,673 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:33,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:33,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,674 INFO L87 Difference]: Start difference. First operand 40 states and 73 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:33,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,732 INFO L93 Difference]: Finished difference Result 71 states and 134 transitions. 76.99/51.00 [2019-03-28 12:50:33,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,733 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 76.99/51.00 [2019-03-28 12:50:33,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,733 INFO L225 Difference]: With dead ends: 71 76.99/51.00 [2019-03-28 12:50:33,733 INFO L226 Difference]: Without dead ends: 44 76.99/51.00 [2019-03-28 12:50:33,734 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. 76.99/51.00 [2019-03-28 12:50:33,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. 76.99/51.00 [2019-03-28 12:50:33,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. 76.99/51.00 [2019-03-28 12:50:33,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 78 transitions. 76.99/51.00 [2019-03-28 12:50:33,738 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 78 transitions. Word has length 15 76.99/51.00 [2019-03-28 12:50:33,739 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,739 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 78 transitions. 76.99/51.00 [2019-03-28 12:50:33,739 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,739 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 78 transitions. 76.99/51.00 [2019-03-28 12:50:33,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 76.99/51.00 [2019-03-28 12:50:33,740 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,740 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,740 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,740 INFO L82 PathProgramCache]: Analyzing trace with hash -108148816, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,741 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,741 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,742 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,763 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,763 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,763 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:33,763 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:33,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:33,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,764 INFO L87 Difference]: Start difference. First operand 43 states and 78 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:33,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,819 INFO L93 Difference]: Finished difference Result 76 states and 140 transitions. 76.99/51.00 [2019-03-28 12:50:33,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,820 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 15 76.99/51.00 [2019-03-28 12:50:33,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,820 INFO L225 Difference]: With dead ends: 76 76.99/51.00 [2019-03-28 12:50:33,821 INFO L226 Difference]: Without dead ends: 42 76.99/51.00 [2019-03-28 12:50:33,821 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. 76.99/51.00 [2019-03-28 12:50:33,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. 76.99/51.00 [2019-03-28 12:50:33,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. 76.99/51.00 [2019-03-28 12:50:33,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 68 transitions. 76.99/51.00 [2019-03-28 12:50:33,828 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 68 transitions. Word has length 15 76.99/51.00 [2019-03-28 12:50:33,828 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,828 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 68 transitions. 76.99/51.00 [2019-03-28 12:50:33,828 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,828 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 68 transitions. 76.99/51.00 [2019-03-28 12:50:33,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 76.99/51.00 [2019-03-28 12:50:33,829 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,829 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,829 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,830 INFO L82 PathProgramCache]: Analyzing trace with hash -1482178365, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,830 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,830 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,831 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,831 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,853 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,853 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,853 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:33,854 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:33,854 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:33,854 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,854 INFO L87 Difference]: Start difference. First operand 41 states and 68 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:33,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,910 INFO L93 Difference]: Finished difference Result 73 states and 119 transitions. 76.99/51.00 [2019-03-28 12:50:33,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,910 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 76.99/51.00 [2019-03-28 12:50:33,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,911 INFO L225 Difference]: With dead ends: 73 76.99/51.00 [2019-03-28 12:50:33,911 INFO L226 Difference]: Without dead ends: 47 76.99/51.00 [2019-03-28 12:50:33,911 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. 76.99/51.00 [2019-03-28 12:50:33,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 41. 76.99/51.00 [2019-03-28 12:50:33,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. 76.99/51.00 [2019-03-28 12:50:33,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 66 transitions. 76.99/51.00 [2019-03-28 12:50:33,916 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 66 transitions. Word has length 18 76.99/51.00 [2019-03-28 12:50:33,916 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:33,916 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 66 transitions. 76.99/51.00 [2019-03-28 12:50:33,916 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,916 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 66 transitions. 76.99/51.00 [2019-03-28 12:50:33,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 76.99/51.00 [2019-03-28 12:50:33,917 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:33,917 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:33,917 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 76.99/51.00 [2019-03-28 12:50:33,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 76.99/51.00 [2019-03-28 12:50:33,918 INFO L82 PathProgramCache]: Analyzing trace with hash -1453549214, now seen corresponding path program 1 times 76.99/51.00 [2019-03-28 12:50:33,918 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 76.99/51.00 [2019-03-28 12:50:33,918 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 76.99/51.00 [2019-03-28 12:50:33,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,919 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,919 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 76.99/51.00 [2019-03-28 12:50:33,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 76.99/51.00 [2019-03-28 12:50:33,939 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 76.99/51.00 [2019-03-28 12:50:33,939 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 76.99/51.00 [2019-03-28 12:50:33,939 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 76.99/51.00 [2019-03-28 12:50:33,939 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 76.99/51.00 [2019-03-28 12:50:33,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 76.99/51.00 [2019-03-28 12:50:33,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,940 INFO L87 Difference]: Start difference. First operand 41 states and 66 transitions. Second operand 3 states. 76.99/51.00 [2019-03-28 12:50:33,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 76.99/51.00 [2019-03-28 12:50:33,994 INFO L93 Difference]: Finished difference Result 67 states and 108 transitions. 76.99/51.00 [2019-03-28 12:50:33,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:33,994 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 76.99/51.00 [2019-03-28 12:50:33,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 76.99/51.00 [2019-03-28 12:50:33,995 INFO L225 Difference]: With dead ends: 67 76.99/51.00 [2019-03-28 12:50:33,995 INFO L226 Difference]: Without dead ends: 43 76.99/51.00 [2019-03-28 12:50:33,996 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 76.99/51.00 [2019-03-28 12:50:33,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. 76.99/51.00 [2019-03-28 12:50:33,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 41. 76.99/51.00 [2019-03-28 12:50:33,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. 76.99/51.00 [2019-03-28 12:50:33,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. 76.99/51.00 [2019-03-28 12:50:34,000 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 18 76.99/51.00 [2019-03-28 12:50:34,000 INFO L84 Accepts]: Finished accepts. word is rejected. 76.99/51.00 [2019-03-28 12:50:34,000 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. 76.99/51.00 [2019-03-28 12:50:34,000 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 76.99/51.00 [2019-03-28 12:50:34,000 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. 76.99/51.00 [2019-03-28 12:50:34,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 76.99/51.00 [2019-03-28 12:50:34,001 INFO L394 BasicCegarLoop]: Found error trace 76.99/51.00 [2019-03-28 12:50:34,001 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 76.99/51.00 [2019-03-28 12:50:34,002 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.00 [2019-03-28 12:50:34,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.00 [2019-03-28 12:50:34,002 INFO L82 PathProgramCache]: Analyzing trace with hash -1424920063, now seen corresponding path program 1 times 77.11/51.00 [2019-03-28 12:50:34,002 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.00 [2019-03-28 12:50:34,002 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.00 [2019-03-28 12:50:34,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.00 [2019-03-28 12:50:34,037 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.00 [2019-03-28 12:50:34,037 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.00 [2019-03-28 12:50:34,037 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 77.11/51.00 [2019-03-28 12:50:34,038 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 77.11/51.00 [2019-03-28 12:50:34,038 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 77.11/51.00 [2019-03-28 12:50:34,038 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 77.11/51.00 [2019-03-28 12:50:34,038 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand 3 states. 77.11/51.00 [2019-03-28 12:50:34,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.00 [2019-03-28 12:50:34,094 INFO L93 Difference]: Finished difference Result 62 states and 95 transitions. 77.11/51.00 [2019-03-28 12:50:34,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 77.11/51.00 [2019-03-28 12:50:34,095 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 77.11/51.00 [2019-03-28 12:50:34,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.00 [2019-03-28 12:50:34,096 INFO L225 Difference]: With dead ends: 62 77.11/51.00 [2019-03-28 12:50:34,096 INFO L226 Difference]: Without dead ends: 33 77.11/51.00 [2019-03-28 12:50:34,096 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 77.11/51.00 [2019-03-28 12:50:34,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. 77.11/51.00 [2019-03-28 12:50:34,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. 77.11/51.00 [2019-03-28 12:50:34,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. 77.11/51.00 [2019-03-28 12:50:34,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 46 transitions. 77.11/51.00 [2019-03-28 12:50:34,099 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 46 transitions. Word has length 18 77.11/51.00 [2019-03-28 12:50:34,099 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.00 [2019-03-28 12:50:34,099 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 46 transitions. 77.11/51.00 [2019-03-28 12:50:34,100 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 77.11/51.00 [2019-03-28 12:50:34,100 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 46 transitions. 77.11/51.00 [2019-03-28 12:50:34,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 77.11/51.00 [2019-03-28 12:50:34,100 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.00 [2019-03-28 12:50:34,101 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.00 [2019-03-28 12:50:34,101 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.00 [2019-03-28 12:50:34,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.00 [2019-03-28 12:50:34,101 INFO L82 PathProgramCache]: Analyzing trace with hash 34073244, now seen corresponding path program 1 times 77.11/51.00 [2019-03-28 12:50:34,101 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.00 [2019-03-28 12:50:34,101 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.00 [2019-03-28 12:50:34,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,102 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.00 [2019-03-28 12:50:34,142 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.00 [2019-03-28 12:50:34,143 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.00 [2019-03-28 12:50:34,143 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.00 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.00 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.00 Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.00 [2019-03-28 12:50:34,161 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.00 [2019-03-28 12:50:34,198 INFO L256 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 3 conjunts are in the unsatisfiable core 77.11/51.00 [2019-03-28 12:50:34,204 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.00 [2019-03-28 12:50:34,228 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.00 [2019-03-28 12:50:34,256 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. 77.11/51.00 [2019-03-28 12:50:34,257 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 5 77.11/51.00 [2019-03-28 12:50:34,257 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 77.11/51.00 [2019-03-28 12:50:34,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 77.11/51.00 [2019-03-28 12:50:34,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 77.11/51.00 [2019-03-28 12:50:34,258 INFO L87 Difference]: Start difference. First operand 33 states and 46 transitions. Second operand 6 states. 77.11/51.00 [2019-03-28 12:50:34,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.00 [2019-03-28 12:50:34,354 INFO L93 Difference]: Finished difference Result 38 states and 49 transitions. 77.11/51.00 [2019-03-28 12:50:34,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 77.11/51.00 [2019-03-28 12:50:34,355 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 77.11/51.00 [2019-03-28 12:50:34,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.00 [2019-03-28 12:50:34,356 INFO L225 Difference]: With dead ends: 38 77.11/51.00 [2019-03-28 12:50:34,356 INFO L226 Difference]: Without dead ends: 35 77.11/51.00 [2019-03-28 12:50:34,356 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 77.11/51.00 [2019-03-28 12:50:34,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. 77.11/51.00 [2019-03-28 12:50:34,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 33. 77.11/51.00 [2019-03-28 12:50:34,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. 77.11/51.00 [2019-03-28 12:50:34,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 43 transitions. 77.11/51.00 [2019-03-28 12:50:34,359 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 43 transitions. Word has length 20 77.11/51.00 [2019-03-28 12:50:34,360 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.00 [2019-03-28 12:50:34,360 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 43 transitions. 77.11/51.00 [2019-03-28 12:50:34,360 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 77.11/51.00 [2019-03-28 12:50:34,360 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 43 transitions. 77.11/51.00 [2019-03-28 12:50:34,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 77.11/51.00 [2019-03-28 12:50:34,361 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.00 [2019-03-28 12:50:34,361 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.00 [2019-03-28 12:50:34,361 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.00 [2019-03-28 12:50:34,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.00 [2019-03-28 12:50:34,361 INFO L82 PathProgramCache]: Analyzing trace with hash 34073245, now seen corresponding path program 1 times 77.11/51.00 [2019-03-28 12:50:34,361 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.00 [2019-03-28 12:50:34,362 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.00 [2019-03-28 12:50:34,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.00 [2019-03-28 12:50:34,483 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.00 [2019-03-28 12:50:34,483 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.00 [2019-03-28 12:50:34,483 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 77.11/51.00 [2019-03-28 12:50:34,483 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states 77.11/51.00 [2019-03-28 12:50:34,484 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. 77.11/51.00 [2019-03-28 12:50:34,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 77.11/51.00 [2019-03-28 12:50:34,484 INFO L87 Difference]: Start difference. First operand 33 states and 43 transitions. Second operand 9 states. 77.11/51.00 [2019-03-28 12:50:34,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.00 [2019-03-28 12:50:34,754 INFO L93 Difference]: Finished difference Result 64 states and 83 transitions. 77.11/51.00 [2019-03-28 12:50:34,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 77.11/51.00 [2019-03-28 12:50:34,755 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 20 77.11/51.00 [2019-03-28 12:50:34,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.00 [2019-03-28 12:50:34,755 INFO L225 Difference]: With dead ends: 64 77.11/51.00 [2019-03-28 12:50:34,756 INFO L226 Difference]: Without dead ends: 33 77.11/51.00 [2019-03-28 12:50:34,756 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 77.11/51.00 [2019-03-28 12:50:34,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. 77.11/51.00 [2019-03-28 12:50:34,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. 77.11/51.00 [2019-03-28 12:50:34,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. 77.11/51.00 [2019-03-28 12:50:34,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 42 transitions. 77.11/51.00 [2019-03-28 12:50:34,759 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 42 transitions. Word has length 20 77.11/51.00 [2019-03-28 12:50:34,760 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.00 [2019-03-28 12:50:34,760 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 42 transitions. 77.11/51.00 [2019-03-28 12:50:34,760 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. 77.11/51.00 [2019-03-28 12:50:34,760 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 42 transitions. 77.11/51.00 [2019-03-28 12:50:34,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 77.11/51.00 [2019-03-28 12:50:34,760 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.00 [2019-03-28 12:50:34,761 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.00 [2019-03-28 12:50:34,761 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.00 [2019-03-28 12:50:34,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.00 [2019-03-28 12:50:34,761 INFO L82 PathProgramCache]: Analyzing trace with hash 954106897, now seen corresponding path program 1 times 77.11/51.00 [2019-03-28 12:50:34,761 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.00 [2019-03-28 12:50:34,761 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.00 [2019-03-28 12:50:34,762 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,763 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:34,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.00 [2019-03-28 12:50:34,878 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.00 [2019-03-28 12:50:34,878 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.00 [2019-03-28 12:50:34,878 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 77.11/51.00 [2019-03-28 12:50:34,879 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states 77.11/51.00 [2019-03-28 12:50:34,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. 77.11/51.00 [2019-03-28 12:50:34,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 77.11/51.00 [2019-03-28 12:50:34,879 INFO L87 Difference]: Start difference. First operand 33 states and 42 transitions. Second operand 7 states. 77.11/51.00 [2019-03-28 12:50:35,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.00 [2019-03-28 12:50:35,119 INFO L93 Difference]: Finished difference Result 65 states and 83 transitions. 77.11/51.00 [2019-03-28 12:50:35,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 77.11/51.00 [2019-03-28 12:50:35,119 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 77.11/51.00 [2019-03-28 12:50:35,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.00 [2019-03-28 12:50:35,120 INFO L225 Difference]: With dead ends: 65 77.11/51.00 [2019-03-28 12:50:35,120 INFO L226 Difference]: Without dead ends: 33 77.11/51.00 [2019-03-28 12:50:35,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 77.11/51.00 [2019-03-28 12:50:35,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. 77.11/51.00 [2019-03-28 12:50:35,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. 77.11/51.00 [2019-03-28 12:50:35,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. 77.11/51.00 [2019-03-28 12:50:35,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 41 transitions. 77.11/51.00 [2019-03-28 12:50:35,123 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 41 transitions. Word has length 20 77.11/51.00 [2019-03-28 12:50:35,123 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.00 [2019-03-28 12:50:35,123 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 41 transitions. 77.11/51.00 [2019-03-28 12:50:35,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. 77.11/51.00 [2019-03-28 12:50:35,124 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 41 transitions. 77.11/51.00 [2019-03-28 12:50:35,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 77.11/51.00 [2019-03-28 12:50:35,124 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.00 [2019-03-28 12:50:35,124 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.00 [2019-03-28 12:50:35,125 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.00 [2019-03-28 12:50:35,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.00 [2019-03-28 12:50:35,125 INFO L82 PathProgramCache]: Analyzing trace with hash 1534970425, now seen corresponding path program 1 times 77.11/51.00 [2019-03-28 12:50:35,125 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.00 [2019-03-28 12:50:35,125 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.00 [2019-03-28 12:50:35,126 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:35,126 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:35,126 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.00 [2019-03-28 12:50:35,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.00 [2019-03-28 12:50:35,324 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:35,324 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.01 [2019-03-28 12:50:35,324 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.01 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.01 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.01 Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.01 [2019-03-28 12:50:35,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:35,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:50:35,365 INFO L256 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 22 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:50:35,367 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:50:35,426 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 77.11/51.01 [2019-03-28 12:50:35,426 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:35,438 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:35,439 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:35,439 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 77.11/51.01 [2019-03-28 12:50:35,476 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:50:35,479 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 77.11/51.01 [2019-03-28 12:50:35,480 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:35,497 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:35,498 INFO L427 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:35,499 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:44, output treesize:40 77.11/51.01 [2019-03-28 12:50:35,568 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:50:35,576 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:35,576 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 21 77.11/51.01 [2019-03-28 12:50:35,580 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 77.11/51.01 [2019-03-28 12:50:35,595 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:35,610 INFO L427 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:35,611 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:47, output treesize:31 77.11/51.01 [2019-03-28 12:50:35,719 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:35,746 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:50:35,746 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 77.11/51.01 [2019-03-28 12:50:35,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states 77.11/51.01 [2019-03-28 12:50:35,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. 77.11/51.01 [2019-03-28 12:50:35,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 77.11/51.01 [2019-03-28 12:50:35,747 INFO L87 Difference]: Start difference. First operand 33 states and 41 transitions. Second operand 15 states. 77.11/51.01 [2019-03-28 12:50:37,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:50:37,106 INFO L93 Difference]: Finished difference Result 84 states and 108 transitions. 77.11/51.01 [2019-03-28 12:50:37,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. 77.11/51.01 [2019-03-28 12:50:37,107 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 20 77.11/51.01 [2019-03-28 12:50:37,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.01 [2019-03-28 12:50:37,108 INFO L225 Difference]: With dead ends: 84 77.11/51.01 [2019-03-28 12:50:37,108 INFO L226 Difference]: Without dead ends: 81 77.11/51.01 [2019-03-28 12:50:37,109 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=222, Invalid=590, Unknown=0, NotChecked=0, Total=812 77.11/51.01 [2019-03-28 12:50:37,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. 77.11/51.01 [2019-03-28 12:50:37,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 36. 77.11/51.01 [2019-03-28 12:50:37,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. 77.11/51.01 [2019-03-28 12:50:37,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 45 transitions. 77.11/51.01 [2019-03-28 12:50:37,113 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 45 transitions. Word has length 20 77.11/51.01 [2019-03-28 12:50:37,113 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.01 [2019-03-28 12:50:37,113 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 45 transitions. 77.11/51.01 [2019-03-28 12:50:37,113 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. 77.11/51.01 [2019-03-28 12:50:37,113 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 45 transitions. 77.11/51.01 [2019-03-28 12:50:37,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 77.11/51.01 [2019-03-28 12:50:37,114 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.01 [2019-03-28 12:50:37,114 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:50:37,114 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.01 [2019-03-28 12:50:37,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:50:37,115 INFO L82 PathProgramCache]: Analyzing trace with hash 339440697, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:50:37,115 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:50:37,115 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:50:37,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:37,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:37,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:37,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:50:37,313 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:37,314 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.01 [2019-03-28 12:50:37,314 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.01 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.01 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.01 Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.01 [2019-03-28 12:50:37,327 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:37,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:50:37,350 INFO L256 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 20 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:50:37,352 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:50:37,362 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 77.11/51.01 [2019-03-28 12:50:37,363 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:37,371 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:37,372 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:37,372 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:28, output treesize:24 77.11/51.01 [2019-03-28 12:50:37,528 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:37,528 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 29 treesize of output 48 77.11/51.01 [2019-03-28 12:50:37,541 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 77.11/51.01 [2019-03-28 12:50:37,582 INFO L497 ElimStorePlain]: treesize reduction 16, result has 69.8 percent of original size 77.11/51.01 [2019-03-28 12:50:37,584 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:37,584 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:42, output treesize:37 77.11/51.01 [2019-03-28 12:50:43,166 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:43,193 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:50:43,193 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 16 77.11/51.01 [2019-03-28 12:50:43,193 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states 77.11/51.01 [2019-03-28 12:50:43,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. 77.11/51.01 [2019-03-28 12:50:43,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=220, Unknown=2, NotChecked=0, Total=272 77.11/51.01 [2019-03-28 12:50:43,194 INFO L87 Difference]: Start difference. First operand 36 states and 45 transitions. Second operand 17 states. 77.11/51.01 [2019-03-28 12:50:55,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:50:55,367 INFO L93 Difference]: Finished difference Result 41 states and 49 transitions. 77.11/51.01 [2019-03-28 12:50:55,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. 77.11/51.01 [2019-03-28 12:50:55,368 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 21 77.11/51.01 [2019-03-28 12:50:55,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.01 [2019-03-28 12:50:55,368 INFO L225 Difference]: With dead ends: 41 77.11/51.01 [2019-03-28 12:50:55,368 INFO L226 Difference]: Without dead ends: 39 77.11/51.01 [2019-03-28 12:50:55,369 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=159, Invalid=489, Unknown=2, NotChecked=0, Total=650 77.11/51.01 [2019-03-28 12:50:55,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. 77.11/51.01 [2019-03-28 12:50:55,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 37. 77.11/51.01 [2019-03-28 12:50:55,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. 77.11/51.01 [2019-03-28 12:50:55,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 46 transitions. 77.11/51.01 [2019-03-28 12:50:55,376 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 46 transitions. Word has length 21 77.11/51.01 [2019-03-28 12:50:55,376 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.01 [2019-03-28 12:50:55,376 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 46 transitions. 77.11/51.01 [2019-03-28 12:50:55,377 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. 77.11/51.01 [2019-03-28 12:50:55,377 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 46 transitions. 77.11/51.01 [2019-03-28 12:50:55,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 77.11/51.01 [2019-03-28 12:50:55,377 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.01 [2019-03-28 12:50:55,377 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:50:55,378 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.01 [2019-03-28 12:50:55,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:50:55,378 INFO L82 PathProgramCache]: Analyzing trace with hash 339440698, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:50:55,378 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:50:55,378 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:50:55,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:55,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:55,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:55,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:50:55,413 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:55,414 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.01 [2019-03-28 12:50:55,414 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.01 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.01 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.01 Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.01 [2019-03-28 12:50:55,428 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:55,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:50:55,451 INFO L256 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 3 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:50:55,453 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:50:55,471 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:55,499 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:50:55,499 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 5 77.11/51.01 [2019-03-28 12:50:55,499 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 77.11/51.01 [2019-03-28 12:50:55,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 77.11/51.01 [2019-03-28 12:50:55,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 77.11/51.01 [2019-03-28 12:50:55,500 INFO L87 Difference]: Start difference. First operand 37 states and 46 transitions. Second operand 6 states. 77.11/51.01 [2019-03-28 12:50:55,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:50:55,601 INFO L93 Difference]: Finished difference Result 38 states and 46 transitions. 77.11/51.01 [2019-03-28 12:50:55,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 77.11/51.01 [2019-03-28 12:50:55,601 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 77.11/51.01 [2019-03-28 12:50:55,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.01 [2019-03-28 12:50:55,602 INFO L225 Difference]: With dead ends: 38 77.11/51.01 [2019-03-28 12:50:55,602 INFO L226 Difference]: Without dead ends: 33 77.11/51.01 [2019-03-28 12:50:55,603 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 77.11/51.01 [2019-03-28 12:50:55,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. 77.11/51.01 [2019-03-28 12:50:55,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. 77.11/51.01 [2019-03-28 12:50:55,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. 77.11/51.01 [2019-03-28 12:50:55,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 39 transitions. 77.11/51.01 [2019-03-28 12:50:55,606 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 39 transitions. Word has length 21 77.11/51.01 [2019-03-28 12:50:55,606 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.01 [2019-03-28 12:50:55,606 INFO L480 AbstractCegarLoop]: Abstraction has 33 states and 39 transitions. 77.11/51.01 [2019-03-28 12:50:55,606 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 77.11/51.01 [2019-03-28 12:50:55,607 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. 77.11/51.01 [2019-03-28 12:50:55,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 77.11/51.01 [2019-03-28 12:50:55,607 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.01 [2019-03-28 12:50:55,607 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:50:55,608 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.01 [2019-03-28 12:50:55,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:50:55,608 INFO L82 PathProgramCache]: Analyzing trace with hash -742446647, now seen corresponding path program 2 times 77.11/51.01 [2019-03-28 12:50:55,608 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:50:55,608 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:50:55,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:55,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:55,609 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:50:55,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:50:55,865 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:55,866 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.01 [2019-03-28 12:50:55,866 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.01 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.01 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.01 Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.01 [2019-03-28 12:50:55,877 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 77.11/51.01 [2019-03-28 12:50:55,907 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) 77.11/51.01 [2019-03-28 12:50:55,907 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:50:55,909 INFO L256 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 24 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:50:55,911 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:50:55,918 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:50:55,920 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 77.11/51.01 [2019-03-28 12:50:55,921 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:55,934 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:55,934 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:55,935 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:23 77.11/51.01 [2019-03-28 12:50:55,966 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 77.11/51.01 [2019-03-28 12:50:55,966 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:55,979 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:55,980 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:55,980 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:37, output treesize:33 77.11/51.01 [2019-03-28 12:50:56,019 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:50:56,020 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 28 77.11/51.01 [2019-03-28 12:50:56,020 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:56,035 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:56,036 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:56,036 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:44, output treesize:40 77.11/51.01 [2019-03-28 12:50:56,152 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:50:56,159 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:56,160 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 23 77.11/51.01 [2019-03-28 12:50:56,161 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 77.11/51.01 [2019-03-28 12:50:56,176 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:50:56,178 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:50:56,178 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:54, output treesize:27 77.11/51.01 [2019-03-28 12:50:56,271 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:50:56,298 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:50:56,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 16 77.11/51.01 [2019-03-28 12:50:56,299 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states 77.11/51.01 [2019-03-28 12:50:56,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. 77.11/51.01 [2019-03-28 12:50:56,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 77.11/51.01 [2019-03-28 12:50:56,299 INFO L87 Difference]: Start difference. First operand 33 states and 39 transitions. Second operand 17 states. 77.11/51.01 [2019-03-28 12:50:57,881 WARN L188 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 51 77.11/51.01 [2019-03-28 12:51:04,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:04,357 INFO L93 Difference]: Finished difference Result 86 states and 98 transitions. 77.11/51.01 [2019-03-28 12:51:04,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. 77.11/51.01 [2019-03-28 12:51:04,358 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 30 77.11/51.01 [2019-03-28 12:51:04,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.01 [2019-03-28 12:51:04,358 INFO L225 Difference]: With dead ends: 86 77.11/51.01 [2019-03-28 12:51:04,359 INFO L226 Difference]: Without dead ends: 85 77.11/51.01 [2019-03-28 12:51:04,359 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=358, Invalid=1124, Unknown=0, NotChecked=0, Total=1482 77.11/51.01 [2019-03-28 12:51:04,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. 77.11/51.01 [2019-03-28 12:51:04,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 78. 77.11/51.01 [2019-03-28 12:51:04,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. 77.11/51.01 [2019-03-28 12:51:04,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 91 transitions. 77.11/51.01 [2019-03-28 12:51:04,367 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 91 transitions. Word has length 30 77.11/51.01 [2019-03-28 12:51:04,367 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.01 [2019-03-28 12:51:04,367 INFO L480 AbstractCegarLoop]: Abstraction has 78 states and 91 transitions. 77.11/51.01 [2019-03-28 12:51:04,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. 77.11/51.01 [2019-03-28 12:51:04,367 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 91 transitions. 77.11/51.01 [2019-03-28 12:51:04,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 77.11/51.01 [2019-03-28 12:51:04,368 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.01 [2019-03-28 12:51:04,368 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:04,368 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.01 [2019-03-28 12:51:04,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:04,369 INFO L82 PathProgramCache]: Analyzing trace with hash -1541011799, now seen corresponding path program 2 times 77.11/51.01 [2019-03-28 12:51:04,369 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:04,369 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:04,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:04,370 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:04,370 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:04,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:04,657 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:04,657 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.01 [2019-03-28 12:51:04,657 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.01 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.01 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.01 Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.01 [2019-03-28 12:51:04,670 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 77.11/51.01 [2019-03-28 12:51:04,698 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) 77.11/51.01 [2019-03-28 12:51:04,698 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:04,699 INFO L256 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 26 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:04,701 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:04,715 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:04,715 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 25 77.11/51.01 [2019-03-28 12:51:04,716 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:04,730 INFO L497 ElimStorePlain]: treesize reduction 10, result has 64.3 percent of original size 77.11/51.01 [2019-03-28 12:51:04,731 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:04,731 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:13, output treesize:9 77.11/51.01 [2019-03-28 12:51:04,749 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 77.11/51.01 [2019-03-28 12:51:04,749 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:04,751 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:04,751 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:04,752 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 77.11/51.01 [2019-03-28 12:51:04,864 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:04,864 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 50 77.11/51.01 [2019-03-28 12:51:04,873 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. 77.11/51.01 [2019-03-28 12:51:04,910 INFO L497 ElimStorePlain]: treesize reduction 58, result has 36.3 percent of original size 77.11/51.01 [2019-03-28 12:51:04,911 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:04,911 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:37, output treesize:33 77.11/51.01 [2019-03-28 12:51:04,994 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 5 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:05,021 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:05,021 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 77.11/51.01 [2019-03-28 12:51:05,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states 77.11/51.01 [2019-03-28 12:51:05,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. 77.11/51.01 [2019-03-28 12:51:05,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=254, Unknown=0, NotChecked=0, Total=306 77.11/51.01 [2019-03-28 12:51:05,022 INFO L87 Difference]: Start difference. First operand 78 states and 91 transitions. Second operand 18 states. 77.11/51.01 [2019-03-28 12:51:06,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:06,114 INFO L93 Difference]: Finished difference Result 97 states and 111 transitions. 77.11/51.01 [2019-03-28 12:51:06,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. 77.11/51.01 [2019-03-28 12:51:06,114 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 31 77.11/51.01 [2019-03-28 12:51:06,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.01 [2019-03-28 12:51:06,115 INFO L225 Difference]: With dead ends: 97 77.11/51.01 [2019-03-28 12:51:06,115 INFO L226 Difference]: Without dead ends: 96 77.11/51.01 [2019-03-28 12:51:06,116 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 438 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=391, Invalid=1415, Unknown=0, NotChecked=0, Total=1806 77.11/51.01 [2019-03-28 12:51:06,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. 77.11/51.01 [2019-03-28 12:51:06,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 84. 77.11/51.01 [2019-03-28 12:51:06,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. 77.11/51.01 [2019-03-28 12:51:06,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 98 transitions. 77.11/51.01 [2019-03-28 12:51:06,124 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 98 transitions. Word has length 31 77.11/51.01 [2019-03-28 12:51:06,124 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.01 [2019-03-28 12:51:06,124 INFO L480 AbstractCegarLoop]: Abstraction has 84 states and 98 transitions. 77.11/51.01 [2019-03-28 12:51:06,124 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. 77.11/51.01 [2019-03-28 12:51:06,124 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 98 transitions. 77.11/51.01 [2019-03-28 12:51:06,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 77.11/51.01 [2019-03-28 12:51:06,125 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.01 [2019-03-28 12:51:06,125 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:06,125 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.01 [2019-03-28 12:51:06,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:06,126 INFO L82 PathProgramCache]: Analyzing trace with hash 1303133656, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:06,126 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:06,126 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:06,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:06,127 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:06,127 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:06,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:06,264 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 29 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:06,264 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.01 [2019-03-28 12:51:06,264 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.01 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.01 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.01 Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.01 [2019-03-28 12:51:06,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:06,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:06,306 INFO L256 TraceCheckSpWp]: Trace formula consists of 199 conjuncts, 28 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:06,308 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:06,314 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:51:06,315 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 77.11/51.01 [2019-03-28 12:51:06,315 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,323 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:06,324 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,324 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:20 77.11/51.01 [2019-03-28 12:51:06,347 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 77.11/51.01 [2019-03-28 12:51:06,347 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,355 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:06,355 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,355 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:27, output treesize:23 77.11/51.01 [2019-03-28 12:51:06,380 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:51:06,381 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 77.11/51.01 [2019-03-28 12:51:06,381 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,389 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:06,389 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,390 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:34, output treesize:30 77.11/51.01 [2019-03-28 12:51:06,470 INFO L189 IndexEqualityManager]: detected not equals via solver 77.11/51.01 [2019-03-28 12:51:06,477 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:06,477 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 22 77.11/51.01 [2019-03-28 12:51:06,478 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,491 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:06,491 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:06,492 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:44, output treesize:23 77.11/51.01 [2019-03-28 12:51:06,580 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:06,607 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:06,607 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 16 77.11/51.01 [2019-03-28 12:51:06,608 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states 77.11/51.01 [2019-03-28 12:51:06,608 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. 77.11/51.01 [2019-03-28 12:51:06,608 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=216, Unknown=0, NotChecked=0, Total=272 77.11/51.01 [2019-03-28 12:51:06,609 INFO L87 Difference]: Start difference. First operand 84 states and 98 transitions. Second operand 17 states. 77.11/51.01 [2019-03-28 12:51:07,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:07,280 INFO L93 Difference]: Finished difference Result 85 states and 98 transitions. 77.11/51.01 [2019-03-28 12:51:07,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. 77.11/51.01 [2019-03-28 12:51:07,281 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 77.11/51.01 [2019-03-28 12:51:07,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.01 [2019-03-28 12:51:07,281 INFO L225 Difference]: With dead ends: 85 77.11/51.01 [2019-03-28 12:51:07,282 INFO L226 Difference]: Without dead ends: 84 77.11/51.01 [2019-03-28 12:51:07,282 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=188, Invalid=514, Unknown=0, NotChecked=0, Total=702 77.11/51.01 [2019-03-28 12:51:07,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. 77.11/51.01 [2019-03-28 12:51:07,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 42. 77.11/51.01 [2019-03-28 12:51:07,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. 77.11/51.01 [2019-03-28 12:51:07,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 49 transitions. 77.11/51.01 [2019-03-28 12:51:07,287 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 49 transitions. Word has length 40 77.11/51.01 [2019-03-28 12:51:07,287 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.01 [2019-03-28 12:51:07,288 INFO L480 AbstractCegarLoop]: Abstraction has 42 states and 49 transitions. 77.11/51.01 [2019-03-28 12:51:07,288 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. 77.11/51.01 [2019-03-28 12:51:07,288 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 49 transitions. 77.11/51.01 [2019-03-28 12:51:07,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 77.11/51.01 [2019-03-28 12:51:07,288 INFO L394 BasicCegarLoop]: Found error trace 77.11/51.01 [2019-03-28 12:51:07,288 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:07,289 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION]=== 77.11/51.01 [2019-03-28 12:51:07,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:07,289 INFO L82 PathProgramCache]: Analyzing trace with hash 1742435450, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:07,289 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:07,289 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:07,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:07,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:07,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:07,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:07,444 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:07,445 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 77.11/51.01 [2019-03-28 12:51:07,445 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 77.11/51.01 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 77.11/51.01 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 77.11/51.01 Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 77.11/51.01 [2019-03-28 12:51:07,456 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:07,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:07,488 INFO L256 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 26 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:07,490 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:07,511 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:07,512 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 25 77.11/51.01 [2019-03-28 12:51:07,512 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:07,528 INFO L497 ElimStorePlain]: treesize reduction 10, result has 64.3 percent of original size 77.11/51.01 [2019-03-28 12:51:07,529 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:07,529 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:13, output treesize:9 77.11/51.01 [2019-03-28 12:51:07,533 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 77.11/51.01 [2019-03-28 12:51:07,533 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:07,535 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:07,535 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:07,536 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 77.11/51.01 [2019-03-28 12:51:07,625 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 77.11/51.01 [2019-03-28 12:51:07,626 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 50 77.11/51.01 [2019-03-28 12:51:07,632 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 3 xjuncts. 77.11/51.01 [2019-03-28 12:51:07,670 INFO L497 ElimStorePlain]: treesize reduction 58, result has 36.3 percent of original size 77.11/51.01 [2019-03-28 12:51:07,670 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 77.11/51.01 [2019-03-28 12:51:07,671 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:37, output treesize:33 77.11/51.01 [2019-03-28 12:51:07,732 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 10 proven. 16 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:07,758 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:07,758 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 77.11/51.01 [2019-03-28 12:51:07,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states 77.11/51.01 [2019-03-28 12:51:07,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. 77.11/51.01 [2019-03-28 12:51:07,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 77.11/51.01 [2019-03-28 12:51:07,759 INFO L87 Difference]: Start difference. First operand 42 states and 49 transitions. Second operand 15 states. 77.11/51.01 [2019-03-28 12:51:08,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:08,154 INFO L93 Difference]: Finished difference Result 42 states and 49 transitions. 77.11/51.01 [2019-03-28 12:51:08,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 77.11/51.01 [2019-03-28 12:51:08,155 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 41 77.11/51.01 [2019-03-28 12:51:08,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 77.11/51.01 [2019-03-28 12:51:08,156 INFO L225 Difference]: With dead ends: 42 77.11/51.01 [2019-03-28 12:51:08,156 INFO L226 Difference]: Without dead ends: 0 77.11/51.01 [2019-03-28 12:51:08,156 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=126, Invalid=336, Unknown=0, NotChecked=0, Total=462 77.11/51.01 [2019-03-28 12:51:08,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. 77.11/51.01 [2019-03-28 12:51:08,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. 77.11/51.01 [2019-03-28 12:51:08,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. 77.11/51.01 [2019-03-28 12:51:08,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:08,157 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 41 77.11/51.01 [2019-03-28 12:51:08,157 INFO L84 Accepts]: Finished accepts. word is rejected. 77.11/51.01 [2019-03-28 12:51:08,157 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:08,158 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. 77.11/51.01 [2019-03-28 12:51:08,158 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:08,158 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. 77.11/51.01 [2019-03-28 12:51:08,163 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:08,313 WARN L188 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 211 DAG size of output: 195 77.11/51.01 [2019-03-28 12:51:14,474 WARN L188 SmtUtils]: Spent 6.16 s on a formula simplification. DAG size of input: 190 DAG size of output: 82 77.11/51.01 [2019-03-28 12:51:14,477 INFO L448 ceAbstractionStarter]: For program point L25(line 25) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point L19(line 19) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point L19-2(line 19) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point L19-3(line 19) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point L19-4(lines 19 20) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr6REQUIRES_VIOLATION(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point L13(lines 13 14) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr7REQUIRES_VIOLATION(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,478 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr8REQUIRES_VIOLATION(line 19) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr9REQUIRES_VIOLATION(line 19) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr10REQUIRES_VIOLATION(line 24) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr11REQUIRES_VIOLATION(line 24) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point L40(line 40) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr12REQUIRES_VIOLATION(line 25) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point L40-1(line 40) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr13REQUIRES_VIOLATION(line 25) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,479 INFO L448 ceAbstractionStarter]: For program point L32(lines 32 34) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point L32-2(lines 29 43) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startENTRY(line -1) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr5REQUIRES_VIOLATION(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr4REQUIRES_VIOLATION(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr3REQUIRES_VIOLATION(line 41) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr2REQUIRES_VIOLATION(line 41) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr1REQUIRES_VIOLATION(line 40) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr0REQUIRES_VIOLATION(line 40) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,480 INFO L448 ceAbstractionStarter]: For program point L16-1(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,481 INFO L448 ceAbstractionStarter]: For program point L16-2(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,481 INFO L448 ceAbstractionStarter]: For program point L16-3(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,481 INFO L448 ceAbstractionStarter]: For program point L16-4(line 16) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,481 INFO L448 ceAbstractionStarter]: For program point L16-6(lines 16 23) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,481 INFO L444 ceAbstractionStarter]: At program point L16-8(lines 16 23) the Hoare annotation is: (let ((.cse3 (select |#memory_int| ULTIMATE.start_cstrncmp_~s2.base)) (.cse19 (select |#memory_int| ULTIMATE.start_cstrncmp_~s1.base)) (.cse20 (select (store |#memory_int| ULTIMATE.start_main_~nondetString2~0.base (store (select |#memory_int| ULTIMATE.start_main_~nondetString2~0.base) (+ ULTIMATE.start_main_~length2~0 ULTIMATE.start_main_~nondetString2~0.offset (- 1)) 0)) ULTIMATE.start_main_~nondetString1~0.base)) (.cse23 (select |#length| ULTIMATE.start_main_~nondetString1~0.base)) (.cse22 (select |#length| ULTIMATE.start_cstrncmp_~s1.base)) (.cse21 (select |#length| ULTIMATE.start_cstrncmp_~s2.base))) (let ((.cse0 (= 0 ULTIMATE.start_cstrncmp_~s2.offset)) (.cse5 (= 0 ULTIMATE.start_cstrncmp_~s1.offset)) (.cse6 (<= 1 .cse21)) (.cse9 (<= 1 .cse22)) (.cse14 (= 0 (select .cse20 (+ ULTIMATE.start_main_~nondetString1~0.offset .cse23 (- 1))))) (.cse10 (= ULTIMATE.start_main_~nondetString1~0.offset 0)) (.cse1 (= ULTIMATE.start_main_~length1~0 .cse23)) (.cse2 (= 1 (select |#valid| ULTIMATE.start_cstrncmp_~s2.base))) (.cse16 (<= 1 ULTIMATE.start_main_~length2~0)) (.cse7 (<= 1 ULTIMATE.start_main_~length1~0)) (.cse8 (= 1 (select |#valid| ULTIMATE.start_main_~nondetString1~0.base))) (.cse12 (= 1 (select |#valid| ULTIMATE.start_cstrncmp_~s1.base))) (.cse13 (= 1 (select |#valid| ULTIMATE.start_main_~nondetString2~0.base))) (.cse15 (not (= ULTIMATE.start_main_~nondetString1~0.base ULTIMATE.start_main_~nondetString2~0.base))) (.cse11 (= ULTIMATE.start_main_~nondetString2~0.offset 0)) (.cse4 (= (select |#length| ULTIMATE.start_main_~nondetString2~0.base) ULTIMATE.start_main_~length2~0)) (.cse17 (= (select .cse19 (+ .cse22 (- 1))) 0)) (.cse18 (= 0 (select .cse3 (+ .cse21 (- 1)))))) (or (and (= 1 (+ ULTIMATE.start_main_~length2~0 ULTIMATE.start_main_~nondetString2~0.offset)) .cse0 .cse1 .cse2 (= (select .cse3 ULTIMATE.start_cstrncmp_~s2.offset) 0) .cse4 .cse5 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13) (and (and .cse14 .cse15 (and .cse0 .cse1 .cse2 .cse4 .cse16 .cse6 .cse7 .cse8 .cse9 .cse10 .cse11 .cse12 .cse13) .cse17 .cse5) .cse18) (and (= 0 (select .cse19 ULTIMATE.start_cstrncmp_~s1.offset)) .cse0 .cse1 .cse2 .cse15 .cse4 (= 0 (select .cse20 ULTIMATE.start_main_~nondetString1~0.offset)) .cse16 .cse5 .cse6 (= 1 ULTIMATE.start_main_~length1~0) .cse8 .cse9 .cse10 .cse11 .cse12 .cse13) (and (<= (+ ULTIMATE.start_cstrncmp_~s2.offset 1) .cse21) (and .cse14 .cse10 (and (<= 1 ULTIMATE.start_cstrncmp_~n) .cse1 .cse2 .cse16 .cse7 .cse8 .cse12 (<= 1 ULTIMATE.start_cstrncmp_~s1.offset) .cse13) .cse15 .cse11 (<= (+ ULTIMATE.start_cstrncmp_~s1.offset 1) .cse22) .cse4 .cse17 (<= 1 ULTIMATE.start_cstrncmp_~s2.offset)) .cse18)))) 77.11/51.01 [2019-03-28 12:51:14,482 INFO L448 ceAbstractionStarter]: For program point L16-9(lines 16 23) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,482 INFO L448 ceAbstractionStarter]: For program point L35-1(lines 35 37) no Hoare annotation was computed. 77.11/51.01 [2019-03-28 12:51:14,482 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg 77.11/51.01 [2019-03-28 12:51:14,496 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,497 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,498 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,498 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,498 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,499 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,499 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,499 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,500 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,500 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,500 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,500 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,501 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,501 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,501 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,501 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,502 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,502 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,502 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,503 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,503 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,503 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,504 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,504 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,504 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,504 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,505 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,505 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,505 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,506 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,506 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,506 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,506 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,507 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,519 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,519 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,520 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,520 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,520 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,520 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,521 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,521 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,521 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,521 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,522 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,522 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,522 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,523 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,523 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,523 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,523 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,524 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,524 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,524 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,524 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,525 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,525 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,525 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,525 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,526 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,526 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,526 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,527 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,527 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,527 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,527 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,527 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:14,528 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:14,531 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:51:14 BasicIcfg 77.11/51.01 [2019-03-28 12:51:14,531 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- 77.11/51.01 [2019-03-28 12:51:14,532 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- 77.11/51.01 [2019-03-28 12:51:14,532 INFO L271 PluginConnector]: Initializing BuchiAutomizer... 77.11/51.01 [2019-03-28 12:51:14,535 INFO L276 PluginConnector]: BuchiAutomizer initialized 77.11/51.01 [2019-03-28 12:51:14,536 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 77.11/51.01 [2019-03-28 12:51:14,536 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.03 12:50:30" (1/5) ... 77.11/51.01 [2019-03-28 12:51:14,536 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@34e3d1c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.03 12:51:14, skipping insertion in model container 77.11/51.01 [2019-03-28 12:51:14,537 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 77.11/51.01 [2019-03-28 12:51:14,537 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:50:30" (2/5) ... 77.11/51.01 [2019-03-28 12:51:14,537 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@34e3d1c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.03 12:51:14, skipping insertion in model container 77.11/51.01 [2019-03-28 12:51:14,537 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 77.11/51.01 [2019-03-28 12:51:14,537 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:50:31" (3/5) ... 77.11/51.01 [2019-03-28 12:51:14,537 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@34e3d1c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:51:14, skipping insertion in model container 77.11/51.01 [2019-03-28 12:51:14,538 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 77.11/51.01 [2019-03-28 12:51:14,538 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:50:31" (4/5) ... 77.11/51.01 [2019-03-28 12:51:14,538 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@34e3d1c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:51:14, skipping insertion in model container 77.11/51.01 [2019-03-28 12:51:14,538 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 77.11/51.01 [2019-03-28 12:51:14,538 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:51:14" (5/5) ... 77.11/51.01 [2019-03-28 12:51:14,539 INFO L375 chiAutomizerObserver]: Analyzing ICFG theBenchmark.c_BEv2 77.11/51.01 [2019-03-28 12:51:14,561 INFO L133 ementStrategyFactory]: Using default assertion order modulation 77.11/51.01 [2019-03-28 12:51:14,561 INFO L374 BuchiCegarLoop]: Interprodecural is true 77.11/51.01 [2019-03-28 12:51:14,562 INFO L375 BuchiCegarLoop]: Hoare is true 77.11/51.01 [2019-03-28 12:51:14,562 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates 77.11/51.01 [2019-03-28 12:51:14,562 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE 77.11/51.01 [2019-03-28 12:51:14,562 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION 77.11/51.01 [2019-03-28 12:51:14,562 INFO L379 BuchiCegarLoop]: Difference is false 77.11/51.01 [2019-03-28 12:51:14,562 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA 77.11/51.01 [2019-03-28 12:51:14,562 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== 77.11/51.01 [2019-03-28 12:51:14,566 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states. 77.11/51.01 [2019-03-28 12:51:14,570 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,570 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 77.11/51.01 [2019-03-28 12:51:14,571 INFO L119 BuchiIsEmpty]: Starting construction of run 77.11/51.01 [2019-03-28 12:51:14,575 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,575 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,575 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ 77.11/51.01 [2019-03-28 12:51:14,575 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states. 77.11/51.01 [2019-03-28 12:51:14,577 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,577 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 77.11/51.01 [2019-03-28 12:51:14,577 INFO L119 BuchiIsEmpty]: Starting construction of run 77.11/51.01 [2019-03-28 12:51:14,577 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,577 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,582 INFO L794 eck$LassoCheckResult]: Stem: 29#ULTIMATE.startENTRYtrue [210] ULTIMATE.startENTRY-->L32: Formula: (and (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|) (= |v_#valid_23| (store |v_#valid_24| 0 0))) InVars {#valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_6|, ULTIMATE.start_main_#t~nondet12=|v_ULTIMATE.start_main_#t~nondet12_6|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_5|, ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_5|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_5|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_10, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret16=|v_ULTIMATE.start_main_#t~ret16_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, #valid=|v_#valid_23|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_5|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_#t~nondet12, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~length1~0, #NULL.offset, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret16, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc14.offset, ULTIMATE.start_main_~length2~0] 10#L32true [140] L32-->L32-2: Formula: (>= v_ULTIMATE.start_main_~length1~0_6 1) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} OutVars{ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} AuxVars[] AssignedVars[] 26#L32-2true [141] L32-2-->L35-1: Formula: (>= v_ULTIMATE.start_main_~length2~0_6 1) InVars {ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} OutVars{ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} AuxVars[] AssignedVars[] 32#L35-1true [166] L35-1-->L40: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc13.offset_2| 0) (= |v_ULTIMATE.start_main_#t~malloc14.offset_2| 0) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2|)) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc14.offset_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc14.base_2|) (= |v_#valid_3| (store .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2| 1)) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc13.base_2| v_ULTIMATE.start_main_~length1~0_7) |v_ULTIMATE.start_main_#t~malloc14.base_2| v_ULTIMATE.start_main_~length2~0_7)) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc13.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc13.offset_2|) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2|)) (< |v_ULTIMATE.start_main_#t~malloc14.base_2| |v_#StackHeapBarrier_1|) (> |v_ULTIMATE.start_main_#t~malloc13.base_2| 0) (< |v_ULTIMATE.start_main_#t~malloc13.base_2| |v_#StackHeapBarrier_1|) (< 0 |v_ULTIMATE.start_main_#t~malloc14.base_2|))) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_2|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_2|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_2|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, #valid=|v_#valid_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_1|, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_2|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~nondetString1~0.base, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, ULTIMATE.start_main_#t~malloc14.offset] 6#L40true [94] L40-->L40-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= 1 .cse0) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0))) (<= .cse0 (select |v_#length_4| v_ULTIMATE.start_main_~nondetString1~0.base_3)))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} AuxVars[] AssignedVars[#memory_int] 4#L40-1true [211] L40-1-->L13: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (<= 1 .cse0) (= v_ULTIMATE.start_main_~nondetString2~0.base_8 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2| v_ULTIMATE.start_main_~nondetString2~0.offset_7) (= |v_ULTIMATE.start_main_#t~nondet15_5| |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.base_11 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|) (= (select |v_#valid_25| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_cstrncmp_~n_8 |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.offset_9 |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|) (= v_ULTIMATE.start_cstrncmp_~s1.base_14 |v_ULTIMATE.start_cstrncmp_#in~s1.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s1.base_2| v_ULTIMATE.start_main_~nondetString1~0.base_8) (= (store |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_10|) (<= .cse0 (select |v_#length_18| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2| v_ULTIMATE.start_cstrncmp_~s1.offset_11))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_18|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11} OutVars{ULTIMATE.start_cstrncmp_#t~mem8=|v_ULTIMATE.start_cstrncmp_#t~mem8_5|, ULTIMATE.start_cstrncmp_#t~mem9=|v_ULTIMATE.start_cstrncmp_#t~mem9_5|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_11, ULTIMATE.start_cstrncmp_#res=|v_ULTIMATE.start_cstrncmp_#res_6|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_6|, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_6|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_14, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_4|, ULTIMATE.start_cstrncmp_#in~s2.offset=|v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_5|, ULTIMATE.start_cstrncmp_#t~ite10=|v_ULTIMATE.start_cstrncmp_#t~ite10_6|, #length=|v_#length_18|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_8, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_4|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_11, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11, ULTIMATE.start_cstrncmp_~uc2~0=v_ULTIMATE.start_cstrncmp_~uc2~0_6, ULTIMATE.start_cstrncmp_#in~n=|v_ULTIMATE.start_cstrncmp_#in~n_2|, ULTIMATE.start_cstrncmp_~uc1~0=v_ULTIMATE.start_cstrncmp_~uc1~0_6, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrncmp_#in~s1.offset=|v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_9, ULTIMATE.start_cstrncmp_#in~s2.base=|v_ULTIMATE.start_cstrncmp_#in~s2.base_2|, ULTIMATE.start_cstrncmp_#in~s1.base=|v_ULTIMATE.start_cstrncmp_#in~s1.base_2|, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_10|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_6|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_10|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_10|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem8, ULTIMATE.start_cstrncmp_#t~mem9, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#res, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_#in~s2.offset, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~ite10, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.offset, ULTIMATE.start_cstrncmp_~uc2~0, ULTIMATE.start_cstrncmp_#in~n, ULTIMATE.start_cstrncmp_~uc1~0, ULTIMATE.start_cstrncmp_#in~s1.offset, ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#in~s2.base, ULTIMATE.start_cstrncmp_#in~s1.base, #memory_int, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset] 33#L13true [175] L13-->L16-8: Formula: (< v_ULTIMATE.start_cstrncmp_~n_4 0) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} OutVars{ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} AuxVars[] AssignedVars[] 23#L16-8true 77.11/51.01 [2019-03-28 12:51:14,583 INFO L796 eck$LassoCheckResult]: Loop: 23#L16-8true [177] L16-8-->L16-1: Formula: (and (= |v_ULTIMATE.start_cstrncmp_#t~post0_2| v_ULTIMATE.start_cstrncmp_~n_6) (>= 0 |v_ULTIMATE.start_cstrncmp_#t~post0_2|) (= v_ULTIMATE.start_cstrncmp_~n_5 (+ |v_ULTIMATE.start_cstrncmp_#t~post0_2| (- 1))) (not |v_ULTIMATE.start_cstrncmp_#t~short3_2|)) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_6} OutVars{ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_2|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_5, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~short3] 3#L16-1true [90] L16-1-->L16-6: Formula: (not |v_ULTIMATE.start_cstrncmp_#t~short3_5|) InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_5|} OutVars{ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_5|} AuxVars[] AssignedVars[] 9#L16-6true [187] L16-6-->L19: Formula: (and (< v_ULTIMATE.start_cstrncmp_~n_7 0) (not |v_ULTIMATE.start_cstrncmp_#t~short5_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_9|) InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_9|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7} OutVars{ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_5|, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_4|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_5|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_8|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5] 25#L19true [127] L19-->L19-4: Formula: |v_ULTIMATE.start_cstrncmp_#t~short5_3| InVars {ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} AuxVars[] AssignedVars[] 16#L19-4true [115] L19-4-->L16-8: Formula: (and (= v_ULTIMATE.start_cstrncmp_~s1.offset_7 (+ v_ULTIMATE.start_cstrncmp_~s1.offset_8 1)) (= v_ULTIMATE.start_cstrncmp_~s2.offset_5 (+ v_ULTIMATE.start_cstrncmp_~s2.offset_6 1)) (= v_ULTIMATE.start_cstrncmp_~s1.base_9 v_ULTIMATE.start_cstrncmp_~s1.base_10) (not |v_ULTIMATE.start_cstrncmp_#t~short5_9|) (= v_ULTIMATE.start_cstrncmp_~s2.base_7 v_ULTIMATE.start_cstrncmp_~s2.base_6)) InVars {ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_6, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_7, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_10, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_9|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_8} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_5, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_2|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_6, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_2|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_5|, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_2|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_9, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_8|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_2|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_7} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset, ULTIMATE.start_cstrncmp_~s1.offset] 23#L16-8true 77.11/51.01 [2019-03-28 12:51:14,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1011605018, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:14,584 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,584 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,614 INFO L82 PathProgramCache]: Analyzing trace with hash 194957317, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:14,614 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,614 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:14,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:14,622 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:14,622 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 77.11/51.01 [2019-03-28 12:51:14,623 INFO L811 eck$LassoCheckResult]: loop already infeasible 77.11/51.01 [2019-03-28 12:51:14,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 77.11/51.01 [2019-03-28 12:51:14,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 77.11/51.01 [2019-03-28 12:51:14,624 INFO L87 Difference]: Start difference. First operand 33 states. Second operand 3 states. 77.11/51.01 [2019-03-28 12:51:14,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:14,707 INFO L93 Difference]: Finished difference Result 35 states and 64 transitions. 77.11/51.01 [2019-03-28 12:51:14,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 77.11/51.01 [2019-03-28 12:51:14,710 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 64 transitions. 77.11/51.01 [2019-03-28 12:51:14,711 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,712 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,713 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 77.11/51.01 [2019-03-28 12:51:14,713 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 77.11/51.01 [2019-03-28 12:51:14,714 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,714 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 77.11/51.01 [2019-03-28 12:51:14,714 INFO L706 BuchiCegarLoop]: Abstraction has 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. 77.11/51.01 [2019-03-28 12:51:14,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. 77.11/51.01 [2019-03-28 12:51:14,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,717 INFO L729 BuchiCegarLoop]: Abstraction has 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,717 INFO L609 BuchiCegarLoop]: Abstraction has 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,717 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ 77.11/51.01 [2019-03-28 12:51:14,717 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,717 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,718 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 77.11/51.01 [2019-03-28 12:51:14,718 INFO L119 BuchiIsEmpty]: Starting construction of run 77.11/51.01 [2019-03-28 12:51:14,718 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,718 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,719 INFO L794 eck$LassoCheckResult]: Stem: 90#ULTIMATE.startENTRY [210] ULTIMATE.startENTRY-->L32: Formula: (and (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|) (= |v_#valid_23| (store |v_#valid_24| 0 0))) InVars {#valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_6|, ULTIMATE.start_main_#t~nondet12=|v_ULTIMATE.start_main_#t~nondet12_6|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_5|, ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_5|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_5|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_10, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret16=|v_ULTIMATE.start_main_#t~ret16_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, #valid=|v_#valid_23|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_5|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_#t~nondet12, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~length1~0, #NULL.offset, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret16, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc14.offset, ULTIMATE.start_main_~length2~0] 91#L32 [140] L32-->L32-2: Formula: (>= v_ULTIMATE.start_main_~length1~0_6 1) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} OutVars{ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} AuxVars[] AssignedVars[] 87#L32-2 [141] L32-2-->L35-1: Formula: (>= v_ULTIMATE.start_main_~length2~0_6 1) InVars {ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} OutVars{ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} AuxVars[] AssignedVars[] 88#L35-1 [166] L35-1-->L40: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc13.offset_2| 0) (= |v_ULTIMATE.start_main_#t~malloc14.offset_2| 0) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2|)) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc14.offset_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc14.base_2|) (= |v_#valid_3| (store .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2| 1)) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc13.base_2| v_ULTIMATE.start_main_~length1~0_7) |v_ULTIMATE.start_main_#t~malloc14.base_2| v_ULTIMATE.start_main_~length2~0_7)) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc13.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc13.offset_2|) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2|)) (< |v_ULTIMATE.start_main_#t~malloc14.base_2| |v_#StackHeapBarrier_1|) (> |v_ULTIMATE.start_main_#t~malloc13.base_2| 0) (< |v_ULTIMATE.start_main_#t~malloc13.base_2| |v_#StackHeapBarrier_1|) (< 0 |v_ULTIMATE.start_main_#t~malloc14.base_2|))) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_2|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_2|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_2|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, #valid=|v_#valid_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_1|, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_2|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~nondetString1~0.base, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, ULTIMATE.start_main_#t~malloc14.offset] 85#L40 [94] L40-->L40-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= 1 .cse0) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0))) (<= .cse0 (select |v_#length_4| v_ULTIMATE.start_main_~nondetString1~0.base_3)))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} AuxVars[] AssignedVars[#memory_int] 83#L40-1 [211] L40-1-->L13: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (<= 1 .cse0) (= v_ULTIMATE.start_main_~nondetString2~0.base_8 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2| v_ULTIMATE.start_main_~nondetString2~0.offset_7) (= |v_ULTIMATE.start_main_#t~nondet15_5| |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.base_11 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|) (= (select |v_#valid_25| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_cstrncmp_~n_8 |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.offset_9 |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|) (= v_ULTIMATE.start_cstrncmp_~s1.base_14 |v_ULTIMATE.start_cstrncmp_#in~s1.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s1.base_2| v_ULTIMATE.start_main_~nondetString1~0.base_8) (= (store |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_10|) (<= .cse0 (select |v_#length_18| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2| v_ULTIMATE.start_cstrncmp_~s1.offset_11))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_18|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11} OutVars{ULTIMATE.start_cstrncmp_#t~mem8=|v_ULTIMATE.start_cstrncmp_#t~mem8_5|, ULTIMATE.start_cstrncmp_#t~mem9=|v_ULTIMATE.start_cstrncmp_#t~mem9_5|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_11, ULTIMATE.start_cstrncmp_#res=|v_ULTIMATE.start_cstrncmp_#res_6|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_6|, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_6|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_14, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_4|, ULTIMATE.start_cstrncmp_#in~s2.offset=|v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_5|, ULTIMATE.start_cstrncmp_#t~ite10=|v_ULTIMATE.start_cstrncmp_#t~ite10_6|, #length=|v_#length_18|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_8, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_4|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_11, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11, ULTIMATE.start_cstrncmp_~uc2~0=v_ULTIMATE.start_cstrncmp_~uc2~0_6, ULTIMATE.start_cstrncmp_#in~n=|v_ULTIMATE.start_cstrncmp_#in~n_2|, ULTIMATE.start_cstrncmp_~uc1~0=v_ULTIMATE.start_cstrncmp_~uc1~0_6, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrncmp_#in~s1.offset=|v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_9, ULTIMATE.start_cstrncmp_#in~s2.base=|v_ULTIMATE.start_cstrncmp_#in~s2.base_2|, ULTIMATE.start_cstrncmp_#in~s1.base=|v_ULTIMATE.start_cstrncmp_#in~s1.base_2|, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_10|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_6|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_10|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_10|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem8, ULTIMATE.start_cstrncmp_#t~mem9, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#res, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_#in~s2.offset, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~ite10, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.offset, ULTIMATE.start_cstrncmp_~uc2~0, ULTIMATE.start_cstrncmp_#in~n, ULTIMATE.start_cstrncmp_~uc1~0, ULTIMATE.start_cstrncmp_#in~s1.offset, ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#in~s2.base, ULTIMATE.start_cstrncmp_#in~s1.base, #memory_int, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset] 84#L13 [175] L13-->L16-8: Formula: (< v_ULTIMATE.start_cstrncmp_~n_4 0) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} OutVars{ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} AuxVars[] AssignedVars[] 78#L16-8 77.11/51.01 [2019-03-28 12:51:14,719 INFO L796 eck$LassoCheckResult]: Loop: 78#L16-8 [178] L16-8-->L16-1: Formula: (and (< 0 |v_ULTIMATE.start_cstrncmp_#t~post0_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_2| (= |v_ULTIMATE.start_cstrncmp_#t~post0_2| v_ULTIMATE.start_cstrncmp_~n_6) (= v_ULTIMATE.start_cstrncmp_~n_5 (+ |v_ULTIMATE.start_cstrncmp_#t~post0_2| (- 1)))) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_6} OutVars{ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_2|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_5, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~short3] 79#L16-1 [89] L16-1-->L16-2: Formula: |v_ULTIMATE.start_cstrncmp_#t~short3_3| InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} AuxVars[] AssignedVars[] 80#L16-2 [108] L16-2-->L16-3: Formula: (and (<= 0 v_ULTIMATE.start_cstrncmp_~s1.offset_3) (= 1 (select |v_#valid_10| v_ULTIMATE.start_cstrncmp_~s1.base_3)) (= |v_ULTIMATE.start_cstrncmp_#t~mem1_2| (select (select |v_#memory_int_5| v_ULTIMATE.start_cstrncmp_~s1.base_3) v_ULTIMATE.start_cstrncmp_~s1.offset_3)) (<= (+ v_ULTIMATE.start_cstrncmp_~s1.offset_3 1) (select |v_#length_8| v_ULTIMATE.start_cstrncmp_~s1.base_3))) InVars {#memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3, #valid=|v_#valid_10|} OutVars{#valid=|v_#valid_10|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_2|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem1] 93#L16-3 [103] L16-3-->L16-4: Formula: (and (= |v_ULTIMATE.start_cstrncmp_#t~mem2_2| (select (select |v_#memory_int_6| v_ULTIMATE.start_cstrncmp_~s2.base_3) v_ULTIMATE.start_cstrncmp_~s2.offset_3)) (= 1 (select |v_#valid_12| v_ULTIMATE.start_cstrncmp_~s2.base_3)) (<= 0 v_ULTIMATE.start_cstrncmp_~s2.offset_3) (<= (+ v_ULTIMATE.start_cstrncmp_~s2.offset_3 1) (select |v_#length_10| v_ULTIMATE.start_cstrncmp_~s2.base_3))) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, #length=|v_#length_10|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_2|, #valid=|v_#valid_12|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2] 92#L16-4 [200] L16-4-->L16-6: Formula: (and |v_ULTIMATE.start_cstrncmp_#t~short3_4| (= |v_ULTIMATE.start_cstrncmp_#t~mem1_3| |v_ULTIMATE.start_cstrncmp_#t~mem2_3|)) InVars {ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|} OutVars{ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~short3] 89#L16-6 [187] L16-6-->L19: Formula: (and (< v_ULTIMATE.start_cstrncmp_~n_7 0) (not |v_ULTIMATE.start_cstrncmp_#t~short5_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_9|) InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_9|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7} OutVars{ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_5|, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_4|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_5|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_8|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5] 86#L19 [127] L19-->L19-4: Formula: |v_ULTIMATE.start_cstrncmp_#t~short5_3| InVars {ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} AuxVars[] AssignedVars[] 77#L19-4 [115] L19-4-->L16-8: Formula: (and (= v_ULTIMATE.start_cstrncmp_~s1.offset_7 (+ v_ULTIMATE.start_cstrncmp_~s1.offset_8 1)) (= v_ULTIMATE.start_cstrncmp_~s2.offset_5 (+ v_ULTIMATE.start_cstrncmp_~s2.offset_6 1)) (= v_ULTIMATE.start_cstrncmp_~s1.base_9 v_ULTIMATE.start_cstrncmp_~s1.base_10) (not |v_ULTIMATE.start_cstrncmp_#t~short5_9|) (= v_ULTIMATE.start_cstrncmp_~s2.base_7 v_ULTIMATE.start_cstrncmp_~s2.base_6)) InVars {ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_6, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_7, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_10, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_9|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_8} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_5, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_2|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_6, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_2|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_5|, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_2|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_9, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_8|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_2|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_7} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset, ULTIMATE.start_cstrncmp_~s1.offset] 78#L16-8 77.11/51.01 [2019-03-28 12:51:14,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,720 INFO L82 PathProgramCache]: Analyzing trace with hash -1011605018, now seen corresponding path program 2 times 77.11/51.01 [2019-03-28 12:51:14,720 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,720 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,721 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,721 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,721 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,732 INFO L82 PathProgramCache]: Analyzing trace with hash -248198230, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:14,732 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,733 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,733 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,733 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,734 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:14,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:14,741 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:14,742 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 77.11/51.01 [2019-03-28 12:51:14,742 INFO L811 eck$LassoCheckResult]: loop already infeasible 77.11/51.01 [2019-03-28 12:51:14,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 77.11/51.01 [2019-03-28 12:51:14,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 77.11/51.01 [2019-03-28 12:51:14,742 INFO L87 Difference]: Start difference. First operand 17 states and 28 transitions. cyclomatic complexity: 12 Second operand 3 states. 77.11/51.01 [2019-03-28 12:51:14,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:14,768 INFO L93 Difference]: Finished difference Result 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 77.11/51.01 [2019-03-28 12:51:14,769 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,770 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,770 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,770 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 77.11/51.01 [2019-03-28 12:51:14,771 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 77.11/51.01 [2019-03-28 12:51:14,771 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,771 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 77.11/51.01 [2019-03-28 12:51:14,771 INFO L706 BuchiCegarLoop]: Abstraction has 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. 77.11/51.01 [2019-03-28 12:51:14,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. 77.11/51.01 [2019-03-28 12:51:14,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 27 transitions. 77.11/51.01 [2019-03-28 12:51:14,772 INFO L729 BuchiCegarLoop]: Abstraction has 17 states and 27 transitions. 77.11/51.01 [2019-03-28 12:51:14,773 INFO L609 BuchiCegarLoop]: Abstraction has 17 states and 27 transitions. 77.11/51.01 [2019-03-28 12:51:14,773 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ 77.11/51.01 [2019-03-28 12:51:14,773 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 27 transitions. 77.11/51.01 [2019-03-28 12:51:14,773 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,773 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 77.11/51.01 [2019-03-28 12:51:14,773 INFO L119 BuchiIsEmpty]: Starting construction of run 77.11/51.01 [2019-03-28 12:51:14,774 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,774 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,775 INFO L794 eck$LassoCheckResult]: Stem: 131#ULTIMATE.startENTRY [210] ULTIMATE.startENTRY-->L32: Formula: (and (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|) (= |v_#valid_23| (store |v_#valid_24| 0 0))) InVars {#valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_6|, ULTIMATE.start_main_#t~nondet12=|v_ULTIMATE.start_main_#t~nondet12_6|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_5|, ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_5|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_5|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_10, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret16=|v_ULTIMATE.start_main_#t~ret16_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, #valid=|v_#valid_23|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_5|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_#t~nondet12, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~length1~0, #NULL.offset, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret16, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc14.offset, ULTIMATE.start_main_~length2~0] 132#L32 [140] L32-->L32-2: Formula: (>= v_ULTIMATE.start_main_~length1~0_6 1) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} OutVars{ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} AuxVars[] AssignedVars[] 128#L32-2 [141] L32-2-->L35-1: Formula: (>= v_ULTIMATE.start_main_~length2~0_6 1) InVars {ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} OutVars{ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} AuxVars[] AssignedVars[] 129#L35-1 [166] L35-1-->L40: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc13.offset_2| 0) (= |v_ULTIMATE.start_main_#t~malloc14.offset_2| 0) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2|)) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc14.offset_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc14.base_2|) (= |v_#valid_3| (store .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2| 1)) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc13.base_2| v_ULTIMATE.start_main_~length1~0_7) |v_ULTIMATE.start_main_#t~malloc14.base_2| v_ULTIMATE.start_main_~length2~0_7)) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc13.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc13.offset_2|) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2|)) (< |v_ULTIMATE.start_main_#t~malloc14.base_2| |v_#StackHeapBarrier_1|) (> |v_ULTIMATE.start_main_#t~malloc13.base_2| 0) (< |v_ULTIMATE.start_main_#t~malloc13.base_2| |v_#StackHeapBarrier_1|) (< 0 |v_ULTIMATE.start_main_#t~malloc14.base_2|))) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_2|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_2|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_2|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, #valid=|v_#valid_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_1|, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_2|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~nondetString1~0.base, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, ULTIMATE.start_main_#t~malloc14.offset] 126#L40 [94] L40-->L40-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= 1 .cse0) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0))) (<= .cse0 (select |v_#length_4| v_ULTIMATE.start_main_~nondetString1~0.base_3)))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} AuxVars[] AssignedVars[#memory_int] 124#L40-1 [211] L40-1-->L13: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (<= 1 .cse0) (= v_ULTIMATE.start_main_~nondetString2~0.base_8 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2| v_ULTIMATE.start_main_~nondetString2~0.offset_7) (= |v_ULTIMATE.start_main_#t~nondet15_5| |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.base_11 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|) (= (select |v_#valid_25| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_cstrncmp_~n_8 |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.offset_9 |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|) (= v_ULTIMATE.start_cstrncmp_~s1.base_14 |v_ULTIMATE.start_cstrncmp_#in~s1.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s1.base_2| v_ULTIMATE.start_main_~nondetString1~0.base_8) (= (store |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_10|) (<= .cse0 (select |v_#length_18| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2| v_ULTIMATE.start_cstrncmp_~s1.offset_11))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_18|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11} OutVars{ULTIMATE.start_cstrncmp_#t~mem8=|v_ULTIMATE.start_cstrncmp_#t~mem8_5|, ULTIMATE.start_cstrncmp_#t~mem9=|v_ULTIMATE.start_cstrncmp_#t~mem9_5|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_11, ULTIMATE.start_cstrncmp_#res=|v_ULTIMATE.start_cstrncmp_#res_6|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_6|, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_6|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_14, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_4|, ULTIMATE.start_cstrncmp_#in~s2.offset=|v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_5|, ULTIMATE.start_cstrncmp_#t~ite10=|v_ULTIMATE.start_cstrncmp_#t~ite10_6|, #length=|v_#length_18|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_8, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_4|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_11, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11, ULTIMATE.start_cstrncmp_~uc2~0=v_ULTIMATE.start_cstrncmp_~uc2~0_6, ULTIMATE.start_cstrncmp_#in~n=|v_ULTIMATE.start_cstrncmp_#in~n_2|, ULTIMATE.start_cstrncmp_~uc1~0=v_ULTIMATE.start_cstrncmp_~uc1~0_6, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrncmp_#in~s1.offset=|v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_9, ULTIMATE.start_cstrncmp_#in~s2.base=|v_ULTIMATE.start_cstrncmp_#in~s2.base_2|, ULTIMATE.start_cstrncmp_#in~s1.base=|v_ULTIMATE.start_cstrncmp_#in~s1.base_2|, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_10|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_6|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_10|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_10|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem8, ULTIMATE.start_cstrncmp_#t~mem9, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#res, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_#in~s2.offset, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~ite10, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.offset, ULTIMATE.start_cstrncmp_~uc2~0, ULTIMATE.start_cstrncmp_#in~n, ULTIMATE.start_cstrncmp_~uc1~0, ULTIMATE.start_cstrncmp_#in~s1.offset, ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#in~s2.base, ULTIMATE.start_cstrncmp_#in~s1.base, #memory_int, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset] 125#L13 [175] L13-->L16-8: Formula: (< v_ULTIMATE.start_cstrncmp_~n_4 0) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} OutVars{ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} AuxVars[] AssignedVars[] 121#L16-8 77.11/51.01 [2019-03-28 12:51:14,775 INFO L796 eck$LassoCheckResult]: Loop: 121#L16-8 [178] L16-8-->L16-1: Formula: (and (< 0 |v_ULTIMATE.start_cstrncmp_#t~post0_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_2| (= |v_ULTIMATE.start_cstrncmp_#t~post0_2| v_ULTIMATE.start_cstrncmp_~n_6) (= v_ULTIMATE.start_cstrncmp_~n_5 (+ |v_ULTIMATE.start_cstrncmp_#t~post0_2| (- 1)))) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_6} OutVars{ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_2|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_5, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~short3] 118#L16-1 [89] L16-1-->L16-2: Formula: |v_ULTIMATE.start_cstrncmp_#t~short3_3| InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} AuxVars[] AssignedVars[] 119#L16-2 [108] L16-2-->L16-3: Formula: (and (<= 0 v_ULTIMATE.start_cstrncmp_~s1.offset_3) (= 1 (select |v_#valid_10| v_ULTIMATE.start_cstrncmp_~s1.base_3)) (= |v_ULTIMATE.start_cstrncmp_#t~mem1_2| (select (select |v_#memory_int_5| v_ULTIMATE.start_cstrncmp_~s1.base_3) v_ULTIMATE.start_cstrncmp_~s1.offset_3)) (<= (+ v_ULTIMATE.start_cstrncmp_~s1.offset_3 1) (select |v_#length_8| v_ULTIMATE.start_cstrncmp_~s1.base_3))) InVars {#memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3, #valid=|v_#valid_10|} OutVars{#valid=|v_#valid_10|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_2|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem1] 134#L16-3 [103] L16-3-->L16-4: Formula: (and (= |v_ULTIMATE.start_cstrncmp_#t~mem2_2| (select (select |v_#memory_int_6| v_ULTIMATE.start_cstrncmp_~s2.base_3) v_ULTIMATE.start_cstrncmp_~s2.offset_3)) (= 1 (select |v_#valid_12| v_ULTIMATE.start_cstrncmp_~s2.base_3)) (<= 0 v_ULTIMATE.start_cstrncmp_~s2.offset_3) (<= (+ v_ULTIMATE.start_cstrncmp_~s2.offset_3 1) (select |v_#length_10| v_ULTIMATE.start_cstrncmp_~s2.base_3))) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, #length=|v_#length_10|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_2|, #valid=|v_#valid_12|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2] 133#L16-4 [200] L16-4-->L16-6: Formula: (and |v_ULTIMATE.start_cstrncmp_#t~short3_4| (= |v_ULTIMATE.start_cstrncmp_#t~mem1_3| |v_ULTIMATE.start_cstrncmp_#t~mem2_3|)) InVars {ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|} OutVars{ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~short3] 130#L16-6 [188] L16-6-->L19: Formula: (and (not |v_ULTIMATE.start_cstrncmp_#t~short5_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_9| (> v_ULTIMATE.start_cstrncmp_~n_7 0)) InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_9|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7} OutVars{ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_5|, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_4|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_5|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_8|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5] 127#L19 [127] L19-->L19-4: Formula: |v_ULTIMATE.start_cstrncmp_#t~short5_3| InVars {ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} AuxVars[] AssignedVars[] 120#L19-4 [115] L19-4-->L16-8: Formula: (and (= v_ULTIMATE.start_cstrncmp_~s1.offset_7 (+ v_ULTIMATE.start_cstrncmp_~s1.offset_8 1)) (= v_ULTIMATE.start_cstrncmp_~s2.offset_5 (+ v_ULTIMATE.start_cstrncmp_~s2.offset_6 1)) (= v_ULTIMATE.start_cstrncmp_~s1.base_9 v_ULTIMATE.start_cstrncmp_~s1.base_10) (not |v_ULTIMATE.start_cstrncmp_#t~short5_9|) (= v_ULTIMATE.start_cstrncmp_~s2.base_7 v_ULTIMATE.start_cstrncmp_~s2.base_6)) InVars {ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_6, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_7, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_10, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_9|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_8} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_5, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_2|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_6, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_2|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_5|, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_2|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_9, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_8|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_2|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_7} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset, ULTIMATE.start_cstrncmp_~s1.offset] 121#L16-8 77.11/51.01 [2019-03-28 12:51:14,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,775 INFO L82 PathProgramCache]: Analyzing trace with hash -1011605018, now seen corresponding path program 3 times 77.11/51.01 [2019-03-28 12:51:14,776 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,776 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,777 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,777 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,788 INFO L82 PathProgramCache]: Analyzing trace with hash -248197269, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:14,788 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,789 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,789 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,790 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:14,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:14,797 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:14,798 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 77.11/51.01 [2019-03-28 12:51:14,798 INFO L811 eck$LassoCheckResult]: loop already infeasible 77.11/51.01 [2019-03-28 12:51:14,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 77.11/51.01 [2019-03-28 12:51:14,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 77.11/51.01 [2019-03-28 12:51:14,798 INFO L87 Difference]: Start difference. First operand 17 states and 27 transitions. cyclomatic complexity: 11 Second operand 3 states. 77.11/51.01 [2019-03-28 12:51:14,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:14,830 INFO L93 Difference]: Finished difference Result 19 states and 29 transitions. 77.11/51.01 [2019-03-28 12:51:14,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 77.11/51.01 [2019-03-28 12:51:14,831 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 29 transitions. 77.11/51.01 [2019-03-28 12:51:14,831 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 77.11/51.01 [2019-03-28 12:51:14,832 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 29 transitions. 77.11/51.01 [2019-03-28 12:51:14,832 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 77.11/51.01 [2019-03-28 12:51:14,832 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 77.11/51.01 [2019-03-28 12:51:14,832 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 29 transitions. 77.11/51.01 [2019-03-28 12:51:14,832 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 77.11/51.01 [2019-03-28 12:51:14,833 INFO L706 BuchiCegarLoop]: Abstraction has 19 states and 29 transitions. 77.11/51.01 [2019-03-28 12:51:14,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 29 transitions. 77.11/51.01 [2019-03-28 12:51:14,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 18. 77.11/51.01 [2019-03-28 12:51:14,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. 77.11/51.01 [2019-03-28 12:51:14,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,834 INFO L729 BuchiCegarLoop]: Abstraction has 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,834 INFO L609 BuchiCegarLoop]: Abstraction has 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,834 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ 77.11/51.01 [2019-03-28 12:51:14,834 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 28 transitions. 77.11/51.01 [2019-03-28 12:51:14,835 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 11 77.11/51.01 [2019-03-28 12:51:14,835 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 77.11/51.01 [2019-03-28 12:51:14,835 INFO L119 BuchiIsEmpty]: Starting construction of run 77.11/51.01 [2019-03-28 12:51:14,835 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,835 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,836 INFO L794 eck$LassoCheckResult]: Stem: 174#ULTIMATE.startENTRY [210] ULTIMATE.startENTRY-->L32: Formula: (and (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|) (= |v_#valid_23| (store |v_#valid_24| 0 0))) InVars {#valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_6|, ULTIMATE.start_main_#t~nondet12=|v_ULTIMATE.start_main_#t~nondet12_6|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_5|, ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_5|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_5|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_10, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret16=|v_ULTIMATE.start_main_#t~ret16_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, #valid=|v_#valid_23|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_5|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_#t~nondet12, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~length1~0, #NULL.offset, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret16, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc14.offset, ULTIMATE.start_main_~length2~0] 175#L32 [140] L32-->L32-2: Formula: (>= v_ULTIMATE.start_main_~length1~0_6 1) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} OutVars{ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} AuxVars[] AssignedVars[] 170#L32-2 [141] L32-2-->L35-1: Formula: (>= v_ULTIMATE.start_main_~length2~0_6 1) InVars {ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} OutVars{ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} AuxVars[] AssignedVars[] 171#L35-1 [166] L35-1-->L40: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc13.offset_2| 0) (= |v_ULTIMATE.start_main_#t~malloc14.offset_2| 0) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2|)) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc14.offset_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc14.base_2|) (= |v_#valid_3| (store .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2| 1)) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc13.base_2| v_ULTIMATE.start_main_~length1~0_7) |v_ULTIMATE.start_main_#t~malloc14.base_2| v_ULTIMATE.start_main_~length2~0_7)) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc13.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc13.offset_2|) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2|)) (< |v_ULTIMATE.start_main_#t~malloc14.base_2| |v_#StackHeapBarrier_1|) (> |v_ULTIMATE.start_main_#t~malloc13.base_2| 0) (< |v_ULTIMATE.start_main_#t~malloc13.base_2| |v_#StackHeapBarrier_1|) (< 0 |v_ULTIMATE.start_main_#t~malloc14.base_2|))) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_2|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_2|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_2|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, #valid=|v_#valid_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_1|, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_2|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~nondetString1~0.base, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, ULTIMATE.start_main_#t~malloc14.offset] 168#L40 [94] L40-->L40-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= 1 .cse0) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0))) (<= .cse0 (select |v_#length_4| v_ULTIMATE.start_main_~nondetString1~0.base_3)))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} AuxVars[] AssignedVars[#memory_int] 166#L40-1 [211] L40-1-->L13: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (<= 1 .cse0) (= v_ULTIMATE.start_main_~nondetString2~0.base_8 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2| v_ULTIMATE.start_main_~nondetString2~0.offset_7) (= |v_ULTIMATE.start_main_#t~nondet15_5| |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.base_11 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|) (= (select |v_#valid_25| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_cstrncmp_~n_8 |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.offset_9 |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|) (= v_ULTIMATE.start_cstrncmp_~s1.base_14 |v_ULTIMATE.start_cstrncmp_#in~s1.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s1.base_2| v_ULTIMATE.start_main_~nondetString1~0.base_8) (= (store |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_10|) (<= .cse0 (select |v_#length_18| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2| v_ULTIMATE.start_cstrncmp_~s1.offset_11))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_18|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11} OutVars{ULTIMATE.start_cstrncmp_#t~mem8=|v_ULTIMATE.start_cstrncmp_#t~mem8_5|, ULTIMATE.start_cstrncmp_#t~mem9=|v_ULTIMATE.start_cstrncmp_#t~mem9_5|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_11, ULTIMATE.start_cstrncmp_#res=|v_ULTIMATE.start_cstrncmp_#res_6|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_6|, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_6|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_14, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_4|, ULTIMATE.start_cstrncmp_#in~s2.offset=|v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_5|, ULTIMATE.start_cstrncmp_#t~ite10=|v_ULTIMATE.start_cstrncmp_#t~ite10_6|, #length=|v_#length_18|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_8, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_4|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_11, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11, ULTIMATE.start_cstrncmp_~uc2~0=v_ULTIMATE.start_cstrncmp_~uc2~0_6, ULTIMATE.start_cstrncmp_#in~n=|v_ULTIMATE.start_cstrncmp_#in~n_2|, ULTIMATE.start_cstrncmp_~uc1~0=v_ULTIMATE.start_cstrncmp_~uc1~0_6, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrncmp_#in~s1.offset=|v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_9, ULTIMATE.start_cstrncmp_#in~s2.base=|v_ULTIMATE.start_cstrncmp_#in~s2.base_2|, ULTIMATE.start_cstrncmp_#in~s1.base=|v_ULTIMATE.start_cstrncmp_#in~s1.base_2|, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_10|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_6|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_10|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_10|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem8, ULTIMATE.start_cstrncmp_#t~mem9, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#res, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_#in~s2.offset, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~ite10, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.offset, ULTIMATE.start_cstrncmp_~uc2~0, ULTIMATE.start_cstrncmp_#in~n, ULTIMATE.start_cstrncmp_~uc1~0, ULTIMATE.start_cstrncmp_#in~s1.offset, ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#in~s2.base, ULTIMATE.start_cstrncmp_#in~s1.base, #memory_int, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset] 167#L13 [175] L13-->L16-8: Formula: (< v_ULTIMATE.start_cstrncmp_~n_4 0) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} OutVars{ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} AuxVars[] AssignedVars[] 163#L16-8 77.11/51.01 [2019-03-28 12:51:14,837 INFO L796 eck$LassoCheckResult]: Loop: 163#L16-8 [178] L16-8-->L16-1: Formula: (and (< 0 |v_ULTIMATE.start_cstrncmp_#t~post0_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_2| (= |v_ULTIMATE.start_cstrncmp_#t~post0_2| v_ULTIMATE.start_cstrncmp_~n_6) (= v_ULTIMATE.start_cstrncmp_~n_5 (+ |v_ULTIMATE.start_cstrncmp_#t~post0_2| (- 1)))) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_6} OutVars{ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_2|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_5, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~short3] 160#L16-1 [89] L16-1-->L16-2: Formula: |v_ULTIMATE.start_cstrncmp_#t~short3_3| InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} AuxVars[] AssignedVars[] 161#L16-2 [108] L16-2-->L16-3: Formula: (and (<= 0 v_ULTIMATE.start_cstrncmp_~s1.offset_3) (= 1 (select |v_#valid_10| v_ULTIMATE.start_cstrncmp_~s1.base_3)) (= |v_ULTIMATE.start_cstrncmp_#t~mem1_2| (select (select |v_#memory_int_5| v_ULTIMATE.start_cstrncmp_~s1.base_3) v_ULTIMATE.start_cstrncmp_~s1.offset_3)) (<= (+ v_ULTIMATE.start_cstrncmp_~s1.offset_3 1) (select |v_#length_8| v_ULTIMATE.start_cstrncmp_~s1.base_3))) InVars {#memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3, #valid=|v_#valid_10|} OutVars{#valid=|v_#valid_10|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_2|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem1] 177#L16-3 [103] L16-3-->L16-4: Formula: (and (= |v_ULTIMATE.start_cstrncmp_#t~mem2_2| (select (select |v_#memory_int_6| v_ULTIMATE.start_cstrncmp_~s2.base_3) v_ULTIMATE.start_cstrncmp_~s2.offset_3)) (= 1 (select |v_#valid_12| v_ULTIMATE.start_cstrncmp_~s2.base_3)) (<= 0 v_ULTIMATE.start_cstrncmp_~s2.offset_3) (<= (+ v_ULTIMATE.start_cstrncmp_~s2.offset_3 1) (select |v_#length_10| v_ULTIMATE.start_cstrncmp_~s2.base_3))) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, #length=|v_#length_10|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_2|, #valid=|v_#valid_12|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2] 176#L16-4 [200] L16-4-->L16-6: Formula: (and |v_ULTIMATE.start_cstrncmp_#t~short3_4| (= |v_ULTIMATE.start_cstrncmp_#t~mem1_3| |v_ULTIMATE.start_cstrncmp_#t~mem2_3|)) InVars {ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|} OutVars{ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~short3] 172#L16-6 [189] L16-6-->L19: Formula: (and |v_ULTIMATE.start_cstrncmp_#t~short5_2| (= v_ULTIMATE.start_cstrncmp_~n_7 0) |v_ULTIMATE.start_cstrncmp_#t~short3_9|) InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_9|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7} OutVars{ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_5|, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_4|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_5|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_8|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5] 173#L19 [127] L19-->L19-4: Formula: |v_ULTIMATE.start_cstrncmp_#t~short5_3| InVars {ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_3|} AuxVars[] AssignedVars[] 162#L19-4 [115] L19-4-->L16-8: Formula: (and (= v_ULTIMATE.start_cstrncmp_~s1.offset_7 (+ v_ULTIMATE.start_cstrncmp_~s1.offset_8 1)) (= v_ULTIMATE.start_cstrncmp_~s2.offset_5 (+ v_ULTIMATE.start_cstrncmp_~s2.offset_6 1)) (= v_ULTIMATE.start_cstrncmp_~s1.base_9 v_ULTIMATE.start_cstrncmp_~s1.base_10) (not |v_ULTIMATE.start_cstrncmp_#t~short5_9|) (= v_ULTIMATE.start_cstrncmp_~s2.base_7 v_ULTIMATE.start_cstrncmp_~s2.base_6)) InVars {ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_6, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_7, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_10, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_9|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_8} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_5, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_2|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_6, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_2|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_5|, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_2|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_9, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_8|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_2|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_7} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset, ULTIMATE.start_cstrncmp_~s1.offset] 163#L16-8 77.11/51.01 [2019-03-28 12:51:14,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1011605018, now seen corresponding path program 4 times 77.11/51.01 [2019-03-28 12:51:14,837 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,837 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,838 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,838 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,850 INFO L82 PathProgramCache]: Analyzing trace with hash -248196308, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:14,850 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,850 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,851 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,851 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:14,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:14,858 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:14,858 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 77.11/51.01 [2019-03-28 12:51:14,859 INFO L811 eck$LassoCheckResult]: loop already infeasible 77.11/51.01 [2019-03-28 12:51:14,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 77.11/51.01 [2019-03-28 12:51:14,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 77.11/51.01 [2019-03-28 12:51:14,859 INFO L87 Difference]: Start difference. First operand 18 states and 28 transitions. cyclomatic complexity: 11 Second operand 3 states. 77.11/51.01 [2019-03-28 12:51:14,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:14,894 INFO L93 Difference]: Finished difference Result 19 states and 27 transitions. 77.11/51.01 [2019-03-28 12:51:14,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 77.11/51.01 [2019-03-28 12:51:14,894 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 27 transitions. 77.11/51.01 [2019-03-28 12:51:14,895 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,895 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,896 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 77.11/51.01 [2019-03-28 12:51:14,896 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 77.11/51.01 [2019-03-28 12:51:14,896 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,896 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 77.11/51.01 [2019-03-28 12:51:14,896 INFO L706 BuchiCegarLoop]: Abstraction has 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. 77.11/51.01 [2019-03-28 12:51:14,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. 77.11/51.01 [2019-03-28 12:51:14,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,897 INFO L729 BuchiCegarLoop]: Abstraction has 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,897 INFO L609 BuchiCegarLoop]: Abstraction has 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,898 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ 77.11/51.01 [2019-03-28 12:51:14,898 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:14,898 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:14,898 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 77.11/51.01 [2019-03-28 12:51:14,898 INFO L119 BuchiIsEmpty]: Starting construction of run 77.11/51.01 [2019-03-28 12:51:14,899 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,899 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:14,900 INFO L794 eck$LassoCheckResult]: Stem: 216#ULTIMATE.startENTRY [210] ULTIMATE.startENTRY-->L32: Formula: (and (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|) (= |v_#valid_23| (store |v_#valid_24| 0 0))) InVars {#valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_6|, ULTIMATE.start_main_#t~nondet12=|v_ULTIMATE.start_main_#t~nondet12_6|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_5|, ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_5|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_5|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_10, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret16=|v_ULTIMATE.start_main_#t~ret16_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, #valid=|v_#valid_23|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_5|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_#t~nondet12, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~length1~0, #NULL.offset, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret16, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc14.offset, ULTIMATE.start_main_~length2~0] 217#L32 [140] L32-->L32-2: Formula: (>= v_ULTIMATE.start_main_~length1~0_6 1) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} OutVars{ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} AuxVars[] AssignedVars[] 213#L32-2 [141] L32-2-->L35-1: Formula: (>= v_ULTIMATE.start_main_~length2~0_6 1) InVars {ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} OutVars{ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} AuxVars[] AssignedVars[] 214#L35-1 [166] L35-1-->L40: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc13.offset_2| 0) (= |v_ULTIMATE.start_main_#t~malloc14.offset_2| 0) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2|)) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc14.offset_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc14.base_2|) (= |v_#valid_3| (store .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2| 1)) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc13.base_2| v_ULTIMATE.start_main_~length1~0_7) |v_ULTIMATE.start_main_#t~malloc14.base_2| v_ULTIMATE.start_main_~length2~0_7)) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc13.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc13.offset_2|) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2|)) (< |v_ULTIMATE.start_main_#t~malloc14.base_2| |v_#StackHeapBarrier_1|) (> |v_ULTIMATE.start_main_#t~malloc13.base_2| 0) (< |v_ULTIMATE.start_main_#t~malloc13.base_2| |v_#StackHeapBarrier_1|) (< 0 |v_ULTIMATE.start_main_#t~malloc14.base_2|))) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_2|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_2|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_2|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, #valid=|v_#valid_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_1|, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_2|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~nondetString1~0.base, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, ULTIMATE.start_main_#t~malloc14.offset] 211#L40 [94] L40-->L40-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= 1 .cse0) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0))) (<= .cse0 (select |v_#length_4| v_ULTIMATE.start_main_~nondetString1~0.base_3)))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} AuxVars[] AssignedVars[#memory_int] 209#L40-1 [211] L40-1-->L13: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (<= 1 .cse0) (= v_ULTIMATE.start_main_~nondetString2~0.base_8 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2| v_ULTIMATE.start_main_~nondetString2~0.offset_7) (= |v_ULTIMATE.start_main_#t~nondet15_5| |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.base_11 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|) (= (select |v_#valid_25| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_cstrncmp_~n_8 |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.offset_9 |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|) (= v_ULTIMATE.start_cstrncmp_~s1.base_14 |v_ULTIMATE.start_cstrncmp_#in~s1.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s1.base_2| v_ULTIMATE.start_main_~nondetString1~0.base_8) (= (store |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_10|) (<= .cse0 (select |v_#length_18| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2| v_ULTIMATE.start_cstrncmp_~s1.offset_11))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_18|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11} OutVars{ULTIMATE.start_cstrncmp_#t~mem8=|v_ULTIMATE.start_cstrncmp_#t~mem8_5|, ULTIMATE.start_cstrncmp_#t~mem9=|v_ULTIMATE.start_cstrncmp_#t~mem9_5|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_11, ULTIMATE.start_cstrncmp_#res=|v_ULTIMATE.start_cstrncmp_#res_6|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_6|, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_6|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_14, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_4|, ULTIMATE.start_cstrncmp_#in~s2.offset=|v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_5|, ULTIMATE.start_cstrncmp_#t~ite10=|v_ULTIMATE.start_cstrncmp_#t~ite10_6|, #length=|v_#length_18|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_8, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_4|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_11, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11, ULTIMATE.start_cstrncmp_~uc2~0=v_ULTIMATE.start_cstrncmp_~uc2~0_6, ULTIMATE.start_cstrncmp_#in~n=|v_ULTIMATE.start_cstrncmp_#in~n_2|, ULTIMATE.start_cstrncmp_~uc1~0=v_ULTIMATE.start_cstrncmp_~uc1~0_6, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrncmp_#in~s1.offset=|v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_9, ULTIMATE.start_cstrncmp_#in~s2.base=|v_ULTIMATE.start_cstrncmp_#in~s2.base_2|, ULTIMATE.start_cstrncmp_#in~s1.base=|v_ULTIMATE.start_cstrncmp_#in~s1.base_2|, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_10|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_6|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_10|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_10|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem8, ULTIMATE.start_cstrncmp_#t~mem9, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#res, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_#in~s2.offset, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~ite10, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.offset, ULTIMATE.start_cstrncmp_~uc2~0, ULTIMATE.start_cstrncmp_#in~n, ULTIMATE.start_cstrncmp_~uc1~0, ULTIMATE.start_cstrncmp_#in~s1.offset, ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#in~s2.base, ULTIMATE.start_cstrncmp_#in~s1.base, #memory_int, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset] 210#L13 [175] L13-->L16-8: Formula: (< v_ULTIMATE.start_cstrncmp_~n_4 0) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} OutVars{ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} AuxVars[] AssignedVars[] 206#L16-8 77.11/51.01 [2019-03-28 12:51:14,900 INFO L796 eck$LassoCheckResult]: Loop: 206#L16-8 [178] L16-8-->L16-1: Formula: (and (< 0 |v_ULTIMATE.start_cstrncmp_#t~post0_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_2| (= |v_ULTIMATE.start_cstrncmp_#t~post0_2| v_ULTIMATE.start_cstrncmp_~n_6) (= v_ULTIMATE.start_cstrncmp_~n_5 (+ |v_ULTIMATE.start_cstrncmp_#t~post0_2| (- 1)))) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_6} OutVars{ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_2|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_5, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~short3] 203#L16-1 [89] L16-1-->L16-2: Formula: |v_ULTIMATE.start_cstrncmp_#t~short3_3| InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} AuxVars[] AssignedVars[] 204#L16-2 [108] L16-2-->L16-3: Formula: (and (<= 0 v_ULTIMATE.start_cstrncmp_~s1.offset_3) (= 1 (select |v_#valid_10| v_ULTIMATE.start_cstrncmp_~s1.base_3)) (= |v_ULTIMATE.start_cstrncmp_#t~mem1_2| (select (select |v_#memory_int_5| v_ULTIMATE.start_cstrncmp_~s1.base_3) v_ULTIMATE.start_cstrncmp_~s1.offset_3)) (<= (+ v_ULTIMATE.start_cstrncmp_~s1.offset_3 1) (select |v_#length_8| v_ULTIMATE.start_cstrncmp_~s1.base_3))) InVars {#memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3, #valid=|v_#valid_10|} OutVars{#valid=|v_#valid_10|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_2|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem1] 219#L16-3 [103] L16-3-->L16-4: Formula: (and (= |v_ULTIMATE.start_cstrncmp_#t~mem2_2| (select (select |v_#memory_int_6| v_ULTIMATE.start_cstrncmp_~s2.base_3) v_ULTIMATE.start_cstrncmp_~s2.offset_3)) (= 1 (select |v_#valid_12| v_ULTIMATE.start_cstrncmp_~s2.base_3)) (<= 0 v_ULTIMATE.start_cstrncmp_~s2.offset_3) (<= (+ v_ULTIMATE.start_cstrncmp_~s2.offset_3 1) (select |v_#length_10| v_ULTIMATE.start_cstrncmp_~s2.base_3))) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, #length=|v_#length_10|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_2|, #valid=|v_#valid_12|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2] 218#L16-4 [200] L16-4-->L16-6: Formula: (and |v_ULTIMATE.start_cstrncmp_#t~short3_4| (= |v_ULTIMATE.start_cstrncmp_#t~mem1_3| |v_ULTIMATE.start_cstrncmp_#t~mem2_3|)) InVars {ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|} OutVars{ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~short3] 215#L16-6 [188] L16-6-->L19: Formula: (and (not |v_ULTIMATE.start_cstrncmp_#t~short5_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_9| (> v_ULTIMATE.start_cstrncmp_~n_7 0)) InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_9|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7} OutVars{ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_5|, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_4|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_5|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_8|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5] 212#L19 [128] L19-->L19-2: Formula: (not |v_ULTIMATE.start_cstrncmp_#t~short5_4|) InVars {ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_4|} OutVars{ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_4|} AuxVars[] AssignedVars[] 208#L19-2 [119] L19-2-->L19-3: Formula: (and (<= (+ v_ULTIMATE.start_cstrncmp_~s1.offset_5 1) (select |v_#length_12| v_ULTIMATE.start_cstrncmp_~s1.base_6)) (= 1 (select |v_#valid_14| v_ULTIMATE.start_cstrncmp_~s1.base_6)) (= |v_ULTIMATE.start_cstrncmp_#t~mem4_2| (select (select |v_#memory_int_7| v_ULTIMATE.start_cstrncmp_~s1.base_6) v_ULTIMATE.start_cstrncmp_~s1.offset_5)) (<= 0 v_ULTIMATE.start_cstrncmp_~s1.offset_5)) InVars {#memory_int=|v_#memory_int_7|, #length=|v_#length_12|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_6, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_5, #valid=|v_#valid_14|} OutVars{ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_2|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_7|, #length=|v_#length_12|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_6, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_5} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem4] 207#L19-3 [208] L19-3-->L19-4: Formula: (and (not |v_ULTIMATE.start_cstrncmp_#t~short5_5|) (< |v_ULTIMATE.start_cstrncmp_#t~mem4_3| 0)) InVars {ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_3|} OutVars{ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_3|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_5|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~short5] 205#L19-4 [115] L19-4-->L16-8: Formula: (and (= v_ULTIMATE.start_cstrncmp_~s1.offset_7 (+ v_ULTIMATE.start_cstrncmp_~s1.offset_8 1)) (= v_ULTIMATE.start_cstrncmp_~s2.offset_5 (+ v_ULTIMATE.start_cstrncmp_~s2.offset_6 1)) (= v_ULTIMATE.start_cstrncmp_~s1.base_9 v_ULTIMATE.start_cstrncmp_~s1.base_10) (not |v_ULTIMATE.start_cstrncmp_#t~short5_9|) (= v_ULTIMATE.start_cstrncmp_~s2.base_7 v_ULTIMATE.start_cstrncmp_~s2.base_6)) InVars {ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_6, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_7, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_10, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_9|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_8} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_5, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_2|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_6, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_2|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_5|, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_2|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_9, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_8|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_2|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_7} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset, ULTIMATE.start_cstrncmp_~s1.offset] 206#L16-8 77.11/51.01 [2019-03-28 12:51:14,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,900 INFO L82 PathProgramCache]: Analyzing trace with hash -1011605018, now seen corresponding path program 5 times 77.11/51.01 [2019-03-28 12:51:14,901 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,901 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,913 INFO L82 PathProgramCache]: Analyzing trace with hash 2000633265, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:14,913 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,913 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,914 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,914 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:14,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:14,921 INFO L82 PathProgramCache]: Analyzing trace with hash -711850666, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:14,921 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:14,921 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:14,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,922 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,922 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:14,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:14,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:14,934 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 77.11/51.01 [2019-03-28 12:51:14,934 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 77.11/51.01 [2019-03-28 12:51:15,045 WARN L188 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 56 77.11/51.01 [2019-03-28 12:51:15,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 77.11/51.01 [2019-03-28 12:51:15,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 77.11/51.01 [2019-03-28 12:51:15,081 INFO L87 Difference]: Start difference. First operand 17 states and 24 transitions. cyclomatic complexity: 8 Second operand 3 states. 77.11/51.01 [2019-03-28 12:51:15,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 77.11/51.01 [2019-03-28 12:51:15,104 INFO L93 Difference]: Finished difference Result 18 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:15,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 77.11/51.01 [2019-03-28 12:51:15,104 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 24 transitions. 77.11/51.01 [2019-03-28 12:51:15,105 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:15,105 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,106 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 77.11/51.01 [2019-03-28 12:51:15,106 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 77.11/51.01 [2019-03-28 12:51:15,106 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,106 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 77.11/51.01 [2019-03-28 12:51:15,106 INFO L706 BuchiCegarLoop]: Abstraction has 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. 77.11/51.01 [2019-03-28 12:51:15,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. 77.11/51.01 [2019-03-28 12:51:15,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,107 INFO L729 BuchiCegarLoop]: Abstraction has 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,108 INFO L609 BuchiCegarLoop]: Abstraction has 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,108 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ 77.11/51.01 [2019-03-28 12:51:15,108 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 23 transitions. 77.11/51.01 [2019-03-28 12:51:15,108 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 10 77.11/51.01 [2019-03-28 12:51:15,108 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 77.11/51.01 [2019-03-28 12:51:15,109 INFO L119 BuchiIsEmpty]: Starting construction of run 77.11/51.01 [2019-03-28 12:51:15,109 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:15,109 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 77.11/51.01 [2019-03-28 12:51:15,110 INFO L794 eck$LassoCheckResult]: Stem: 259#ULTIMATE.startENTRY [210] ULTIMATE.startENTRY-->L32: Formula: (and (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|) (= |v_#valid_23| (store |v_#valid_24| 0 0))) InVars {#valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_6|, ULTIMATE.start_main_#t~nondet12=|v_ULTIMATE.start_main_#t~nondet12_6|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_5|, ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_5|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_5|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_10, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret16=|v_ULTIMATE.start_main_#t~ret16_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, #valid=|v_#valid_23|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_5|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_#t~nondet12, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~length1~0, #NULL.offset, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret16, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc14.offset, ULTIMATE.start_main_~length2~0] 260#L32 [140] L32-->L32-2: Formula: (>= v_ULTIMATE.start_main_~length1~0_6 1) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} OutVars{ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_6} AuxVars[] AssignedVars[] 256#L32-2 [141] L32-2-->L35-1: Formula: (>= v_ULTIMATE.start_main_~length2~0_6 1) InVars {ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} OutVars{ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_6} AuxVars[] AssignedVars[] 257#L35-1 [166] L35-1-->L40: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc13.offset_2| 0) (= |v_ULTIMATE.start_main_#t~malloc14.offset_2| 0) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc13.base_2|)) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc14.offset_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc14.base_2|) (= |v_#valid_3| (store .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2| 1)) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc13.base_2| v_ULTIMATE.start_main_~length1~0_7) |v_ULTIMATE.start_main_#t~malloc14.base_2| v_ULTIMATE.start_main_~length2~0_7)) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc13.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc13.offset_2|) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc14.base_2|)) (< |v_ULTIMATE.start_main_#t~malloc14.base_2| |v_#StackHeapBarrier_1|) (> |v_ULTIMATE.start_main_#t~malloc13.base_2| 0) (< |v_ULTIMATE.start_main_#t~malloc13.base_2| |v_#StackHeapBarrier_1|) (< 0 |v_ULTIMATE.start_main_#t~malloc14.base_2|))) InVars {ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_#t~malloc13.offset=|v_ULTIMATE.start_main_#t~malloc13.offset_2|, ULTIMATE.start_main_#t~malloc13.base=|v_ULTIMATE.start_main_#t~malloc13.base_2|, ULTIMATE.start_main_#t~malloc14.base=|v_ULTIMATE.start_main_#t~malloc14.base_2|, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, #valid=|v_#valid_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_1|, ULTIMATE.start_main_#t~malloc14.offset=|v_ULTIMATE.start_main_#t~malloc14.offset_2|, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc13.offset, ULTIMATE.start_main_#t~malloc13.base, ULTIMATE.start_main_#t~malloc14.base, ULTIMATE.start_main_~nondetString1~0.base, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, ULTIMATE.start_main_#t~malloc14.offset] 254#L40 [94] L40-->L40-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= 1 .cse0) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~length1~0_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0))) (<= .cse0 (select |v_#length_4| v_ULTIMATE.start_main_~nondetString1~0.base_3)))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, ULTIMATE.start_main_~length1~0=v_ULTIMATE.start_main_~length1~0_8, #length=|v_#length_4|} AuxVars[] AssignedVars[#memory_int] 252#L40-1 [211] L40-1-->L13: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (<= 1 .cse0) (= v_ULTIMATE.start_main_~nondetString2~0.base_8 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2| v_ULTIMATE.start_main_~nondetString2~0.offset_7) (= |v_ULTIMATE.start_main_#t~nondet15_5| |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.base_11 |v_ULTIMATE.start_cstrncmp_#in~s2.base_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|) (= (select |v_#valid_25| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_cstrncmp_~n_8 |v_ULTIMATE.start_cstrncmp_#in~n_2|) (= v_ULTIMATE.start_cstrncmp_~s2.offset_9 |v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|) (= v_ULTIMATE.start_cstrncmp_~s1.base_14 |v_ULTIMATE.start_cstrncmp_#in~s1.base_2|) (= |v_ULTIMATE.start_cstrncmp_#in~s1.base_2| v_ULTIMATE.start_main_~nondetString1~0.base_8) (= (store |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_11| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length2~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_10|) (<= .cse0 (select |v_#length_18| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= |v_ULTIMATE.start_cstrncmp_#in~s1.offset_2| v_ULTIMATE.start_cstrncmp_~s1.offset_11))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_18|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11} OutVars{ULTIMATE.start_cstrncmp_#t~mem8=|v_ULTIMATE.start_cstrncmp_#t~mem8_5|, ULTIMATE.start_cstrncmp_#t~mem9=|v_ULTIMATE.start_cstrncmp_#t~mem9_5|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_11, ULTIMATE.start_cstrncmp_#res=|v_ULTIMATE.start_cstrncmp_#res_6|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_6|, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_6|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_14, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_4|, ULTIMATE.start_cstrncmp_#in~s2.offset=|v_ULTIMATE.start_cstrncmp_#in~s2.offset_2|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_5|, ULTIMATE.start_cstrncmp_#t~ite10=|v_ULTIMATE.start_cstrncmp_#t~ite10_6|, #length=|v_#length_18|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_8, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_4|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_11, ULTIMATE.start_main_~length2~0=v_ULTIMATE.start_main_~length2~0_11, ULTIMATE.start_cstrncmp_~uc2~0=v_ULTIMATE.start_cstrncmp_~uc2~0_6, ULTIMATE.start_cstrncmp_#in~n=|v_ULTIMATE.start_cstrncmp_#in~n_2|, ULTIMATE.start_cstrncmp_~uc1~0=v_ULTIMATE.start_cstrncmp_~uc1~0_6, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrncmp_#in~s1.offset=|v_ULTIMATE.start_cstrncmp_#in~s1.offset_2|, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_9, ULTIMATE.start_cstrncmp_#in~s2.base=|v_ULTIMATE.start_cstrncmp_#in~s2.base_2|, ULTIMATE.start_cstrncmp_#in~s1.base=|v_ULTIMATE.start_cstrncmp_#in~s1.base_2|, #valid=|v_#valid_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #memory_int=|v_#memory_int_10|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_6|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_10|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_10|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem8, ULTIMATE.start_cstrncmp_#t~mem9, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#res, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_#in~s2.offset, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~ite10, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.offset, ULTIMATE.start_cstrncmp_~uc2~0, ULTIMATE.start_cstrncmp_#in~n, ULTIMATE.start_cstrncmp_~uc1~0, ULTIMATE.start_cstrncmp_#in~s1.offset, ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#in~s2.base, ULTIMATE.start_cstrncmp_#in~s1.base, #memory_int, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset] 253#L13 [176] L13-->L16-8: Formula: (> v_ULTIMATE.start_cstrncmp_~n_4 0) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} OutVars{ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_4} AuxVars[] AssignedVars[] 249#L16-8 77.11/51.01 [2019-03-28 12:51:15,110 INFO L796 eck$LassoCheckResult]: Loop: 249#L16-8 [178] L16-8-->L16-1: Formula: (and (< 0 |v_ULTIMATE.start_cstrncmp_#t~post0_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_2| (= |v_ULTIMATE.start_cstrncmp_#t~post0_2| v_ULTIMATE.start_cstrncmp_~n_6) (= v_ULTIMATE.start_cstrncmp_~n_5 (+ |v_ULTIMATE.start_cstrncmp_#t~post0_2| (- 1)))) InVars {ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_6} OutVars{ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_2|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_5, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_~n, ULTIMATE.start_cstrncmp_#t~short3] 246#L16-1 [89] L16-1-->L16-2: Formula: |v_ULTIMATE.start_cstrncmp_#t~short3_3| InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} OutVars{ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_3|} AuxVars[] AssignedVars[] 247#L16-2 [108] L16-2-->L16-3: Formula: (and (<= 0 v_ULTIMATE.start_cstrncmp_~s1.offset_3) (= 1 (select |v_#valid_10| v_ULTIMATE.start_cstrncmp_~s1.base_3)) (= |v_ULTIMATE.start_cstrncmp_#t~mem1_2| (select (select |v_#memory_int_5| v_ULTIMATE.start_cstrncmp_~s1.base_3) v_ULTIMATE.start_cstrncmp_~s1.offset_3)) (<= (+ v_ULTIMATE.start_cstrncmp_~s1.offset_3 1) (select |v_#length_8| v_ULTIMATE.start_cstrncmp_~s1.base_3))) InVars {#memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3, #valid=|v_#valid_10|} OutVars{#valid=|v_#valid_10|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_2|, #length=|v_#length_8|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_3, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_3} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem1] 262#L16-3 [103] L16-3-->L16-4: Formula: (and (= |v_ULTIMATE.start_cstrncmp_#t~mem2_2| (select (select |v_#memory_int_6| v_ULTIMATE.start_cstrncmp_~s2.base_3) v_ULTIMATE.start_cstrncmp_~s2.offset_3)) (= 1 (select |v_#valid_12| v_ULTIMATE.start_cstrncmp_~s2.base_3)) (<= 0 v_ULTIMATE.start_cstrncmp_~s2.offset_3) (<= (+ v_ULTIMATE.start_cstrncmp_~s2.offset_3 1) (select |v_#length_10| v_ULTIMATE.start_cstrncmp_~s2.base_3))) InVars {#memory_int=|v_#memory_int_6|, ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, #length=|v_#length_10|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_3, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_3, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_2|, #valid=|v_#valid_12|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2] 261#L16-4 [200] L16-4-->L16-6: Formula: (and |v_ULTIMATE.start_cstrncmp_#t~short3_4| (= |v_ULTIMATE.start_cstrncmp_#t~mem1_3| |v_ULTIMATE.start_cstrncmp_#t~mem2_3|)) InVars {ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|} OutVars{ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_3|, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_4|, ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_3|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~short3] 258#L16-6 [188] L16-6-->L19: Formula: (and (not |v_ULTIMATE.start_cstrncmp_#t~short5_2|) |v_ULTIMATE.start_cstrncmp_#t~short3_9| (> v_ULTIMATE.start_cstrncmp_~n_7 0)) InVars {ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_9|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7} OutVars{ULTIMATE.start_cstrncmp_#t~mem2=|v_ULTIMATE.start_cstrncmp_#t~mem2_5|, ULTIMATE.start_cstrncmp_#t~post0=|v_ULTIMATE.start_cstrncmp_#t~post0_4|, ULTIMATE.start_cstrncmp_#t~mem1=|v_ULTIMATE.start_cstrncmp_#t~mem1_5|, ULTIMATE.start_cstrncmp_~n=v_ULTIMATE.start_cstrncmp_~n_7, ULTIMATE.start_cstrncmp_#t~short3=|v_ULTIMATE.start_cstrncmp_#t~short3_8|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem2, ULTIMATE.start_cstrncmp_#t~post0, ULTIMATE.start_cstrncmp_#t~mem1, ULTIMATE.start_cstrncmp_#t~short3, ULTIMATE.start_cstrncmp_#t~short5] 255#L19 [128] L19-->L19-2: Formula: (not |v_ULTIMATE.start_cstrncmp_#t~short5_4|) InVars {ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_4|} OutVars{ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_4|} AuxVars[] AssignedVars[] 251#L19-2 [119] L19-2-->L19-3: Formula: (and (<= (+ v_ULTIMATE.start_cstrncmp_~s1.offset_5 1) (select |v_#length_12| v_ULTIMATE.start_cstrncmp_~s1.base_6)) (= 1 (select |v_#valid_14| v_ULTIMATE.start_cstrncmp_~s1.base_6)) (= |v_ULTIMATE.start_cstrncmp_#t~mem4_2| (select (select |v_#memory_int_7| v_ULTIMATE.start_cstrncmp_~s1.base_6) v_ULTIMATE.start_cstrncmp_~s1.offset_5)) (<= 0 v_ULTIMATE.start_cstrncmp_~s1.offset_5)) InVars {#memory_int=|v_#memory_int_7|, #length=|v_#length_12|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_6, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_5, #valid=|v_#valid_14|} OutVars{ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_2|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_7|, #length=|v_#length_12|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_6, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_5} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~mem4] 250#L19-3 [208] L19-3-->L19-4: Formula: (and (not |v_ULTIMATE.start_cstrncmp_#t~short5_5|) (< |v_ULTIMATE.start_cstrncmp_#t~mem4_3| 0)) InVars {ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_3|} OutVars{ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_3|, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_5|} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_#t~short5] 248#L19-4 [115] L19-4-->L16-8: Formula: (and (= v_ULTIMATE.start_cstrncmp_~s1.offset_7 (+ v_ULTIMATE.start_cstrncmp_~s1.offset_8 1)) (= v_ULTIMATE.start_cstrncmp_~s2.offset_5 (+ v_ULTIMATE.start_cstrncmp_~s2.offset_6 1)) (= v_ULTIMATE.start_cstrncmp_~s1.base_9 v_ULTIMATE.start_cstrncmp_~s1.base_10) (not |v_ULTIMATE.start_cstrncmp_#t~short5_9|) (= v_ULTIMATE.start_cstrncmp_~s2.base_7 v_ULTIMATE.start_cstrncmp_~s2.base_6)) InVars {ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_6, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_7, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_10, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_9|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_8} OutVars{ULTIMATE.start_cstrncmp_~s2.offset=v_ULTIMATE.start_cstrncmp_~s2.offset_5, ULTIMATE.start_cstrncmp_#t~post7.base=|v_ULTIMATE.start_cstrncmp_#t~post7.base_2|, ULTIMATE.start_cstrncmp_~s2.base=v_ULTIMATE.start_cstrncmp_~s2.base_6, ULTIMATE.start_cstrncmp_#t~post6.offset=|v_ULTIMATE.start_cstrncmp_#t~post6.offset_2|, ULTIMATE.start_cstrncmp_#t~mem4=|v_ULTIMATE.start_cstrncmp_#t~mem4_5|, ULTIMATE.start_cstrncmp_#t~post6.base=|v_ULTIMATE.start_cstrncmp_#t~post6.base_2|, ULTIMATE.start_cstrncmp_~s1.base=v_ULTIMATE.start_cstrncmp_~s1.base_9, ULTIMATE.start_cstrncmp_#t~short5=|v_ULTIMATE.start_cstrncmp_#t~short5_8|, ULTIMATE.start_cstrncmp_#t~post7.offset=|v_ULTIMATE.start_cstrncmp_#t~post7.offset_2|, ULTIMATE.start_cstrncmp_~s1.offset=v_ULTIMATE.start_cstrncmp_~s1.offset_7} AuxVars[] AssignedVars[ULTIMATE.start_cstrncmp_~s2.offset, ULTIMATE.start_cstrncmp_#t~post7.base, ULTIMATE.start_cstrncmp_~s2.base, ULTIMATE.start_cstrncmp_#t~post6.offset, ULTIMATE.start_cstrncmp_#t~mem4, ULTIMATE.start_cstrncmp_#t~post6.base, ULTIMATE.start_cstrncmp_~s1.base, ULTIMATE.start_cstrncmp_#t~short5, ULTIMATE.start_cstrncmp_#t~post7.offset, ULTIMATE.start_cstrncmp_~s1.offset] 249#L16-8 77.11/51.01 [2019-03-28 12:51:15,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:15,111 INFO L82 PathProgramCache]: Analyzing trace with hash -1011605017, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:15,111 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:15,111 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:15,111 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,112 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,112 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:15,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:15,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:15,122 INFO L82 PathProgramCache]: Analyzing trace with hash 2000633265, now seen corresponding path program 2 times 77.11/51.01 [2019-03-28 12:51:15,122 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:15,122 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:15,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:15,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:15,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:15,130 INFO L82 PathProgramCache]: Analyzing trace with hash 1786165271, now seen corresponding path program 1 times 77.11/51.01 [2019-03-28 12:51:15,130 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 77.11/51.01 [2019-03-28 12:51:15,130 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 77.11/51.01 [2019-03-28 12:51:15,131 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,131 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,131 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 77.11/51.01 [2019-03-28 12:51:15,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:15,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 77.11/51.01 [2019-03-28 12:51:15,283 WARN L188 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 56 77.11/51.01 [2019-03-28 12:51:15,599 WARN L188 SmtUtils]: Spent 279.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 84 77.11/51.01 [2019-03-28 12:51:15,739 WARN L188 SmtUtils]: Spent 138.00 ms on a formula simplification that was a NOOP. DAG size: 80 77.11/51.01 [2019-03-28 12:51:15,755 INFO L216 LassoAnalysis]: Preferences: 77.11/51.01 [2019-03-28 12:51:15,757 INFO L124 ssoRankerPreferences]: Compute integeral hull: false 77.11/51.01 [2019-03-28 12:51:15,757 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true 77.11/51.01 [2019-03-28 12:51:15,757 INFO L126 ssoRankerPreferences]: Term annotations enabled: false 77.11/51.01 [2019-03-28 12:51:15,757 INFO L127 ssoRankerPreferences]: Use exernal solver: false 77.11/51.01 [2019-03-28 12:51:15,757 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 77.11/51.01 [2019-03-28 12:51:15,758 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false 77.11/51.01 [2019-03-28 12:51:15,758 INFO L130 ssoRankerPreferences]: Path of dumped script: 77.11/51.01 [2019-03-28 12:51:15,758 INFO L131 ssoRankerPreferences]: Filename of dumped script: theBenchmark.c_BEv2_Iteration6_Lasso 77.11/51.01 [2019-03-28 12:51:15,758 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank 77.11/51.01 [2019-03-28 12:51:15,758 INFO L282 LassoAnalysis]: Starting lasso preprocessing... 77.11/51.01 [2019-03-28 12:51:15,776 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,782 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,784 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,786 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,789 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,791 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,794 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,796 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,798 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,800 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,803 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,805 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:15,807 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,101 WARN L188 SmtUtils]: Spent 181.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 65 77.11/51.01 [2019-03-28 12:51:16,233 WARN L188 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 55 77.11/51.01 [2019-03-28 12:51:16,234 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,235 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,237 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,238 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,239 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,241 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,242 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,244 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,245 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,254 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,256 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 77.11/51.01 [2019-03-28 12:51:16,698 INFO L300 LassoAnalysis]: Preprocessing complete. 77.11/51.01 [2019-03-28 12:51:16,704 INFO L497 LassoAnalysis]: Using template 'affine'. 77.11/51.01 [2019-03-28 12:51:16,706 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,708 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,708 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,709 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,709 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,709 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,711 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,711 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,713 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,713 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,715 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,715 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,715 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,716 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,716 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,716 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,716 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,717 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,717 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,718 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,718 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,718 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,718 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,719 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,719 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,719 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,720 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,720 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,720 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,721 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,721 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,721 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,723 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,723 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,725 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,726 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,726 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,726 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,726 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,726 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,727 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,727 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,727 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,728 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,728 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,728 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,728 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,729 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,729 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,729 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,729 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,729 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,730 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,730 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,731 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,731 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,731 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,731 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,731 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,732 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,732 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,732 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,733 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,733 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,733 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,733 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,733 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,734 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,734 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,734 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,735 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,735 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,735 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,735 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,736 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,736 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,736 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,736 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,736 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,737 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,737 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,738 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,738 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,738 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,738 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,739 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,740 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,741 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,742 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,742 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,742 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,742 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,742 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,743 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,743 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,743 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,744 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,744 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,744 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,744 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,745 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,745 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,745 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,745 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,745 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,746 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,746 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,746 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,747 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 77.11/51.01 [2019-03-28 12:51:16,747 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,747 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,747 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,748 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,748 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,749 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,749 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,750 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,750 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,750 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,750 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,751 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,752 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,753 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,753 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,754 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,754 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,754 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,754 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,755 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,755 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,757 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,757 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,757 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,758 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,758 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,758 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,760 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,760 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,765 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 77.11/51.01 [2019-03-28 12:51:16,765 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 77.11/51.01 Termination analysis: LINEAR_WITH_GUESSES 77.11/51.01 Number of strict supporting invariants: 0 77.11/51.01 Number of non-strict supporting invariants: 1 77.11/51.01 Consider only non-deceasing supporting invariants: true 77.11/51.01 Simplify termination arguments: true 77.11/51.01 Simplify supporting invariants: trueOverapproximate stem: false 77.11/51.01 [2019-03-28 12:51:16,766 INFO L339 nArgumentSynthesizer]: Template has degree 0. 77.11/51.01 [2019-03-28 12:51:16,766 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 77.11/51.01 [2019-03-28 12:51:16,766 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 77.11/51.01 [2019-03-28 12:51:16,766 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 77.11/51.01 [2019-03-28 12:51:16,772 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 77.11/51.01 [2019-03-28 12:51:16,772 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 77.11/51.01 [2019-03-28 12:51:16,803 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. 77.11/51.01 [2019-03-28 12:51:16,833 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. 77.11/51.01 [2019-03-28 12:51:16,833 INFO L444 ModelExtractionUtils]: 38 out of 46 variables were initially zero. Simplification set additionally 5 variables to zero. 77.11/51.01 [2019-03-28 12:51:16,836 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... 77.11/51.01 [2019-03-28 12:51:16,837 INFO L440 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. 77.11/51.01 [2019-03-28 12:51:16,838 INFO L518 LassoAnalysis]: Proved termination. 77.11/51.01 [2019-03-28 12:51:16,838 INFO L520 LassoAnalysis]: Termination argument consisting of: 77.11/51.01 Ranking function f(ULTIMATE.start_cstrncmp_~s2.offset, v_rep(select #length ULTIMATE.start_main_#t~malloc14.base)_1) = -1*ULTIMATE.start_cstrncmp_~s2.offset + 1*v_rep(select #length ULTIMATE.start_main_#t~malloc14.base)_1 77.11/51.01 Supporting invariants [] 77.11/51.01 [2019-03-28 12:51:16,889 INFO L297 tatePredicateManager]: 15 out of 16 supporting invariants were superfluous and have been removed 77.11/51.01 [2019-03-28 12:51:16,893 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:16,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 77.11/51.01 [2019-03-28 12:51:16,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:16,937 INFO L256 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 8 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:16,938 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:16,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:16,965 INFO L256 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:16,965 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:16,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 77.11/51.01 [2019-03-28 12:51:17,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:17,030 INFO L256 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:17,031 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:17,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:17,084 INFO L256 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:17,085 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:17,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 77.11/51.01 [2019-03-28 12:51:17,120 INFO L256 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjunts are in the unsatisfiable core 77.11/51.01 [2019-03-28 12:51:17,121 INFO L279 TraceCheckSpWp]: Computing forward predicates... 77.11/51.01 [2019-03-28 12:51:17,142 INFO L98 LoopCannibalizer]: 3 predicates before loop cannibalization 5 predicates after loop cannibalization 77.11/51.01 [2019-03-28 12:51:17,147 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.3 stem predicates 5 loop predicates 77.11/51.01 [2019-03-28 12:51:17,148 INFO L69 BuchiDifferenceNCSB]: Start buchiDifferenceNCSB. First operand 17 states and 23 transitions. cyclomatic complexity: 7 Second operand 6 states. 77.11/51.01 [2019-03-28 12:51:17,298 INFO L73 BuchiDifferenceNCSB]: Finished buchiDifferenceNCSB. First operand 17 states and 23 transitions. cyclomatic complexity: 7. Second operand 6 states. Result 27 states and 35 transitions. Complement of second has 8 states. 77.11/51.01 [2019-03-28 12:51:17,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 3 stem states 2 non-accepting loop states 1 accepting loop states 77.11/51.01 [2019-03-28 12:51:17,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. 77.11/51.01 [2019-03-28 12:51:17,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 35 transitions. 77.11/51.01 [2019-03-28 12:51:17,301 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 35 transitions. Stem has 7 letters. Loop has 10 letters. 77.11/51.01 [2019-03-28 12:51:17,301 INFO L116 BuchiAccepts]: Finished buchiAccepts. 77.11/51.01 [2019-03-28 12:51:17,302 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 35 transitions. Stem has 17 letters. Loop has 10 letters. 77.11/51.01 [2019-03-28 12:51:17,302 INFO L116 BuchiAccepts]: Finished buchiAccepts. 77.11/51.01 [2019-03-28 12:51:17,302 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 35 transitions. Stem has 7 letters. Loop has 20 letters. 77.11/51.01 [2019-03-28 12:51:17,302 INFO L116 BuchiAccepts]: Finished buchiAccepts. 77.11/51.01 [2019-03-28 12:51:17,312 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 35 transitions. 77.11/51.01 [2019-03-28 12:51:17,313 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 77.11/51.01 [2019-03-28 12:51:17,313 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:17,313 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 77.11/51.01 [2019-03-28 12:51:17,313 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 77.11/51.01 [2019-03-28 12:51:17,313 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:17,313 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 77.11/51.01 [2019-03-28 12:51:17,313 INFO L706 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:17,314 INFO L729 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:17,314 INFO L609 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:17,314 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ 77.11/51.01 [2019-03-28 12:51:17,314 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. 77.11/51.01 [2019-03-28 12:51:17,314 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 77.11/51.01 [2019-03-28 12:51:17,314 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true 77.11/51.01 [2019-03-28 12:51:17,320 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:51:17 BasicIcfg 77.11/51.01 [2019-03-28 12:51:17,321 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- 77.11/51.01 [2019-03-28 12:51:17,321 INFO L168 Benchmark]: Toolchain (without parser) took 46650.51 ms. Allocated memory was 649.6 MB in the beginning and 940.0 MB in the end (delta: 290.5 MB). Free memory was 559.5 MB in the beginning and 611.4 MB in the end (delta: -51.9 MB). Peak memory consumption was 238.5 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,322 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 649.6 MB. Free memory is still 580.0 MB. There was no memory consumed. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,322 INFO L168 Benchmark]: CACSL2BoogieTranslator took 324.87 ms. Allocated memory was 649.6 MB in the beginning and 666.4 MB in the end (delta: 16.8 MB). Free memory was 559.5 MB in the beginning and 630.8 MB in the end (delta: -71.3 MB). Peak memory consumption was 31.1 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,323 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.24 ms. Allocated memory is still 666.4 MB. Free memory was 630.8 MB in the beginning and 628.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,323 INFO L168 Benchmark]: Boogie Preprocessor took 27.44 ms. Allocated memory is still 666.4 MB. Free memory was 628.1 MB in the beginning and 626.7 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,324 INFO L168 Benchmark]: RCFGBuilder took 343.57 ms. Allocated memory is still 666.4 MB. Free memory was 626.7 MB in the beginning and 601.9 MB in the end (delta: 24.9 MB). Peak memory consumption was 24.9 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,324 INFO L168 Benchmark]: BlockEncodingV2 took 137.92 ms. Allocated memory is still 666.4 MB. Free memory was 601.9 MB in the beginning and 592.5 MB in the end (delta: 9.4 MB). Peak memory consumption was 9.4 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,324 INFO L168 Benchmark]: TraceAbstraction took 42979.88 ms. Allocated memory was 666.4 MB in the beginning and 911.2 MB in the end (delta: 244.8 MB). Free memory was 591.1 MB in the beginning and 639.4 MB in the end (delta: -48.3 MB). Peak memory consumption was 470.1 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,325 INFO L168 Benchmark]: BuchiAutomizer took 2789.18 ms. Allocated memory was 911.2 MB in the beginning and 940.0 MB in the end (delta: 28.8 MB). Free memory was 639.4 MB in the beginning and 611.4 MB in the end (delta: 28.0 MB). Peak memory consumption was 56.8 MB. Max. memory is 50.3 GB. 77.11/51.01 [2019-03-28 12:51:17,329 INFO L337 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### 77.11/51.01 --- Results --- 77.11/51.01 * Results from de.uni_freiburg.informatik.ultimate.plugins.blockencoding: 77.11/51.01 - StatisticsResult: Initial Icfg 77.11/51.01 43 locations, 51 edges 77.11/51.01 - StatisticsResult: Encoded RCFG 77.11/51.01 33 locations, 62 edges 77.11/51.01 * Results from de.uni_freiburg.informatik.ultimate.core: 77.11/51.01 - StatisticsResult: Toolchain Benchmarks 77.11/51.01 Benchmark results are: 77.11/51.01 * CDTParser took 0.17 ms. Allocated memory is still 649.6 MB. Free memory is still 580.0 MB. There was no memory consumed. Max. memory is 50.3 GB. 77.11/51.01 * CACSL2BoogieTranslator took 324.87 ms. Allocated memory was 649.6 MB in the beginning and 666.4 MB in the end (delta: 16.8 MB). Free memory was 559.5 MB in the beginning and 630.8 MB in the end (delta: -71.3 MB). Peak memory consumption was 31.1 MB. Max. memory is 50.3 GB. 77.11/51.01 * Boogie Procedure Inliner took 42.24 ms. Allocated memory is still 666.4 MB. Free memory was 630.8 MB in the beginning and 628.1 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 50.3 GB. 77.11/51.01 * Boogie Preprocessor took 27.44 ms. Allocated memory is still 666.4 MB. Free memory was 628.1 MB in the beginning and 626.7 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 50.3 GB. 77.11/51.01 * RCFGBuilder took 343.57 ms. Allocated memory is still 666.4 MB. Free memory was 626.7 MB in the beginning and 601.9 MB in the end (delta: 24.9 MB). Peak memory consumption was 24.9 MB. Max. memory is 50.3 GB. 77.11/51.01 * BlockEncodingV2 took 137.92 ms. Allocated memory is still 666.4 MB. Free memory was 601.9 MB in the beginning and 592.5 MB in the end (delta: 9.4 MB). Peak memory consumption was 9.4 MB. Max. memory is 50.3 GB. 77.11/51.01 * TraceAbstraction took 42979.88 ms. Allocated memory was 666.4 MB in the beginning and 911.2 MB in the end (delta: 244.8 MB). Free memory was 591.1 MB in the beginning and 639.4 MB in the end (delta: -48.3 MB). Peak memory consumption was 470.1 MB. Max. memory is 50.3 GB. 77.11/51.01 * BuchiAutomizer took 2789.18 ms. Allocated memory was 911.2 MB in the beginning and 940.0 MB in the end (delta: 28.8 MB). Free memory was 639.4 MB in the beginning and 611.4 MB in the end (delta: 28.0 MB). Peak memory consumption was 56.8 MB. Max. memory is 50.3 GB. 77.11/51.01 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #memory_int 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 - GenericResult: Unfinished Backtranslation 77.11/51.01 unknown boogie variable #length 77.11/51.01 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: 77.11/51.01 - PositiveResult [Line: 16]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 16]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 41]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 25]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 41]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 25]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 40]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 24]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 40]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 24]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 19]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 19]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 16]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - PositiveResult [Line: 16]: pointer dereference always succeeds 77.11/51.01 For all program executions holds that pointer dereference always succeeds at this location 77.11/51.01 - AllSpecificationsHoldResult: All specifications hold 77.11/51.01 14 specifications checked. All of them hold 77.11/51.01 - InvariantResult [Line: 16]: Loop Invariant 77.11/51.01 [2019-03-28 12:51:17,340 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,341 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,341 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,341 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,341 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,341 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,342 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,342 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,342 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,342 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,343 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,343 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,343 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,343 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,344 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,344 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,344 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,344 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,345 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,345 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,345 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,345 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,346 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,346 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,346 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,346 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,347 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,347 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,347 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,347 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,348 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,348 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,348 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,348 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,351 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,352 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,352 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,352 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,352 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,353 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,353 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,353 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,353 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,354 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,354 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,354 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,354 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,354 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,355 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,355 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,355 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,355 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,356 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,356 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,356 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,356 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,357 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,357 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,357 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,357 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,357 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,358 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,358 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,358 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,358 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,359 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 [2019-03-28 12:51:17,359 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 77.11/51.01 [2019-03-28 12:51:17,359 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 77.11/51.01 Derived loop invariant: ((((((((((((((((1 == length2 + nondetString2 && 0 == s2) && length1 == unknown-#length-unknown[nondetString1]) && 1 == \valid[s2]) && unknown-#memory_int-unknown[s2][s2] == 0) && unknown-#length-unknown[nondetString2] == length2) && 0 == s1) && 1 <= unknown-#length-unknown[s2]) && 1 <= length1) && 1 == \valid[nondetString1]) && 1 <= unknown-#length-unknown[s1]) && nondetString1 == 0) && nondetString2 == 0) && 1 == \valid[s1]) && 1 == \valid[nondetString2]) || (((((0 == unknown-#memory_int-unknown[nondetString2 := unknown-#memory_int-unknown[nondetString2][length2 + nondetString2 + -1 := 0]][nondetString1][nondetString1 + unknown-#length-unknown[nondetString1] + -1] && !(nondetString1 == nondetString2)) && (((((((((((0 == s2 && length1 == unknown-#length-unknown[nondetString1]) && 1 == \valid[s2]) && unknown-#length-unknown[nondetString2] == length2) && 1 <= length2) && 1 <= unknown-#length-unknown[s2]) && 1 <= length1) && 1 == \valid[nondetString1]) && 1 <= unknown-#length-unknown[s1]) && nondetString1 == 0) && nondetString2 == 0) && 1 == \valid[s1]) && 1 == \valid[nondetString2]) && unknown-#memory_int-unknown[s1][unknown-#length-unknown[s1] + -1] == 0) && 0 == s1) && 0 == unknown-#memory_int-unknown[s2][unknown-#length-unknown[s2] + -1])) || ((((((((((((((((0 == unknown-#memory_int-unknown[s1][s1] && 0 == s2) && length1 == unknown-#length-unknown[nondetString1]) && 1 == \valid[s2]) && !(nondetString1 == nondetString2)) && unknown-#length-unknown[nondetString2] == length2) && 0 == unknown-#memory_int-unknown[nondetString2 := unknown-#memory_int-unknown[nondetString2][length2 + nondetString2 + -1 := 0]][nondetString1][nondetString1]) && 1 <= length2) && 0 == s1) && 1 <= unknown-#length-unknown[s2]) && 1 == length1) && 1 == \valid[nondetString1]) && 1 <= unknown-#length-unknown[s1]) && nondetString1 == 0) && nondetString2 == 0) && 1 == \valid[s1]) && 1 == \valid[nondetString2])) || ((s2 + 1 <= unknown-#length-unknown[s2] && (((((((0 == unknown-#memory_int-unknown[nondetString2 := unknown-#memory_int-unknown[nondetString2][length2 + nondetString2 + -1 := 0]][nondetString1][nondetString1 + unknown-#length-unknown[nondetString1] + -1] && nondetString1 == 0) && (((((((1 <= n && length1 == unknown-#length-unknown[nondetString1]) && 1 == \valid[s2]) && 1 <= length2) && 1 <= length1) && 1 == \valid[nondetString1]) && 1 == \valid[s1]) && 1 <= s1) && 1 == \valid[nondetString2]) && !(nondetString1 == nondetString2)) && nondetString2 == 0) && s1 + 1 <= unknown-#length-unknown[s1]) && unknown-#length-unknown[nondetString2] == length2) && unknown-#memory_int-unknown[s1][unknown-#length-unknown[s1] + -1] == 0) && 1 <= s2) && 0 == unknown-#memory_int-unknown[s2][unknown-#length-unknown[s2] + -1]) 77.11/51.01 - StatisticsResult: Ultimate Automizer benchmark data 77.11/51.01 CFG has 1 procedures, 33 locations, 14 error locations. SAFE Result, 42.8s OverallTime, 27 OverallIterations, 4 TraceHistogramMax, 25.9s AutomataDifference, 0.0s DeadEndRemovalTime, 6.3s HoareAnnotationTime, HoareTripleCheckerStatistics: 259 SDtfs, 2212 SDslu, 1228 SDs, 0 SdLazy, 2819 SolverSat, 259 SolverUnsat, 3 SolverUnknown, 0 SolverNotchecked, 19.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 456 GetRequests, 217 SyntacticMatches, 2 SemanticMatches, 237 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1154 ImplicationChecksByTransitivity, 12.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=84occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 27 MinimizatonAttempts, 147 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 1 LocationsWithAnnotation, 1 PreInvPairs, 7 NumberOfFragments, 384 HoareAnnotationTreeSize, 1 FomulaSimplifications, 2488 FormulaSimplificationTreeSizeReduction, 0.1s HoareSimplificationTime, 1 FomulaSimplificationsInter, 2434 FormulaSimplificationTreeSizeReductionInter, 6.1s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 9.2s InterpolantComputationTime, 667 NumberOfCodeBlocks, 667 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 632 ConstructedInterpolants, 70 QuantifiedInterpolants, 207725 SizeOfPredicates, 76 NumberOfNonLiveVariables, 1190 ConjunctsInSsa, 152 ConjunctsInUnsatCore, 35 InterpolantComputations, 21 PerfectInterpolantSequences, 114/277 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available 77.11/51.01 - StatisticsResult: Constructed decomposition of program 77.11/51.01 Your program was decomposed into 6 terminating modules (5 trivial, 0 deterministic, 1 nondeterministic). One nondeterministic module has affine ranking function -1 * s2 + unknown-#length-unknown[alloca(length2 * sizeof(char))] and consists of 6 locations. 5 modules have a trivial ranking function, the largest among these consists of 3 locations. 77.11/51.01 - StatisticsResult: Timing statistics 77.11/51.01 BüchiAutomizer plugin needed 2.7s and 7 iterations. TraceHistogramMax:1. Analysis of lassos took 2.0s. Construction of modules took 0.2s. Büchi inclusion checks took 0.4s. Highest rank in rank-based complementation 3. Minimization of det autom 6. Minimization of nondet autom 0. Automata minimization 0.0s AutomataMinimizationTime, 5 MinimizatonAttempts, 2 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 18 states and ocurred in iteration 3. Nontrivial modules had stage [1, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 68 SDtfs, 89 SDslu, 142 SDs, 0 SdLazy, 266 SolverSat, 24 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.2s Time LassoAnalysisResults: nont0 unkn0 SFLI4 SFLT0 conc1 concLT0 SILN0 SILU0 SILI0 SILT0 lasso1 LassoPreprocessingBenchmarks: Lassos: inital227 mio100 ax100 hnf100 lsp89 ukn85 mio100 lsp46 div100 bol100 ite100 ukn100 eq195 hnf88 smp100 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 5ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s 77.11/51.01 - TerminationAnalysisResult: Termination proven 77.11/51.01 Buchi Automizer proved that your program is terminating 77.11/51.01 RESULT: Ultimate proved your program to be correct! 77.11/51.01 !SESSION 2019-03-28 12:50:27.436 ----------------------------------------------- 77.11/51.01 eclipse.buildId=unknown 77.11/51.01 java.version=1.8.0_181 77.11/51.01 java.vendor=Oracle Corporation 77.11/51.01 BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US 77.11/51.01 Framework arguments: -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -i /export/starexec/sandbox/benchmark/theBenchmark.c 77.11/51.01 Command-line arguments: -os linux -ws gtk -arch x86_64 -consoleLog -data @user.home/.ultimate -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -data /export/starexec/sandbox/tmp -i /export/starexec/sandbox/benchmark/theBenchmark.c 77.11/51.01 77.11/51.01 !ENTRY org.eclipse.core.resources 2 10035 2019-03-28 12:51:17.587 77.11/51.01 !MESSAGE The workspace will exit with unsaved changes in this session. 77.11/51.01 Received shutdown request... 77.11/51.01 Ultimate: 77.11/51.01 GTK+ Version Check 77.11/51.01 EOF