27.53/9.26 YES 28.10/9.27 proof of /export/starexec/sandbox/benchmark/theBenchmark.c 28.10/9.27 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 28.10/9.27 28.10/9.27 28.10/9.27 Termination of the given C Problem could be proven: 28.10/9.27 28.10/9.27 (0) C Problem 28.10/9.27 (1) CToLLVMProof [EQUIVALENT, 173 ms] 28.10/9.27 (2) LLVM problem 28.10/9.27 (3) LLVMToTerminationGraphProof [EQUIVALENT, 6140 ms] 28.10/9.27 (4) LLVM Symbolic Execution Graph 28.10/9.27 (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] 28.10/9.27 (6) LLVM Symbolic Execution SCC 28.10/9.27 (7) SCC2IRS [SOUND, 125 ms] 28.10/9.27 (8) IntTRS 28.10/9.27 (9) IntTRSCompressionProof [EQUIVALENT, 0 ms] 28.10/9.27 (10) IntTRS 28.10/9.27 (11) RankingReductionPairProof [EQUIVALENT, 29 ms] 28.10/9.27 (12) YES 28.10/9.27 28.10/9.27 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (0) 28.10/9.27 Obligation: 28.10/9.27 c file /export/starexec/sandbox/benchmark/theBenchmark.c 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (1) CToLLVMProof (EQUIVALENT) 28.10/9.27 Compiled c-file /export/starexec/sandbox/benchmark/theBenchmark.c to LLVM. 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (2) 28.10/9.27 Obligation: 28.10/9.27 LLVM Problem 28.10/9.27 28.10/9.27 Aliases: 28.10/9.27 28.10/9.27 Data layout: 28.10/9.27 28.10/9.27 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 28.10/9.27 28.10/9.27 Machine: 28.10/9.27 28.10/9.27 "x86_64-pc-linux-gnu" 28.10/9.27 28.10/9.27 Type definitions: 28.10/9.27 28.10/9.27 Global variables: 28.10/9.27 28.10/9.27 Function declarations and definitions: 28.10/9.27 28.10/9.27 *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 28.10/9.27 *BasicFunctionTypename: "test_fun" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (x i32, y i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc 28.10/9.27 0: 28.10/9.27 %1 = alloca i32, align 4 28.10/9.27 %2 = alloca i32, align 4 28.10/9.27 %x_ref = alloca *i32, align 8 28.10/9.27 %y_ref = alloca *i32, align 8 28.10/9.27 %c = alloca *i32, align 8 28.10/9.27 store %x, %1 28.10/9.27 store %y, %2 28.10/9.27 %3 = alloca i8, numElementsLit: 4 28.10/9.27 %4 = bitcast *i8 %3 to *i32 28.10/9.27 store %4, %x_ref 28.10/9.27 %5 = alloca i8, numElementsLit: 4 28.10/9.27 %6 = bitcast *i8 %5 to *i32 28.10/9.27 store %6, %y_ref 28.10/9.27 %7 = alloca i8, numElementsLit: 4 28.10/9.27 %8 = bitcast *i8 %7 to *i32 28.10/9.27 store %8, %c 28.10/9.27 %9 = load %1 28.10/9.27 %10 = load %x_ref 28.10/9.27 store %9, %10 28.10/9.27 %11 = load %2 28.10/9.27 %12 = load %y_ref 28.10/9.27 store %11, %12 28.10/9.27 %13 = load %c 28.10/9.27 store 0, %13 28.10/9.27 br %14 28.10/9.27 14: 28.10/9.27 %15 = load %x_ref 28.10/9.27 %16 = load %15 28.10/9.27 %17 = icmp sgt %16 0 28.10/9.27 br %17, %18, %22 28.10/9.27 18: 28.10/9.27 %19 = load %y_ref 28.10/9.27 %20 = load %19 28.10/9.27 %21 = icmp sgt %20 0 28.10/9.27 br %22 28.10/9.27 22: 28.10/9.27 %23 = phi [0, %14], [%21, %18] 28.10/9.27 br %23, %24, %37 28.10/9.27 24: 28.10/9.27 %25 = load %x_ref 28.10/9.27 %26 = load %25 28.10/9.27 %27 = sub %26 1 28.10/9.27 %28 = load %x_ref 28.10/9.27 store %27, %28 28.10/9.27 %29 = load %y_ref 28.10/9.27 %30 = load %29 28.10/9.27 %31 = sub %30 1 28.10/9.27 %32 = load %y_ref 28.10/9.27 store %31, %32 28.10/9.27 %33 = load %c 28.10/9.27 %34 = load %33 28.10/9.27 %35 = add %34 1 28.10/9.27 %36 = load %c 28.10/9.27 store %35, %36 28.10/9.27 br %14 28.10/9.27 37: 28.10/9.27 %38 = load %c 28.10/9.27 %39 = load %38 28.10/9.27 ret %39 28.10/9.27 28.10/9.27 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 28.10/9.27 0: 28.10/9.27 %1 = alloca i32, align 4 28.10/9.27 store 0, %1 28.10/9.27 %2 = call i32 @__VERIFIER_nondet_int() 28.10/9.27 %3 = call i32 @__VERIFIER_nondet_int() 28.10/9.27 %4 = call i32 @test_fun(i32 %2, i32 %3) 28.10/9.27 ret %4 28.10/9.27 28.10/9.27 28.10/9.27 Analyze Termination of all function calls matching the pattern: 28.10/9.27 main() 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (3) LLVMToTerminationGraphProof (EQUIVALENT) 28.10/9.27 Constructed symbolic execution graph for LLVM program and proved memory safety. 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (4) 28.10/9.27 Obligation: 28.10/9.27 SE Graph 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (5) SymbolicExecutionGraphToSCCProof (SOUND) 28.10/9.27 Splitted symbolic execution graph to 1 SCC. 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (6) 28.10/9.27 Obligation: 28.10/9.27 SCC 28.10/9.27 ---------------------------------------- 28.10/9.27 28.10/9.27 (7) SCC2IRS (SOUND) 28.10/9.27 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 28.10/9.27 Generated rules. Obtained 28 rulesP rules: 28.10/9.27 f_508(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v639, 1, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) -> f_509(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) :|: 0 = 0 28.10/9.27 f_509(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) -> f_510(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 < v642 && 2 <= v639 && 2 <= v629 28.10/9.27 f_510(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_512(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_512(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_514(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE 28.10/9.27 f_514(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_516(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_516(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v641, v639, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_518(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_518(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_520(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 < v643 && 2 <= v641 && 2 <= v630 28.10/9.27 f_520(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_523(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_523(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_526(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_526(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_528(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE 28.10/9.27 f_528(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_530(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_530(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v639, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_532(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_532(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_534(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 1 + v725 = v642 && 0 <= v725 28.10/9.27 f_534(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_536(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_536(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_537(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE 28.10/9.27 f_537(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_538(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_538(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v641, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_539(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_539(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_540(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 1 + v727 = v643 && 0 <= v727 28.10/9.27 f_540(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_541(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_541(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_542(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE 28.10/9.27 f_542(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_543(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_543(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_544(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_544(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_545(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: v729 = 1 + v645 && 2 <= v729 28.10/9.27 f_545(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_546(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: 0 = 0 28.10/9.27 f_546(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_547(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE 28.10/9.27 f_547(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_548(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) :|: TRUE 28.10/9.27 f_548(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 2, 4, 8) -> f_507(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v642, 1, v643, v725, v727, v645, v729, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) :|: TRUE 28.10/9.27 f_507(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v639, 1, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) -> f_508(v629, v630, v631, v632, v633, v634, v635, v636, v637, v638, v639, 1, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, v653, v654, v655, 0, 3, 7, 4, 8) :|: 0 = 0 28.10/9.28 Combined rules. Obtained 1 rulesP rules: 28.10/9.28 f_508(v629:0, v630:0, v631:0, v632:0, v633:0, v634:0, v635:0, v636:0, v637:0, v638:0, v639:0, 1, v641:0, 1 + v725:0, 1 + v727:0, v644:0, v645:0, v646:0, v647:0, v648:0, v649:0, v650:0, v651:0, v652:0, v653:0, v654:0, v655:0, 0, 3, 7, 4, 8) -> f_508(v629:0, v630:0, v631:0, v632:0, v633:0, v634:0, v635:0, v636:0, v637:0, v638:0, 1 + v725:0, 1, 1 + v727:0, v725:0, v727:0, v645:0, 1 + v645:0, v646:0, v647:0, v648:0, v649:0, v650:0, v651:0, v652:0, v653:0, v654:0, v655:0, 0, 3, 7, 4, 8) :|: v639:0 > 1 && v725:0 > -1 && v629:0 > 1 && v641:0 > 1 && v727:0 > -1 && v630:0 > 1 && v645:0 > 0 28.10/9.28 Filtered unneeded arguments: 28.10/9.28 f_508(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32) -> f_508(x1, x2, x11, x13, x14, x15, x17) 28.10/9.28 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 28.10/9.28 f_508(v629:0, v630:0, v639:0, v641:0, sum~cons_1~v725:0, sum~cons_1~v727:0, v645:0) -> f_508(v629:0, v630:0, 1 + v725:0, 1 + v727:0, v725:0, v727:0, 1 + v645:0) :|: v725:0 > -1 && v639:0 > 1 && v629:0 > 1 && v641:0 > 1 && v727:0 > -1 && v645:0 > 0 && v630:0 > 1 && sum~cons_1~v725:0 = 1 + v725:0 && sum~cons_1~v727:0 = 1 + v727:0 28.10/9.28 28.10/9.28 ---------------------------------------- 28.10/9.28 28.10/9.28 (8) 28.10/9.28 Obligation: 28.10/9.28 Rules: 28.10/9.28 f_508(v629:0, v630:0, v639:0, v641:0, sum~cons_1~v725:0, sum~cons_1~v727:0, v645:0) -> f_508(v629:0, v630:0, 1 + v725:0, 1 + v727:0, v725:0, v727:0, 1 + v645:0) :|: v725:0 > -1 && v639:0 > 1 && v629:0 > 1 && v641:0 > 1 && v727:0 > -1 && v645:0 > 0 && v630:0 > 1 && sum~cons_1~v725:0 = 1 + v725:0 && sum~cons_1~v727:0 = 1 + v727:0 28.10/9.28 28.10/9.28 ---------------------------------------- 28.10/9.28 28.10/9.28 (9) IntTRSCompressionProof (EQUIVALENT) 28.10/9.28 Compressed rules. 28.10/9.28 ---------------------------------------- 28.10/9.28 28.10/9.28 (10) 28.10/9.28 Obligation: 28.10/9.28 Rules: 28.10/9.28 f_508(v629:0:0, v630:0:0, v639:0:0, v641:0:0, sum~cons_1~v725:0:0, sum~cons_1~v727:0:0, v645:0:0) -> f_508(v629:0:0, v630:0:0, 1 + v725:0:0, 1 + v727:0:0, v725:0:0, v727:0:0, 1 + v645:0:0) :|: v645:0:0 > 0 && v630:0:0 > 1 && v727:0:0 > -1 && v641:0:0 > 1 && v629:0:0 > 1 && v639:0:0 > 1 && v725:0:0 > -1 && sum~cons_1~v725:0:0 = 1 + v725:0:0 && sum~cons_1~v727:0:0 = 1 + v727:0:0 28.10/9.28 28.10/9.28 ---------------------------------------- 28.10/9.28 28.10/9.28 (11) RankingReductionPairProof (EQUIVALENT) 28.10/9.28 Interpretation: 28.10/9.28 [ f_508 ] = f_508_6 28.10/9.28 28.10/9.28 The following rules are decreasing: 28.10/9.28 f_508(v629:0:0, v630:0:0, v639:0:0, v641:0:0, sum~cons_1~v725:0:0, sum~cons_1~v727:0:0, v645:0:0) -> f_508(v629:0:0, v630:0:0, 1 + v725:0:0, 1 + v727:0:0, v725:0:0, v727:0:0, 1 + v645:0:0) :|: v645:0:0 > 0 && v630:0:0 > 1 && v727:0:0 > -1 && v641:0:0 > 1 && v629:0:0 > 1 && v639:0:0 > 1 && v725:0:0 > -1 && sum~cons_1~v725:0:0 = 1 + v725:0:0 && sum~cons_1~v727:0:0 = 1 + v727:0:0 28.10/9.28 28.10/9.28 The following rules are bounded: 28.10/9.28 f_508(v629:0:0, v630:0:0, v639:0:0, v641:0:0, sum~cons_1~v725:0:0, sum~cons_1~v727:0:0, v645:0:0) -> f_508(v629:0:0, v630:0:0, 1 + v725:0:0, 1 + v727:0:0, v725:0:0, v727:0:0, 1 + v645:0:0) :|: v645:0:0 > 0 && v630:0:0 > 1 && v727:0:0 > -1 && v641:0:0 > 1 && v629:0:0 > 1 && v639:0:0 > 1 && v725:0:0 > -1 && sum~cons_1~v725:0:0 = 1 + v725:0:0 && sum~cons_1~v727:0:0 = 1 + v727:0:0 28.10/9.28 28.10/9.28 28.10/9.28 ---------------------------------------- 28.10/9.28 28.10/9.28 (12) 28.10/9.28 YES 28.20/9.41 EOF