141.92/102.53 YES 141.92/102.53 141.92/102.53 Ultimate: Cannot open display: 141.92/102.53 This is Ultimate 0.1.24-8dc7c08-m 141.92/102.53 [2019-03-28 12:41:14,881 INFO L170 SettingsManager]: Resetting all preferences to default values... 141.92/102.53 [2019-03-28 12:41:14,883 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values 141.92/102.53 [2019-03-28 12:41:14,895 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 141.92/102.53 [2019-03-28 12:41:14,895 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values 141.92/102.53 [2019-03-28 12:41:14,896 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values 141.92/102.53 [2019-03-28 12:41:14,897 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values 141.92/102.53 [2019-03-28 12:41:14,899 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values 141.92/102.53 [2019-03-28 12:41:14,901 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values 141.92/102.53 [2019-03-28 12:41:14,901 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values 141.92/102.53 [2019-03-28 12:41:14,902 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... 141.92/102.53 [2019-03-28 12:41:14,902 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values 141.92/102.53 [2019-03-28 12:41:14,903 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values 141.92/102.53 [2019-03-28 12:41:14,904 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values 141.92/102.53 [2019-03-28 12:41:14,905 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values 141.92/102.53 [2019-03-28 12:41:14,906 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values 141.92/102.53 [2019-03-28 12:41:14,907 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values 141.92/102.53 [2019-03-28 12:41:14,909 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values 141.92/102.53 [2019-03-28 12:41:14,911 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values 141.92/102.53 [2019-03-28 12:41:14,912 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values 141.92/102.53 [2019-03-28 12:41:14,913 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values 141.92/102.53 [2019-03-28 12:41:14,914 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values 141.92/102.53 [2019-03-28 12:41:14,919 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 141.92/102.53 [2019-03-28 12:41:14,919 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... 141.92/102.53 [2019-03-28 12:41:14,919 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values 141.92/102.53 [2019-03-28 12:41:14,920 INFO L174 SettingsManager]: Resetting IcfgToChc preferences to default values 141.92/102.53 [2019-03-28 12:41:14,920 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values 141.92/102.54 [2019-03-28 12:41:14,921 INFO L177 SettingsManager]: ReqToTest provides no preferences, ignoring... 141.92/102.54 [2019-03-28 12:41:14,921 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values 141.92/102.54 [2019-03-28 12:41:14,922 INFO L174 SettingsManager]: Resetting ChcSmtPrinter preferences to default values 141.92/102.54 [2019-03-28 12:41:14,923 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values 141.92/102.54 [2019-03-28 12:41:14,923 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values 141.92/102.54 [2019-03-28 12:41:14,924 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... 141.92/102.54 [2019-03-28 12:41:14,924 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values 141.92/102.54 [2019-03-28 12:41:14,925 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 141.92/102.54 [2019-03-28 12:41:14,925 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... 141.92/102.54 [2019-03-28 12:41:14,925 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values 141.92/102.54 [2019-03-28 12:41:14,926 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values 141.92/102.54 [2019-03-28 12:41:14,927 INFO L181 SettingsManager]: Finished resetting all preferences to default values... 141.92/102.54 [2019-03-28 12:41:14,927 INFO L98 SettingsManager]: Beginning loading settings from /export/starexec/sandbox/solver/bin/./../termcomp2017.epf 141.92/102.54 [2019-03-28 12:41:14,942 INFO L110 SettingsManager]: Loading preferences was successful 141.92/102.54 [2019-03-28 12:41:14,942 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: 141.92/102.54 [2019-03-28 12:41:14,943 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: 141.92/102.54 [2019-03-28 12:41:14,943 INFO L133 SettingsManager]: * Rewrite not-equals=true 141.92/102.54 [2019-03-28 12:41:14,943 INFO L133 SettingsManager]: * Create parallel compositions if possible=false 141.92/102.54 [2019-03-28 12:41:14,944 INFO L133 SettingsManager]: * Minimize states using LBE with the strategy=SINGLE 141.92/102.54 [2019-03-28 12:41:14,944 INFO L133 SettingsManager]: * Use SBE=true 141.92/102.54 [2019-03-28 12:41:14,944 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: 141.92/102.54 [2019-03-28 12:41:14,944 INFO L133 SettingsManager]: * Use old map elimination=false 141.92/102.54 [2019-03-28 12:41:14,944 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false 141.92/102.54 [2019-03-28 12:41:14,944 INFO L133 SettingsManager]: * Buchi interpolant automaton construction strategy=DANDELION 141.92/102.54 [2019-03-28 12:41:14,945 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true 141.92/102.54 [2019-03-28 12:41:14,945 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES 141.92/102.54 [2019-03-28 12:41:14,945 INFO L133 SettingsManager]: * Construct termination proof for TermComp=true 141.92/102.54 [2019-03-28 12:41:14,945 INFO L133 SettingsManager]: * Command for external solver (GNTA synthesis)=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:12000 141.92/102.54 [2019-03-28 12:41:14,945 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: 141.92/102.54 [2019-03-28 12:41:14,945 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false 141.92/102.54 [2019-03-28 12:41:14,946 INFO L133 SettingsManager]: * Check division by zero=IGNORE 141.92/102.54 [2019-03-28 12:41:14,946 INFO L133 SettingsManager]: * Check if freed pointer was valid=false 141.92/102.54 [2019-03-28 12:41:14,946 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false 141.92/102.54 [2019-03-28 12:41:14,946 INFO L133 SettingsManager]: * How to treat unsigned ints differently from normal ones=IGNORE 141.92/102.54 [2019-03-28 12:41:14,946 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: 141.92/102.54 [2019-03-28 12:41:14,947 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements 141.92/102.54 [2019-03-28 12:41:14,947 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump 141.92/102.54 [2019-03-28 12:41:14,947 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 141.92/102.54 [2019-03-28 12:41:14,947 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: 141.92/102.54 [2019-03-28 12:41:14,947 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles 141.92/102.54 [2019-03-28 12:41:14,947 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL 141.92/102.54 [2019-03-28 12:41:14,948 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true 141.92/102.54 [2019-03-28 12:41:14,972 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp 141.92/102.54 [2019-03-28 12:41:14,985 INFO L259 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized 141.92/102.54 [2019-03-28 12:41:14,989 INFO L215 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. 141.92/102.54 [2019-03-28 12:41:14,990 INFO L271 PluginConnector]: Initializing CDTParser... 141.92/102.54 [2019-03-28 12:41:14,991 INFO L276 PluginConnector]: CDTParser initialized 141.92/102.54 [2019-03-28 12:41:14,992 INFO L430 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /export/starexec/sandbox/benchmark/theBenchmark.c 141.92/102.54 [2019-03-28 12:41:15,053 INFO L221 CDTParser]: Created temporary CDT project at /export/starexec/sandbox/tmp/6d2ea42ccf034e088617fdad32bb6d4e/FLAG8b6d624cd 141.92/102.54 [2019-03-28 12:41:15,392 INFO L307 CDTParser]: Found 1 translation units. 141.92/102.54 [2019-03-28 12:41:15,393 INFO L161 CDTParser]: Scanning /export/starexec/sandbox/benchmark/theBenchmark.c 141.92/102.54 [2019-03-28 12:41:15,393 WARN L117 ultiparseSymbolTable]: System include stdlib.h could not be resolved by CDT -- only built-in system includes are available. 141.92/102.54 [2019-03-28 12:41:15,399 INFO L355 CDTParser]: About to delete temporary CDT project at /export/starexec/sandbox/tmp/6d2ea42ccf034e088617fdad32bb6d4e/FLAG8b6d624cd 141.92/102.54 [2019-03-28 12:41:15,810 INFO L363 CDTParser]: Successfully deleted /export/starexec/sandbox/tmp/6d2ea42ccf034e088617fdad32bb6d4e 141.92/102.54 [2019-03-28 12:41:15,822 INFO L297 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### 141.92/102.54 [2019-03-28 12:41:15,823 INFO L131 ToolchainWalker]: Walking toolchain with 7 elements. 141.92/102.54 [2019-03-28 12:41:15,824 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- 141.92/102.54 [2019-03-28 12:41:15,825 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... 141.92/102.54 [2019-03-28 12:41:15,828 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized 141.92/102.54 [2019-03-28 12:41:15,829 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 12:41:15" (1/1) ... 141.92/102.54 [2019-03-28 12:41:15,833 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@718935c3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:15, skipping insertion in model container 141.92/102.54 [2019-03-28 12:41:15,833 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 12:41:15" (1/1) ... 141.92/102.54 [2019-03-28 12:41:15,841 INFO L145 MainTranslator]: Starting translation in SV-COMP mode 141.92/102.54 [2019-03-28 12:41:15,857 INFO L176 MainTranslator]: Built tables and reachable declarations 141.92/102.54 [2019-03-28 12:41:16,018 INFO L206 PostProcessor]: Analyzing one entry point: main 141.92/102.54 [2019-03-28 12:41:16,031 INFO L191 MainTranslator]: Completed pre-run 141.92/102.54 [2019-03-28 12:41:16,108 INFO L206 PostProcessor]: Analyzing one entry point: main 141.92/102.54 [2019-03-28 12:41:16,125 INFO L195 MainTranslator]: Completed translation 141.92/102.54 [2019-03-28 12:41:16,126 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16 WrapperNode 141.92/102.54 [2019-03-28 12:41:16,126 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- 141.92/102.54 [2019-03-28 12:41:16,127 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- 141.92/102.54 [2019-03-28 12:41:16,127 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... 141.92/102.54 [2019-03-28 12:41:16,127 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized 141.92/102.54 [2019-03-28 12:41:16,137 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,147 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,170 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- 141.92/102.54 [2019-03-28 12:41:16,171 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- 141.92/102.54 [2019-03-28 12:41:16,171 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... 141.92/102.54 [2019-03-28 12:41:16,171 INFO L276 PluginConnector]: Boogie Preprocessor initialized 141.92/102.54 [2019-03-28 12:41:16,181 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,181 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,183 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,183 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,187 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,191 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,192 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,194 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- 141.92/102.54 [2019-03-28 12:41:16,195 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- 141.92/102.54 [2019-03-28 12:41:16,195 INFO L271 PluginConnector]: Initializing RCFGBuilder... 141.92/102.54 [2019-03-28 12:41:16,195 INFO L276 PluginConnector]: RCFGBuilder initialized 141.92/102.54 [2019-03-28 12:41:16,196 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (1/1) ... 141.92/102.54 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 141.92/102.54 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 (exit command is (exit), workingDir is null) 141.92/102.54 Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 141.92/102.54 [2019-03-28 12:41:16,265 INFO L130 BoogieDeclarations]: Found specification of procedure write~int 141.92/102.54 [2019-03-28 12:41:16,265 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start 141.92/102.54 [2019-03-28 12:41:16,265 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start 141.92/102.54 [2019-03-28 12:41:16,265 INFO L130 BoogieDeclarations]: Found specification of procedure read~int 141.92/102.54 [2019-03-28 12:41:16,265 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack 141.92/102.54 [2019-03-28 12:41:16,266 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc 141.92/102.54 [2019-03-28 12:41:16,557 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) 141.92/102.54 [2019-03-28 12:41:16,557 INFO L286 CfgBuilder]: Removed 5 assue(true) statements. 141.92/102.54 [2019-03-28 12:41:16,559 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:41:16 BoogieIcfgContainer 141.92/102.54 [2019-03-28 12:41:16,559 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- 141.92/102.54 [2019-03-28 12:41:16,560 INFO L113 PluginConnector]: ------------------------BlockEncodingV2---------------------------- 141.92/102.54 [2019-03-28 12:41:16,560 INFO L271 PluginConnector]: Initializing BlockEncodingV2... 141.92/102.54 [2019-03-28 12:41:16,562 INFO L276 PluginConnector]: BlockEncodingV2 initialized 141.92/102.54 [2019-03-28 12:41:16,563 INFO L185 PluginConnector]: Executing the observer BlockEncodingObserver from plugin BlockEncodingV2 for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:41:16" (1/1) ... 141.92/102.54 [2019-03-28 12:41:16,583 INFO L313 BlockEncoder]: Initial Icfg 40 locations, 42 edges 141.92/102.54 [2019-03-28 12:41:16,585 INFO L258 BlockEncoder]: Using Remove infeasible edges 141.92/102.54 [2019-03-28 12:41:16,586 INFO L263 BlockEncoder]: Using Maximize final states 141.92/102.54 [2019-03-28 12:41:16,586 INFO L270 BlockEncoder]: Using Minimize states even if more edges are added than removed.=false 141.92/102.54 [2019-03-28 12:41:16,587 INFO L276 BlockEncoder]: Using Minimize states using LBE with the strategy=SINGLE 141.92/102.54 [2019-03-28 12:41:16,588 INFO L296 BlockEncoder]: Using Remove sink states 141.92/102.54 [2019-03-28 12:41:16,589 INFO L171 BlockEncoder]: Using Apply optimizations until nothing changes=true 141.92/102.54 [2019-03-28 12:41:16,590 INFO L179 BlockEncoder]: Using Rewrite not-equals 141.92/102.54 [2019-03-28 12:41:16,614 INFO L185 BlockEncoder]: Using Use SBE 141.92/102.54 [2019-03-28 12:41:16,643 INFO L200 BlockEncoder]: SBE split 19 edges 141.92/102.54 [2019-03-28 12:41:16,648 INFO L70 emoveInfeasibleEdges]: Removed 1 edges and 0 locations because of local infeasibility 141.92/102.54 [2019-03-28 12:41:16,650 INFO L71 MaximizeFinalStates]: 0 new accepting states 141.92/102.54 [2019-03-28 12:41:16,680 INFO L100 BaseMinimizeStates]: Removed 14 edges and 7 locations by large block encoding 141.92/102.54 [2019-03-28 12:41:16,683 INFO L70 RemoveSinkStates]: Removed 1 edges and 1 locations by removing sink states 141.92/102.54 [2019-03-28 12:41:16,684 INFO L70 emoveInfeasibleEdges]: Removed 0 edges and 0 locations because of local infeasibility 141.92/102.54 [2019-03-28 12:41:16,685 INFO L71 MaximizeFinalStates]: 0 new accepting states 141.92/102.54 [2019-03-28 12:41:16,685 INFO L100 BaseMinimizeStates]: Removed 0 edges and 0 locations by large block encoding 141.92/102.54 [2019-03-28 12:41:16,686 INFO L70 RemoveSinkStates]: Removed 0 edges and 0 locations by removing sink states 141.92/102.54 [2019-03-28 12:41:16,686 INFO L313 BlockEncoder]: Encoded RCFG 32 locations, 54 edges 141.92/102.54 [2019-03-28 12:41:16,687 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:41:16 BasicIcfg 141.92/102.54 [2019-03-28 12:41:16,687 INFO L132 PluginConnector]: ------------------------ END BlockEncodingV2---------------------------- 141.92/102.54 [2019-03-28 12:41:16,688 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- 141.92/102.54 [2019-03-28 12:41:16,688 INFO L271 PluginConnector]: Initializing TraceAbstraction... 141.92/102.54 [2019-03-28 12:41:16,691 INFO L276 PluginConnector]: TraceAbstraction initialized 141.92/102.54 [2019-03-28 12:41:16,692 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.03 12:41:15" (1/4) ... 141.92/102.54 [2019-03-28 12:41:16,692 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@767ecc61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 12:41:16, skipping insertion in model container 141.92/102.54 [2019-03-28 12:41:16,693 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (2/4) ... 141.92/102.54 [2019-03-28 12:41:16,693 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@767ecc61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 12:41:16, skipping insertion in model container 141.92/102.54 [2019-03-28 12:41:16,693 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:41:16" (3/4) ... 141.92/102.54 [2019-03-28 12:41:16,694 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@767ecc61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:41:16, skipping insertion in model container 141.92/102.54 [2019-03-28 12:41:16,694 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:41:16" (4/4) ... 141.92/102.54 [2019-03-28 12:41:16,696 INFO L112 eAbstractionObserver]: Analyzing ICFG theBenchmark.c_BEv2 141.92/102.54 [2019-03-28 12:41:16,708 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION 141.92/102.54 [2019-03-28 12:41:16,716 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 18 error locations. 141.92/102.54 [2019-03-28 12:41:16,733 INFO L257 AbstractCegarLoop]: Starting to check reachability of 18 error locations. 141.92/102.54 [2019-03-28 12:41:16,763 INFO L133 ementStrategyFactory]: Using default assertion order modulation 141.92/102.54 [2019-03-28 12:41:16,763 INFO L382 AbstractCegarLoop]: Interprodecural is true 141.92/102.54 [2019-03-28 12:41:16,764 INFO L383 AbstractCegarLoop]: Hoare is true 141.92/102.54 [2019-03-28 12:41:16,764 INFO L384 AbstractCegarLoop]: Compute interpolants for ForwardPredicates 141.92/102.54 [2019-03-28 12:41:16,764 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE 141.92/102.54 [2019-03-28 12:41:16,764 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION 141.92/102.54 [2019-03-28 12:41:16,764 INFO L387 AbstractCegarLoop]: Difference is false 141.92/102.54 [2019-03-28 12:41:16,764 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA 141.92/102.54 [2019-03-28 12:41:16,765 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== 141.92/102.54 [2019-03-28 12:41:16,781 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. 141.92/102.54 [2019-03-28 12:41:16,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 141.92/102.54 [2019-03-28 12:41:16,787 INFO L394 BasicCegarLoop]: Found error trace 141.92/102.54 [2019-03-28 12:41:16,787 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] 141.92/102.54 [2019-03-28 12:41:16,788 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr14REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr15REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr17REQUIRES_VIOLATION, ULTIMATE.startErr16REQUIRES_VIOLATION]=== 141.92/102.54 [2019-03-28 12:41:16,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 141.92/102.54 [2019-03-28 12:41:16,793 INFO L82 PathProgramCache]: Analyzing trace with hash 122944, now seen corresponding path program 1 times 141.92/102.54 [2019-03-28 12:41:16,795 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 141.92/102.54 [2019-03-28 12:41:16,796 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 141.92/102.54 [2019-03-28 12:41:16,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:16,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:16,850 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:16,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 141.92/102.54 [2019-03-28 12:41:16,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 141.92/102.54 [2019-03-28 12:41:16,975 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 141.92/102.54 [2019-03-28 12:41:16,975 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 141.92/102.54 [2019-03-28 12:41:16,979 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 141.92/102.54 [2019-03-28 12:41:16,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 141.92/102.54 [2019-03-28 12:41:16,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:16,997 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. 141.92/102.54 [2019-03-28 12:41:17,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 141.92/102.54 [2019-03-28 12:41:17,126 INFO L93 Difference]: Finished difference Result 32 states and 54 transitions. 141.92/102.54 [2019-03-28 12:41:17,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,128 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 141.92/102.54 [2019-03-28 12:41:17,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 141.92/102.54 [2019-03-28 12:41:17,142 INFO L225 Difference]: With dead ends: 32 141.92/102.54 [2019-03-28 12:41:17,142 INFO L226 Difference]: Without dead ends: 27 141.92/102.54 [2019-03-28 12:41:17,146 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. 141.92/102.54 [2019-03-28 12:41:17,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. 141.92/102.54 [2019-03-28 12:41:17,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. 141.92/102.54 [2019-03-28 12:41:17,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 44 transitions. 141.92/102.54 [2019-03-28 12:41:17,186 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 44 transitions. Word has length 3 141.92/102.54 [2019-03-28 12:41:17,187 INFO L84 Accepts]: Finished accepts. word is rejected. 141.92/102.54 [2019-03-28 12:41:17,187 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 44 transitions. 141.92/102.54 [2019-03-28 12:41:17,187 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,187 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 44 transitions. 141.92/102.54 [2019-03-28 12:41:17,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 141.92/102.54 [2019-03-28 12:41:17,188 INFO L394 BasicCegarLoop]: Found error trace 141.92/102.54 [2019-03-28 12:41:17,188 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] 141.92/102.54 [2019-03-28 12:41:17,188 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr14REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr15REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr17REQUIRES_VIOLATION, ULTIMATE.startErr16REQUIRES_VIOLATION]=== 141.92/102.54 [2019-03-28 12:41:17,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 141.92/102.54 [2019-03-28 12:41:17,189 INFO L82 PathProgramCache]: Analyzing trace with hash 122946, now seen corresponding path program 1 times 141.92/102.54 [2019-03-28 12:41:17,189 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 141.92/102.54 [2019-03-28 12:41:17,189 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 141.92/102.54 [2019-03-28 12:41:17,190 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,191 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 141.92/102.54 [2019-03-28 12:41:17,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 141.92/102.54 [2019-03-28 12:41:17,214 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 141.92/102.54 [2019-03-28 12:41:17,214 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 141.92/102.54 [2019-03-28 12:41:17,216 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 141.92/102.54 [2019-03-28 12:41:17,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 141.92/102.54 [2019-03-28 12:41:17,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,217 INFO L87 Difference]: Start difference. First operand 27 states and 44 transitions. Second operand 3 states. 141.92/102.54 [2019-03-28 12:41:17,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 141.92/102.54 [2019-03-28 12:41:17,306 INFO L93 Difference]: Finished difference Result 32 states and 44 transitions. 141.92/102.54 [2019-03-28 12:41:17,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,306 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 141.92/102.54 [2019-03-28 12:41:17,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 141.92/102.54 [2019-03-28 12:41:17,307 INFO L225 Difference]: With dead ends: 32 141.92/102.54 [2019-03-28 12:41:17,307 INFO L226 Difference]: Without dead ends: 27 141.92/102.54 [2019-03-28 12:41:17,308 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. 141.92/102.54 [2019-03-28 12:41:17,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. 141.92/102.54 [2019-03-28 12:41:17,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. 141.92/102.54 [2019-03-28 12:41:17,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 39 transitions. 141.92/102.54 [2019-03-28 12:41:17,313 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 39 transitions. Word has length 3 141.92/102.54 [2019-03-28 12:41:17,313 INFO L84 Accepts]: Finished accepts. word is rejected. 141.92/102.54 [2019-03-28 12:41:17,313 INFO L480 AbstractCegarLoop]: Abstraction has 27 states and 39 transitions. 141.92/102.54 [2019-03-28 12:41:17,314 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,314 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 39 transitions. 141.92/102.54 [2019-03-28 12:41:17,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 141.92/102.54 [2019-03-28 12:41:17,314 INFO L394 BasicCegarLoop]: Found error trace 141.92/102.54 [2019-03-28 12:41:17,314 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] 141.92/102.54 [2019-03-28 12:41:17,315 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr14REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr15REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr17REQUIRES_VIOLATION, ULTIMATE.startErr16REQUIRES_VIOLATION]=== 141.92/102.54 [2019-03-28 12:41:17,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 141.92/102.54 [2019-03-28 12:41:17,315 INFO L82 PathProgramCache]: Analyzing trace with hash 122947, now seen corresponding path program 1 times 141.92/102.54 [2019-03-28 12:41:17,315 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 141.92/102.54 [2019-03-28 12:41:17,315 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 141.92/102.54 [2019-03-28 12:41:17,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 141.92/102.54 [2019-03-28 12:41:17,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 141.92/102.54 [2019-03-28 12:41:17,347 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 141.92/102.54 [2019-03-28 12:41:17,347 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 141.92/102.54 [2019-03-28 12:41:17,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 141.92/102.54 [2019-03-28 12:41:17,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 141.92/102.54 [2019-03-28 12:41:17,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,348 INFO L87 Difference]: Start difference. First operand 27 states and 39 transitions. Second operand 3 states. 141.92/102.54 [2019-03-28 12:41:17,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 141.92/102.54 [2019-03-28 12:41:17,409 INFO L93 Difference]: Finished difference Result 27 states and 39 transitions. 141.92/102.54 [2019-03-28 12:41:17,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,410 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 141.92/102.54 [2019-03-28 12:41:17,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 141.92/102.54 [2019-03-28 12:41:17,411 INFO L225 Difference]: With dead ends: 27 141.92/102.54 [2019-03-28 12:41:17,411 INFO L226 Difference]: Without dead ends: 22 141.92/102.54 [2019-03-28 12:41:17,412 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. 141.92/102.54 [2019-03-28 12:41:17,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. 141.92/102.54 [2019-03-28 12:41:17,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. 141.92/102.54 [2019-03-28 12:41:17,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 34 transitions. 141.92/102.54 [2019-03-28 12:41:17,416 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 34 transitions. Word has length 3 141.92/102.54 [2019-03-28 12:41:17,416 INFO L84 Accepts]: Finished accepts. word is rejected. 141.92/102.54 [2019-03-28 12:41:17,416 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 34 transitions. 141.92/102.54 [2019-03-28 12:41:17,416 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,416 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 34 transitions. 141.92/102.54 [2019-03-28 12:41:17,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 141.92/102.54 [2019-03-28 12:41:17,417 INFO L394 BasicCegarLoop]: Found error trace 141.92/102.54 [2019-03-28 12:41:17,417 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] 141.92/102.54 [2019-03-28 12:41:17,417 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr14REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr15REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr17REQUIRES_VIOLATION, ULTIMATE.startErr16REQUIRES_VIOLATION]=== 141.92/102.54 [2019-03-28 12:41:17,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 141.92/102.54 [2019-03-28 12:41:17,418 INFO L82 PathProgramCache]: Analyzing trace with hash 3809501, now seen corresponding path program 1 times 141.92/102.54 [2019-03-28 12:41:17,418 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 141.92/102.54 [2019-03-28 12:41:17,418 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 141.92/102.54 [2019-03-28 12:41:17,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,419 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 141.92/102.54 [2019-03-28 12:41:17,458 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 141.92/102.54 [2019-03-28 12:41:17,459 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 141.92/102.54 [2019-03-28 12:41:17,459 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 141.92/102.54 [2019-03-28 12:41:17,459 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 141.92/102.54 [2019-03-28 12:41:17,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 141.92/102.54 [2019-03-28 12:41:17,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,460 INFO L87 Difference]: Start difference. First operand 22 states and 34 transitions. Second operand 3 states. 141.92/102.54 [2019-03-28 12:41:17,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 141.92/102.54 [2019-03-28 12:41:17,504 INFO L93 Difference]: Finished difference Result 26 states and 34 transitions. 141.92/102.54 [2019-03-28 12:41:17,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,504 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 141.92/102.54 [2019-03-28 12:41:17,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 141.92/102.54 [2019-03-28 12:41:17,505 INFO L225 Difference]: With dead ends: 26 141.92/102.54 [2019-03-28 12:41:17,505 INFO L226 Difference]: Without dead ends: 22 141.92/102.54 [2019-03-28 12:41:17,506 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. 141.92/102.54 [2019-03-28 12:41:17,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. 141.92/102.54 [2019-03-28 12:41:17,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. 141.92/102.54 [2019-03-28 12:41:17,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 30 transitions. 141.92/102.54 [2019-03-28 12:41:17,509 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 30 transitions. Word has length 4 141.92/102.54 [2019-03-28 12:41:17,509 INFO L84 Accepts]: Finished accepts. word is rejected. 141.92/102.54 [2019-03-28 12:41:17,510 INFO L480 AbstractCegarLoop]: Abstraction has 22 states and 30 transitions. 141.92/102.54 [2019-03-28 12:41:17,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,510 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 30 transitions. 141.92/102.54 [2019-03-28 12:41:17,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 141.92/102.54 [2019-03-28 12:41:17,510 INFO L394 BasicCegarLoop]: Found error trace 141.92/102.54 [2019-03-28 12:41:17,510 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] 141.92/102.54 [2019-03-28 12:41:17,511 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr14REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr15REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr17REQUIRES_VIOLATION, ULTIMATE.startErr16REQUIRES_VIOLATION]=== 141.92/102.54 [2019-03-28 12:41:17,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 141.92/102.54 [2019-03-28 12:41:17,511 INFO L82 PathProgramCache]: Analyzing trace with hash 3809502, now seen corresponding path program 1 times 141.92/102.54 [2019-03-28 12:41:17,511 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 141.92/102.54 [2019-03-28 12:41:17,511 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 141.92/102.54 [2019-03-28 12:41:17,512 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 141.92/102.54 [2019-03-28 12:41:17,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 141.92/102.54 [2019-03-28 12:41:17,542 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 141.92/102.54 [2019-03-28 12:41:17,542 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 141.92/102.54 [2019-03-28 12:41:17,542 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 141.92/102.54 [2019-03-28 12:41:17,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 141.92/102.54 [2019-03-28 12:41:17,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,543 INFO L87 Difference]: Start difference. First operand 22 states and 30 transitions. Second operand 3 states. 141.92/102.54 [2019-03-28 12:41:17,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 141.92/102.54 [2019-03-28 12:41:17,582 INFO L93 Difference]: Finished difference Result 22 states and 30 transitions. 141.92/102.54 [2019-03-28 12:41:17,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,582 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 141.92/102.54 [2019-03-28 12:41:17,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 141.92/102.54 [2019-03-28 12:41:17,583 INFO L225 Difference]: With dead ends: 22 141.92/102.54 [2019-03-28 12:41:17,583 INFO L226 Difference]: Without dead ends: 18 141.92/102.54 [2019-03-28 12:41:17,583 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. 141.92/102.54 [2019-03-28 12:41:17,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. 141.92/102.54 [2019-03-28 12:41:17,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18 states. 141.92/102.54 [2019-03-28 12:41:17,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 26 transitions. 141.92/102.54 [2019-03-28 12:41:17,587 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 26 transitions. Word has length 4 141.92/102.54 [2019-03-28 12:41:17,587 INFO L84 Accepts]: Finished accepts. word is rejected. 141.92/102.54 [2019-03-28 12:41:17,587 INFO L480 AbstractCegarLoop]: Abstraction has 18 states and 26 transitions. 141.92/102.54 [2019-03-28 12:41:17,587 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,587 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 26 transitions. 141.92/102.54 [2019-03-28 12:41:17,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 141.92/102.54 [2019-03-28 12:41:17,588 INFO L394 BasicCegarLoop]: Found error trace 141.92/102.54 [2019-03-28 12:41:17,588 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] 141.92/102.54 [2019-03-28 12:41:17,588 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2REQUIRES_VIOLATION, ULTIMATE.startErr13REQUIRES_VIOLATION, ULTIMATE.startErr12REQUIRES_VIOLATION, ULTIMATE.startErr14REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr15REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr17REQUIRES_VIOLATION, ULTIMATE.startErr16REQUIRES_VIOLATION]=== 141.92/102.54 [2019-03-28 12:41:17,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 141.92/102.54 [2019-03-28 12:41:17,589 INFO L82 PathProgramCache]: Analyzing trace with hash 3809499, now seen corresponding path program 1 times 141.92/102.54 [2019-03-28 12:41:17,589 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 141.92/102.54 [2019-03-28 12:41:17,589 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 141.92/102.54 [2019-03-28 12:41:17,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,590 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 141.92/102.54 [2019-03-28 12:41:17,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 141.92/102.54 [2019-03-28 12:41:17,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 141.92/102.54 [2019-03-28 12:41:17,615 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 141.92/102.54 [2019-03-28 12:41:17,615 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 141.92/102.54 [2019-03-28 12:41:17,615 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 141.92/102.54 [2019-03-28 12:41:17,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 141.92/102.54 [2019-03-28 12:41:17,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,616 INFO L87 Difference]: Start difference. First operand 18 states and 26 transitions. Second operand 3 states. 141.92/102.54 [2019-03-28 12:41:17,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 141.92/102.54 [2019-03-28 12:41:17,662 INFO L93 Difference]: Finished difference Result 18 states and 26 transitions. 141.92/102.54 [2019-03-28 12:41:17,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,662 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 141.92/102.54 [2019-03-28 12:41:17,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 141.92/102.54 [2019-03-28 12:41:17,663 INFO L225 Difference]: With dead ends: 18 141.92/102.54 [2019-03-28 12:41:17,663 INFO L226 Difference]: Without dead ends: 0 141.92/102.54 [2019-03-28 12:41:17,663 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 141.92/102.54 [2019-03-28 12:41:17,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. 141.92/102.54 [2019-03-28 12:41:17,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. 141.92/102.54 [2019-03-28 12:41:17,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. 141.92/102.54 [2019-03-28 12:41:17,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. 141.92/102.54 [2019-03-28 12:41:17,664 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 4 141.92/102.54 [2019-03-28 12:41:17,665 INFO L84 Accepts]: Finished accepts. word is rejected. 141.92/102.54 [2019-03-28 12:41:17,665 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. 141.92/102.54 [2019-03-28 12:41:17,665 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 141.92/102.54 [2019-03-28 12:41:17,665 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. 141.92/102.54 [2019-03-28 12:41:17,665 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. 141.92/102.54 [2019-03-28 12:41:17,670 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. 141.92/102.54 [2019-03-28 12:41:17,719 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr10REQUIRES_VIOLATION(line 11) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,720 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr9REQUIRES_VIOLATION(line 10) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,720 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr8REQUIRES_VIOLATION(line 10) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,720 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr7REQUIRES_VIOLATION(line 10) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,720 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr14REQUIRES_VIOLATION(line 12) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,720 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr13REQUIRES_VIOLATION(line 12) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,720 INFO L448 ceAbstractionStarter]: For program point L11(line 11) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,720 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr12REQUIRES_VIOLATION(line 12) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,721 INFO L448 ceAbstractionStarter]: For program point L11-1(line 11) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,721 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr11REQUIRES_VIOLATION(line 11) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,721 INFO L444 ceAbstractionStarter]: At program point L11-2(lines 9 13) the Hoare annotation is: (and (= 4 (select |#length| ULTIMATE.start_main_~c~0.base)) (= ULTIMATE.start_main_~c~0.offset 0) (= 4 (select |#length| ULTIMATE.start_main_~i~0.base)) (= 0 ULTIMATE.start_main_~i~0.offset) (= 1 (select |#valid| ULTIMATE.start_main_~c~0.base)) (= 1 (select |#valid| ULTIMATE.start_main_~i~0.base))) 141.92/102.54 [2019-03-28 12:41:17,721 INFO L448 ceAbstractionStarter]: For program point L9(lines 9 13) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,722 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr17REQUIRES_VIOLATION(line 14) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,722 INFO L448 ceAbstractionStarter]: For program point L7(line 7) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,722 INFO L444 ceAbstractionStarter]: At program point L9-2(lines 8 13) the Hoare annotation is: (and (= 4 (select |#length| ULTIMATE.start_main_~c~0.base)) (= ULTIMATE.start_main_~c~0.offset 0) (= 4 (select |#length| ULTIMATE.start_main_~i~0.base)) (= 0 ULTIMATE.start_main_~i~0.offset) (= 1 (select |#valid| ULTIMATE.start_main_~c~0.base)) (= 1 (select |#valid| ULTIMATE.start_main_~i~0.base))) 141.92/102.54 [2019-03-28 12:41:17,722 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr16REQUIRES_VIOLATION(line 14) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,722 INFO L448 ceAbstractionStarter]: For program point L7-1(line 7) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,722 INFO L448 ceAbstractionStarter]: For program point L9-3(lines 9 13) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,722 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr15REQUIRES_VIOLATION(line 12) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point L-1(line -1) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startENTRY(line -1) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr2REQUIRES_VIOLATION(line 8) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr1REQUIRES_VIOLATION(line 7) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr0REQUIRES_VIOLATION(line 7) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr6REQUIRES_VIOLATION(line 10) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr5REQUIRES_VIOLATION(line 9) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,723 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr4REQUIRES_VIOLATION(line 9) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,724 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr3REQUIRES_VIOLATION(line 8) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,724 INFO L448 ceAbstractionStarter]: For program point L12(line 12) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,724 INFO L448 ceAbstractionStarter]: For program point L10(line 10) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,724 INFO L448 ceAbstractionStarter]: For program point L12-2(line 12) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,724 INFO L448 ceAbstractionStarter]: For program point L10-2(line 10) no Hoare annotation was computed. 141.92/102.54 [2019-03-28 12:41:17,725 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg 141.92/102.54 [2019-03-28 12:41:17,734 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,735 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,741 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,741 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,743 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,743 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,744 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,744 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 141.92/102.54 [2019-03-28 12:41:17,746 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:41:17 BasicIcfg 141.92/102.54 [2019-03-28 12:41:17,746 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- 141.92/102.54 [2019-03-28 12:41:17,747 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- 141.92/102.54 [2019-03-28 12:41:17,747 INFO L271 PluginConnector]: Initializing BuchiAutomizer... 141.92/102.54 [2019-03-28 12:41:17,750 INFO L276 PluginConnector]: BuchiAutomizer initialized 141.92/102.54 [2019-03-28 12:41:17,751 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 141.92/102.54 [2019-03-28 12:41:17,751 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.03 12:41:15" (1/5) ... 141.92/102.54 [2019-03-28 12:41:17,752 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@a69edc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.03 12:41:17, skipping insertion in model container 141.92/102.54 [2019-03-28 12:41:17,752 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 141.92/102.54 [2019-03-28 12:41:17,752 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:41:16" (2/5) ... 141.92/102.54 [2019-03-28 12:41:17,752 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@a69edc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.03 12:41:17, skipping insertion in model container 141.92/102.54 [2019-03-28 12:41:17,752 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 141.92/102.54 [2019-03-28 12:41:17,752 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:41:16" (3/5) ... 141.92/102.54 [2019-03-28 12:41:17,753 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@a69edc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:41:17, skipping insertion in model container 141.92/102.54 [2019-03-28 12:41:17,753 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 141.92/102.54 [2019-03-28 12:41:17,753 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:41:16" (4/5) ... 141.92/102.54 [2019-03-28 12:41:17,753 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@a69edc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:41:17, skipping insertion in model container 142.04/102.54 [2019-03-28 12:41:17,754 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 142.04/102.54 [2019-03-28 12:41:17,754 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:41:17" (5/5) ... 142.04/102.54 [2019-03-28 12:41:17,755 INFO L375 chiAutomizerObserver]: Analyzing ICFG theBenchmark.c_BEv2 142.04/102.54 [2019-03-28 12:41:17,778 INFO L133 ementStrategyFactory]: Using default assertion order modulation 142.04/102.54 [2019-03-28 12:41:17,778 INFO L374 BuchiCegarLoop]: Interprodecural is true 142.04/102.54 [2019-03-28 12:41:17,778 INFO L375 BuchiCegarLoop]: Hoare is true 142.04/102.54 [2019-03-28 12:41:17,778 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates 142.04/102.54 [2019-03-28 12:41:17,778 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE 142.04/102.54 [2019-03-28 12:41:17,779 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION 142.04/102.54 [2019-03-28 12:41:17,779 INFO L379 BuchiCegarLoop]: Difference is false 142.04/102.54 [2019-03-28 12:41:17,779 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA 142.04/102.54 [2019-03-28 12:41:17,779 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== 142.04/102.54 [2019-03-28 12:41:17,783 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states. 142.04/102.54 [2019-03-28 12:41:17,790 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:17,790 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:17,790 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:17,795 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:17,796 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:17,796 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ 142.04/102.54 [2019-03-28 12:41:17,796 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states. 142.04/102.54 [2019-03-28 12:41:17,798 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:17,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:17,798 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:17,799 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:17,799 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:17,804 INFO L794 eck$LassoCheckResult]: Stem: 27#ULTIMATE.startENTRYtrue [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 14#L-1true [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 8#L7true [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 6#L7-1true [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 9#L9-2true 142.04/102.54 [2019-03-28 12:41:17,805 INFO L796 eck$LassoCheckResult]: Loop: 9#L9-2true [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 11#L11-2true [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 12#L9true [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 15#L10true [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 23#L10-2true [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 29#L11true [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 26#L11-1true [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 17#L12true [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 16#L12-2true [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 9#L9-2true 142.04/102.54 [2019-03-28 12:41:17,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:17,807 INFO L82 PathProgramCache]: Analyzing trace with hash 3812311, now seen corresponding path program 1 times 142.04/102.54 [2019-03-28 12:41:17,807 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:17,807 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:17,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,808 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,808 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:17,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:17,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:17,852 INFO L82 PathProgramCache]: Analyzing trace with hash 1527638106, now seen corresponding path program 1 times 142.04/102.54 [2019-03-28 12:41:17,852 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:17,852 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:17,853 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,853 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,853 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:17,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:17,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:17,874 INFO L82 PathProgramCache]: Analyzing trace with hash -2022134460, now seen corresponding path program 1 times 142.04/102.54 [2019-03-28 12:41:17,874 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:17,874 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:17,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,876 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:17,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:17,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:17,971 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 142.04/102.54 [2019-03-28 12:41:17,972 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 142.04/102.54 [2019-03-28 12:41:18,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. 142.04/102.54 [2019-03-28 12:41:18,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 142.04/102.54 [2019-03-28 12:41:18,063 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 8 states. 142.04/102.54 [2019-03-28 12:41:18,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.54 [2019-03-28 12:41:18,395 INFO L93 Difference]: Finished difference Result 63 states and 103 transitions. 142.04/102.54 [2019-03-28 12:41:18,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 142.04/102.54 [2019-03-28 12:41:18,399 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 103 transitions. 142.04/102.54 [2019-03-28 12:41:18,402 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:18,403 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 24 states and 28 transitions. 142.04/102.54 [2019-03-28 12:41:18,404 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 142.04/102.54 [2019-03-28 12:41:18,405 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 142.04/102.54 [2019-03-28 12:41:18,405 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 28 transitions. 142.04/102.54 [2019-03-28 12:41:18,406 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 142.04/102.54 [2019-03-28 12:41:18,406 INFO L706 BuchiCegarLoop]: Abstraction has 24 states and 28 transitions. 142.04/102.54 [2019-03-28 12:41:18,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 28 transitions. 142.04/102.54 [2019-03-28 12:41:18,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 20. 142.04/102.54 [2019-03-28 12:41:18,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. 142.04/102.54 [2019-03-28 12:41:18,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. 142.04/102.54 [2019-03-28 12:41:18,409 INFO L729 BuchiCegarLoop]: Abstraction has 20 states and 24 transitions. 142.04/102.54 [2019-03-28 12:41:18,409 INFO L609 BuchiCegarLoop]: Abstraction has 20 states and 24 transitions. 142.04/102.54 [2019-03-28 12:41:18,409 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ 142.04/102.54 [2019-03-28 12:41:18,409 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 24 transitions. 142.04/102.54 [2019-03-28 12:41:18,410 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:18,410 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:18,410 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:18,411 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:18,411 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:18,412 INFO L794 eck$LassoCheckResult]: Stem: 130#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 126#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 121#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 117#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 118#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 136#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 135#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 129#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 122#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 123#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 127#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 120#L11-2 142.04/102.54 [2019-03-28 12:41:18,413 INFO L796 eck$LassoCheckResult]: Loop: 120#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 124#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 125#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 134#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 133#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 132#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 120#L11-2 142.04/102.54 [2019-03-28 12:41:18,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:18,414 INFO L82 PathProgramCache]: Analyzing trace with hash -377522803, now seen corresponding path program 1 times 142.04/102.54 [2019-03-28 12:41:18,414 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:18,414 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:18,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,415 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,415 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:18,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:18,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:18,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1448428475, now seen corresponding path program 1 times 142.04/102.54 [2019-03-28 12:41:18,444 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:18,444 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:18,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:18,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:18,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:18,455 INFO L82 PathProgramCache]: Analyzing trace with hash 1592187089, now seen corresponding path program 2 times 142.04/102.54 [2019-03-28 12:41:18,455 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:18,456 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:18,456 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,456 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,457 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:18,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:18,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:18,784 WARN L188 SmtUtils]: Spent 231.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 74 142.04/102.54 [2019-03-28 12:41:18,877 INFO L216 LassoAnalysis]: Preferences: 142.04/102.54 [2019-03-28 12:41:18,878 INFO L124 ssoRankerPreferences]: Compute integeral hull: false 142.04/102.54 [2019-03-28 12:41:18,878 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true 142.04/102.54 [2019-03-28 12:41:18,878 INFO L126 ssoRankerPreferences]: Term annotations enabled: false 142.04/102.54 [2019-03-28 12:41:18,878 INFO L127 ssoRankerPreferences]: Use exernal solver: false 142.04/102.54 [2019-03-28 12:41:18,879 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 142.04/102.54 [2019-03-28 12:41:18,879 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false 142.04/102.54 [2019-03-28 12:41:18,879 INFO L130 ssoRankerPreferences]: Path of dumped script: 142.04/102.54 [2019-03-28 12:41:18,879 INFO L131 ssoRankerPreferences]: Filename of dumped script: theBenchmark.c_BEv2_Iteration2_Lasso 142.04/102.54 [2019-03-28 12:41:18,879 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank 142.04/102.54 [2019-03-28 12:41:18,879 INFO L282 LassoAnalysis]: Starting lasso preprocessing... 142.04/102.54 [2019-03-28 12:41:18,900 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,906 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,908 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,910 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,912 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,913 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,916 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,919 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,922 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,924 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:18,926 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:19,099 WARN L188 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 46 DAG size of output: 42 142.04/102.54 [2019-03-28 12:41:19,136 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.54 [2019-03-28 12:41:19,386 INFO L300 LassoAnalysis]: Preprocessing complete. 142.04/102.54 [2019-03-28 12:41:19,391 INFO L497 LassoAnalysis]: Using template 'affine'. 142.04/102.54 [2019-03-28 12:41:19,393 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,395 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,395 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 142.04/102.54 [2019-03-28 12:41:19,396 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,396 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,396 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,398 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,398 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,400 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,401 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,401 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,401 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 142.04/102.54 [2019-03-28 12:41:19,402 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,402 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,402 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,402 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,402 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,403 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,404 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,404 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,404 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 142.04/102.54 [2019-03-28 12:41:19,404 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,404 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,405 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,405 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,405 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,406 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,406 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,407 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,407 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 142.04/102.54 [2019-03-28 12:41:19,407 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,407 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,407 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,408 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,408 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,409 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,409 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,410 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,410 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 142.04/102.54 [2019-03-28 12:41:19,410 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,410 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,410 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,411 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,411 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,412 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,412 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,412 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,413 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 142.04/102.54 [2019-03-28 12:41:19,413 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,413 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,413 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,414 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,414 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,414 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,415 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,415 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,415 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,416 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,416 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,418 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,418 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,421 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,422 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,422 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,422 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,422 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,423 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,425 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,425 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,427 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,428 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,428 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,428 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 142.04/102.54 [2019-03-28 12:41:19,428 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,429 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,429 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,429 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,429 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,430 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,430 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,431 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,431 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,431 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,431 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,433 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,433 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,435 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,436 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,436 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,437 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,437 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,437 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,439 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,439 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,444 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,445 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,445 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,445 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,446 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,446 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,449 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,449 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,470 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,470 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,471 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,471 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,471 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,471 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,473 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,473 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,475 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.54 [2019-03-28 12:41:19,476 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.54 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.54 Number of strict supporting invariants: 0 142.04/102.54 Number of non-strict supporting invariants: 1 142.04/102.54 Consider only non-deceasing supporting invariants: true 142.04/102.54 Simplify termination arguments: true 142.04/102.54 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.54 [2019-03-28 12:41:19,476 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.54 [2019-03-28 12:41:19,476 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.54 [2019-03-28 12:41:19,477 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.54 [2019-03-28 12:41:19,477 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.54 [2019-03-28 12:41:19,478 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.54 [2019-03-28 12:41:19,478 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.54 [2019-03-28 12:41:19,489 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. 142.04/102.54 [2019-03-28 12:41:19,502 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. 142.04/102.54 [2019-03-28 12:41:19,502 INFO L444 ModelExtractionUtils]: 2 out of 7 variables were initially zero. Simplification set additionally 2 variables to zero. 142.04/102.54 [2019-03-28 12:41:19,505 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... 142.04/102.54 [2019-03-28 12:41:19,506 INFO L440 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. 142.04/102.54 [2019-03-28 12:41:19,507 INFO L518 LassoAnalysis]: Proved termination. 142.04/102.54 [2019-03-28 12:41:19,507 INFO L520 LassoAnalysis]: Termination argument consisting of: 142.04/102.54 Ranking function f(v_rep(select (select #memory_int ULTIMATE.start_main_~i~0.base) ULTIMATE.start_main_~i~0.offset)_1) = -2*v_rep(select (select #memory_int ULTIMATE.start_main_~i~0.base) ULTIMATE.start_main_~i~0.offset)_1 + 19 142.04/102.54 Supporting invariants [] 142.04/102.54 [2019-03-28 12:41:19,535 INFO L297 tatePredicateManager]: 10 out of 10 supporting invariants were superfluous and have been removed 142.04/102.54 [2019-03-28 12:41:19,538 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 142.04/102.54 [2019-03-28 12:41:19,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:19,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:19,578 INFO L256 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 2 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:19,580 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:19,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:19,594 INFO L256 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 7 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:19,595 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:19,648 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 142.04/102.54 [2019-03-28 12:41:19,650 INFO L427 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:19,657 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:19,658 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:19,659 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:32, output treesize:17 142.04/102.54 [2019-03-28 12:41:19,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:19,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:19,739 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.54 [2019-03-28 12:41:19,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:19,746 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.54 [2019-03-28 12:41:19,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:19,755 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.54 [2019-03-28 12:41:19,755 INFO L98 LoopCannibalizer]: 4 predicates before loop cannibalization 4 predicates after loop cannibalization 142.04/102.54 [2019-03-28 12:41:19,759 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 4 loop predicates 142.04/102.54 [2019-03-28 12:41:19,760 INFO L69 BuchiDifferenceNCSB]: Start buchiDifferenceNCSB. First operand 20 states and 24 transitions. cyclomatic complexity: 5 Second operand 6 states. 142.04/102.54 [2019-03-28 12:41:19,851 INFO L73 BuchiDifferenceNCSB]: Finished buchiDifferenceNCSB. First operand 20 states and 24 transitions. cyclomatic complexity: 5. Second operand 6 states. Result 36 states and 42 transitions. Complement of second has 10 states. 142.04/102.54 [2019-03-28 12:41:19,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 1 stem states 4 non-accepting loop states 1 accepting loop states 142.04/102.54 [2019-03-28 12:41:19,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. 142.04/102.54 [2019-03-28 12:41:19,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 26 transitions. 142.04/102.54 [2019-03-28 12:41:19,856 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 26 transitions. Stem has 11 letters. Loop has 6 letters. 142.04/102.54 [2019-03-28 12:41:19,856 INFO L116 BuchiAccepts]: Finished buchiAccepts. 142.04/102.54 [2019-03-28 12:41:19,857 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 26 transitions. Stem has 17 letters. Loop has 6 letters. 142.04/102.54 [2019-03-28 12:41:19,857 INFO L116 BuchiAccepts]: Finished buchiAccepts. 142.04/102.54 [2019-03-28 12:41:19,857 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 26 transitions. Stem has 11 letters. Loop has 12 letters. 142.04/102.54 [2019-03-28 12:41:19,858 INFO L116 BuchiAccepts]: Finished buchiAccepts. 142.04/102.54 [2019-03-28 12:41:19,864 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36 states and 42 transitions. 142.04/102.54 [2019-03-28 12:41:19,865 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 23 142.04/102.54 [2019-03-28 12:41:19,866 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36 states to 34 states and 40 transitions. 142.04/102.54 [2019-03-28 12:41:19,866 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 142.04/102.54 [2019-03-28 12:41:19,866 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 142.04/102.54 [2019-03-28 12:41:19,867 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 40 transitions. 142.04/102.54 [2019-03-28 12:41:19,867 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.54 [2019-03-28 12:41:19,867 INFO L706 BuchiCegarLoop]: Abstraction has 34 states and 40 transitions. 142.04/102.54 [2019-03-28 12:41:19,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 40 transitions. 142.04/102.54 [2019-03-28 12:41:19,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 32. 142.04/102.54 [2019-03-28 12:41:19,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. 142.04/102.54 [2019-03-28 12:41:19,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 38 transitions. 142.04/102.54 [2019-03-28 12:41:19,870 INFO L729 BuchiCegarLoop]: Abstraction has 32 states and 38 transitions. 142.04/102.54 [2019-03-28 12:41:19,870 INFO L609 BuchiCegarLoop]: Abstraction has 32 states and 38 transitions. 142.04/102.54 [2019-03-28 12:41:19,870 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ 142.04/102.54 [2019-03-28 12:41:19,870 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 38 transitions. 142.04/102.54 [2019-03-28 12:41:19,871 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 21 142.04/102.54 [2019-03-28 12:41:19,871 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:19,871 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:19,872 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:19,872 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:19,873 INFO L794 eck$LassoCheckResult]: Stem: 317#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 312#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 301#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 297#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 298#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 328#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 327#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 326#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 325#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 324#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 320#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 319#L11-2 142.04/102.54 [2019-03-28 12:41:19,873 INFO L796 eck$LassoCheckResult]: Loop: 319#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 309#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 323#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 322#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 321#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 313#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 314#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 316#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 299#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 300#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 306#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 310#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 302#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 303#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 318#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 319#L11-2 142.04/102.54 [2019-03-28 12:41:19,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:19,874 INFO L82 PathProgramCache]: Analyzing trace with hash -377522803, now seen corresponding path program 3 times 142.04/102.54 [2019-03-28 12:41:19,874 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:19,874 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:19,875 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:19,875 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:19,876 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:19,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:19,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:19,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:19,896 INFO L82 PathProgramCache]: Analyzing trace with hash -51726392, now seen corresponding path program 1 times 142.04/102.54 [2019-03-28 12:41:19,896 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:19,896 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:19,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:19,897 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:19,897 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:19,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:20,043 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:20,044 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.54 [2019-03-28 12:41:20,044 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.54 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.54 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.54 Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.54 [2019-03-28 12:41:20,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:20,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:20,081 INFO L256 TraceCheckSpWp]: Trace formula consists of 70 conjuncts, 11 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:20,083 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:20,088 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 142.04/102.54 [2019-03-28 12:41:20,088 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:20,090 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:20,090 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:20,091 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:1 142.04/102.54 [2019-03-28 12:41:20,140 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:20,140 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 28 treesize of output 61 142.04/102.54 [2019-03-28 12:41:20,149 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:20,192 INFO L497 ElimStorePlain]: treesize reduction 35, result has 51.4 percent of original size 142.04/102.54 [2019-03-28 12:41:20,194 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. 142.04/102.54 [2019-03-28 12:41:20,194 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:28, output treesize:24 142.04/102.54 [2019-03-28 12:41:29,623 WARN L188 SmtUtils]: Spent 2.83 s on a formula simplification. DAG size of input: 18 DAG size of output: 15 142.04/102.54 [2019-03-28 12:41:31,080 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 142.04/102.54 [2019-03-28 12:41:31,080 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:31,086 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:31,087 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:31,087 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:28, output treesize:7 142.04/102.54 [2019-03-28 12:41:31,107 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 142.04/102.54 [2019-03-28 12:41:31,107 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:31,109 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:31,109 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:31,110 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 142.04/102.54 [2019-03-28 12:41:31,123 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:31,151 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.54 [2019-03-28 12:41:31,151 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 11 142.04/102.54 [2019-03-28 12:41:31,151 INFO L811 eck$LassoCheckResult]: loop already infeasible 142.04/102.54 [2019-03-28 12:41:31,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. 142.04/102.54 [2019-03-28 12:41:31,152 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=99, Unknown=4, NotChecked=0, Total=132 142.04/102.54 [2019-03-28 12:41:31,152 INFO L87 Difference]: Start difference. First operand 32 states and 38 transitions. cyclomatic complexity: 7 Second operand 12 states. 142.04/102.54 [2019-03-28 12:41:36,999 WARN L188 SmtUtils]: Spent 1.42 s on a formula simplification that was a NOOP. DAG size: 17 142.04/102.54 [2019-03-28 12:41:38,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.54 [2019-03-28 12:41:38,551 INFO L93 Difference]: Finished difference Result 32 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:38,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. 142.04/102.54 [2019-03-28 12:41:38,554 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:38,555 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:38,556 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:38,556 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 26 142.04/102.54 [2019-03-28 12:41:38,556 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 142.04/102.54 [2019-03-28 12:41:38,556 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:38,556 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.54 [2019-03-28 12:41:38,557 INFO L706 BuchiCegarLoop]: Abstraction has 32 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:38,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:38,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 27. 142.04/102.54 [2019-03-28 12:41:38,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. 142.04/102.54 [2019-03-28 12:41:38,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 32 transitions. 142.04/102.54 [2019-03-28 12:41:38,559 INFO L729 BuchiCegarLoop]: Abstraction has 27 states and 32 transitions. 142.04/102.54 [2019-03-28 12:41:38,559 INFO L609 BuchiCegarLoop]: Abstraction has 27 states and 32 transitions. 142.04/102.54 [2019-03-28 12:41:38,559 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ 142.04/102.54 [2019-03-28 12:41:38,559 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 32 transitions. 142.04/102.54 [2019-03-28 12:41:38,560 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:38,560 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:38,560 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:38,561 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:38,561 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:38,562 INFO L794 eck$LassoCheckResult]: Stem: 441#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 436#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 424#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 422#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 423#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 448#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 447#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 446#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 445#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 444#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 437#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 438#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 431#L9 142.04/102.54 [2019-03-28 12:41:38,562 INFO L796 eck$LassoCheckResult]: Loop: 431#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 434#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 427#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 428#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 442#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 443#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 440#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 425#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 426#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 431#L9 142.04/102.54 [2019-03-28 12:41:38,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:38,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1181695061, now seen corresponding path program 4 times 142.04/102.54 [2019-03-28 12:41:38,563 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:38,563 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:38,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,564 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:38,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:38,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:38,583 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 2 times 142.04/102.54 [2019-03-28 12:41:38,583 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:38,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:38,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,584 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:38,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:38,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:38,596 INFO L82 PathProgramCache]: Analyzing trace with hash 1824429450, now seen corresponding path program 1 times 142.04/102.54 [2019-03-28 12:41:38,596 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:38,596 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:38,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,597 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:38,701 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:38,702 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.54 [2019-03-28 12:41:38,702 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.54 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.54 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.54 Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.54 [2019-03-28 12:41:38,717 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:38,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:38,746 INFO L256 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 16 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:38,747 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:38,778 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.54 [2019-03-28 12:41:38,778 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:38,787 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:38,787 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:38,788 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 142.04/102.54 [2019-03-28 12:41:38,815 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:38,817 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.54 [2019-03-28 12:41:38,818 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:38,828 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:38,829 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:38,829 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:25, output treesize:21 142.04/102.54 [2019-03-28 12:41:38,905 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:38,908 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:38,908 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:38,920 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:38,922 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:38,922 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:38,981 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:38,983 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:38,984 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,014 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:39,015 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,015 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:39,041 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:39,042 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.54 [2019-03-28 12:41:39,043 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,048 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:39,048 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,048 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 142.04/102.54 [2019-03-28 12:41:39,052 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:39,078 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.54 [2019-03-28 12:41:39,079 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 18 142.04/102.54 [2019-03-28 12:41:39,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. 142.04/102.54 [2019-03-28 12:41:39,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 142.04/102.54 [2019-03-28 12:41:39,155 INFO L87 Difference]: Start difference. First operand 27 states and 32 transitions. cyclomatic complexity: 7 Second operand 18 states. 142.04/102.54 [2019-03-28 12:41:39,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.54 [2019-03-28 12:41:39,634 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions. 142.04/102.54 [2019-03-28 12:41:39,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. 142.04/102.54 [2019-03-28 12:41:39,637 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 93 transitions. 142.04/102.54 [2019-03-28 12:41:39,639 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.54 [2019-03-28 12:41:39,640 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 76 states and 83 transitions. 142.04/102.54 [2019-03-28 12:41:39,640 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:39,640 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:39,640 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 83 transitions. 142.04/102.54 [2019-03-28 12:41:39,641 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.54 [2019-03-28 12:41:39,641 INFO L706 BuchiCegarLoop]: Abstraction has 76 states and 83 transitions. 142.04/102.54 [2019-03-28 12:41:39,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 83 transitions. 142.04/102.54 [2019-03-28 12:41:39,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 27. 142.04/102.54 [2019-03-28 12:41:39,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. 142.04/102.54 [2019-03-28 12:41:39,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. 142.04/102.54 [2019-03-28 12:41:39,644 INFO L729 BuchiCegarLoop]: Abstraction has 27 states and 31 transitions. 142.04/102.54 [2019-03-28 12:41:39,644 INFO L609 BuchiCegarLoop]: Abstraction has 27 states and 31 transitions. 142.04/102.54 [2019-03-28 12:41:39,644 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ 142.04/102.54 [2019-03-28 12:41:39,644 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. 142.04/102.54 [2019-03-28 12:41:39,645 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:39,645 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:39,645 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:39,646 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:39,646 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:39,647 INFO L794 eck$LassoCheckResult]: Stem: 663#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 659#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 646#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 644#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 645#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 670#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 669#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 668#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 667#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 664#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 660#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 653#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 654#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 658#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 651#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 652#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 661#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 655#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 656#L9 142.04/102.54 [2019-03-28 12:41:39,647 INFO L796 eck$LassoCheckResult]: Loop: 656#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 657#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 649#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 650#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 666#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 665#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 662#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 647#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 648#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 656#L9 142.04/102.54 [2019-03-28 12:41:39,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:39,647 INFO L82 PathProgramCache]: Analyzing trace with hash 2113159569, now seen corresponding path program 5 times 142.04/102.54 [2019-03-28 12:41:39,648 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:39,648 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:39,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,649 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,649 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:39,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:39,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:39,670 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 3 times 142.04/102.54 [2019-03-28 12:41:39,670 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:39,671 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:39,671 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,671 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,672 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:39,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:39,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:39,682 INFO L82 PathProgramCache]: Analyzing trace with hash -1958366258, now seen corresponding path program 2 times 142.04/102.54 [2019-03-28 12:41:39,683 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:39,683 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:39,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,684 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,684 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:39,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:39,808 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:39,808 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.54 [2019-03-28 12:41:39,808 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.54 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.54 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.54 Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.54 [2019-03-28 12:41:39,821 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 142.04/102.54 [2019-03-28 12:41:39,850 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) 142.04/102.54 [2019-03-28 12:41:39,850 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:39,851 INFO L256 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 17 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:39,853 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:39,877 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.54 [2019-03-28 12:41:39,878 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,885 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:39,885 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,885 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 142.04/102.54 [2019-03-28 12:41:39,910 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:39,912 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.54 [2019-03-28 12:41:39,912 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,921 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:39,922 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:39,922 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:23 142.04/102.54 [2019-03-28 12:41:39,988 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:39,990 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:39,991 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,002 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:40,003 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,003 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.54 [2019-03-28 12:41:40,071 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:40,072 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:40,073 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,085 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:40,086 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,086 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.54 [2019-03-28 12:41:40,161 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:40,162 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:40,163 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,177 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:40,178 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,178 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.54 [2019-03-28 12:41:40,218 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:40,219 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.54 [2019-03-28 12:41:40,220 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,226 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:40,227 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:40,227 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:30, output treesize:3 142.04/102.54 [2019-03-28 12:41:40,232 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:40,261 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.54 [2019-03-28 12:41:40,261 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 23 142.04/102.54 [2019-03-28 12:41:40,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. 142.04/102.54 [2019-03-28 12:41:40,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=391, Unknown=0, NotChecked=0, Total=506 142.04/102.54 [2019-03-28 12:41:40,350 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 6 Second operand 23 states. 142.04/102.54 [2019-03-28 12:41:40,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.54 [2019-03-28 12:41:40,996 INFO L93 Difference]: Finished difference Result 98 states and 105 transitions. 142.04/102.54 [2019-03-28 12:41:40,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. 142.04/102.54 [2019-03-28 12:41:41,000 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 98 states and 105 transitions. 142.04/102.54 [2019-03-28 12:41:41,002 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.54 [2019-03-28 12:41:41,002 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 98 states to 88 states and 95 transitions. 142.04/102.54 [2019-03-28 12:41:41,003 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:41,003 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:41,003 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 95 transitions. 142.04/102.54 [2019-03-28 12:41:41,003 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.54 [2019-03-28 12:41:41,004 INFO L706 BuchiCegarLoop]: Abstraction has 88 states and 95 transitions. 142.04/102.54 [2019-03-28 12:41:41,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 95 transitions. 142.04/102.54 [2019-03-28 12:41:41,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 33. 142.04/102.54 [2019-03-28 12:41:41,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. 142.04/102.54 [2019-03-28 12:41:41,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:41,007 INFO L729 BuchiCegarLoop]: Abstraction has 33 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:41,007 INFO L609 BuchiCegarLoop]: Abstraction has 33 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:41,007 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ 142.04/102.54 [2019-03-28 12:41:41,007 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 37 transitions. 142.04/102.54 [2019-03-28 12:41:41,008 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:41,008 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:41,008 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:41,009 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:41,009 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:41,010 INFO L794 eck$LassoCheckResult]: Stem: 934#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 929#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 917#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 913#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 914#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 941#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 940#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 939#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 938#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 935#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 931#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 926#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 927#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 945#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 944#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 943#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 942#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 928#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 924#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 925#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 920#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 921#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 932#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 933#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 922#L9 142.04/102.54 [2019-03-28 12:41:41,010 INFO L796 eck$LassoCheckResult]: Loop: 922#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 923#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 918#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 919#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 937#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 936#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 930#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 915#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 916#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 922#L9 142.04/102.54 [2019-03-28 12:41:41,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:41,011 INFO L82 PathProgramCache]: Analyzing trace with hash 584542669, now seen corresponding path program 6 times 142.04/102.54 [2019-03-28 12:41:41,011 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:41,011 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:41,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,012 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:41,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:41,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:41,035 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 4 times 142.04/102.54 [2019-03-28 12:41:41,035 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:41,035 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:41,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,036 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:41,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:41,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:41,046 INFO L82 PathProgramCache]: Analyzing trace with hash 1889931026, now seen corresponding path program 3 times 142.04/102.54 [2019-03-28 12:41:41,046 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:41,046 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:41,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,047 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,047 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:41,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:41,232 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:41,233 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.54 [2019-03-28 12:41:41,233 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.54 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.54 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.54 Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.54 [2019-03-28 12:41:41,245 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 142.04/102.54 [2019-03-28 12:41:41,285 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) 142.04/102.54 [2019-03-28 12:41:41,285 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:41,286 INFO L256 TraceCheckSpWp]: Trace formula consists of 168 conjuncts, 20 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:41,288 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:41,309 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.54 [2019-03-28 12:41:41,309 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,315 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:41,316 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,316 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 142.04/102.54 [2019-03-28 12:41:41,339 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:41,340 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.54 [2019-03-28 12:41:41,341 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,350 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:41,350 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,351 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:23 142.04/102.54 [2019-03-28 12:41:41,412 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:41,413 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:41,414 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,425 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:41,426 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,427 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.54 [2019-03-28 12:41:41,495 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:41,496 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:41,497 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,510 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:41,511 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,511 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.54 [2019-03-28 12:41:41,577 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:41,578 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:41,579 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,588 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:41,589 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,589 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.54 [2019-03-28 12:41:41,654 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:41,655 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:41,656 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,665 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:41,666 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,667 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.54 [2019-03-28 12:41:41,695 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:41,696 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.54 [2019-03-28 12:41:41,696 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,701 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:41,702 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:41,702 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:30, output treesize:3 142.04/102.54 [2019-03-28 12:41:41,709 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 5 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:41,736 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.54 [2019-03-28 12:41:41,736 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 14] total 28 142.04/102.54 [2019-03-28 12:41:41,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. 142.04/102.54 [2019-03-28 12:41:41,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=589, Unknown=0, NotChecked=0, Total=756 142.04/102.54 [2019-03-28 12:41:41,825 INFO L87 Difference]: Start difference. First operand 33 states and 37 transitions. cyclomatic complexity: 6 Second operand 28 states. 142.04/102.54 [2019-03-28 12:41:42,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.54 [2019-03-28 12:41:42,557 INFO L93 Difference]: Finished difference Result 110 states and 117 transitions. 142.04/102.54 [2019-03-28 12:41:42,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. 142.04/102.54 [2019-03-28 12:41:42,560 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 110 states and 117 transitions. 142.04/102.54 [2019-03-28 12:41:42,562 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.54 [2019-03-28 12:41:42,563 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 110 states to 100 states and 107 transitions. 142.04/102.54 [2019-03-28 12:41:42,563 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:42,563 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:42,564 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 107 transitions. 142.04/102.54 [2019-03-28 12:41:42,564 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.54 [2019-03-28 12:41:42,564 INFO L706 BuchiCegarLoop]: Abstraction has 100 states and 107 transitions. 142.04/102.54 [2019-03-28 12:41:42,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 107 transitions. 142.04/102.54 [2019-03-28 12:41:42,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 39. 142.04/102.54 [2019-03-28 12:41:42,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. 142.04/102.54 [2019-03-28 12:41:42,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 43 transitions. 142.04/102.54 [2019-03-28 12:41:42,568 INFO L729 BuchiCegarLoop]: Abstraction has 39 states and 43 transitions. 142.04/102.54 [2019-03-28 12:41:42,568 INFO L609 BuchiCegarLoop]: Abstraction has 39 states and 43 transitions. 142.04/102.54 [2019-03-28 12:41:42,568 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ 142.04/102.54 [2019-03-28 12:41:42,568 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 43 transitions. 142.04/102.54 [2019-03-28 12:41:42,569 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:42,569 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:42,569 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:42,570 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:42,570 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:42,571 INFO L794 eck$LassoCheckResult]: Stem: 1256#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 1251#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 1237#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 1235#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 1236#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1265#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1264#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1263#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1262#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1257#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1252#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1244#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1245#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1272#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1268#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1269#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1253#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1254#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1273#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1270#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1271#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1258#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1259#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1246#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1247#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1250#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1242#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1243#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1267#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1266#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1248#L9 142.04/102.54 [2019-03-28 12:41:42,572 INFO L796 eck$LassoCheckResult]: Loop: 1248#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1249#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1240#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1241#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1261#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1260#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 1255#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 1238#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1239#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1248#L9 142.04/102.54 [2019-03-28 12:41:42,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:42,572 INFO L82 PathProgramCache]: Analyzing trace with hash -1330481911, now seen corresponding path program 7 times 142.04/102.54 [2019-03-28 12:41:42,572 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:42,572 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:42,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,573 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:42,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:42,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:42,599 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 5 times 142.04/102.54 [2019-03-28 12:41:42,599 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:42,599 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:42,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:42,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:42,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:42,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1304565930, now seen corresponding path program 4 times 142.04/102.54 [2019-03-28 12:41:42,610 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:42,610 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:42,611 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,611 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,611 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:42,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:42,826 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 6 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:42,827 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.54 [2019-03-28 12:41:42,827 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.54 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.54 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.54 Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.54 [2019-03-28 12:41:42,842 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST 142.04/102.54 [2019-03-28 12:41:42,894 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) 142.04/102.54 [2019-03-28 12:41:42,894 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:42,896 INFO L256 TraceCheckSpWp]: Trace formula consists of 190 conjuncts, 25 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:42,898 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:42,936 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.54 [2019-03-28 12:41:42,937 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:42,943 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:42,944 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:42,944 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 142.04/102.54 [2019-03-28 12:41:42,970 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:42,971 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.54 [2019-03-28 12:41:42,971 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:42,979 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:42,980 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:42,981 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:25, output treesize:21 142.04/102.54 [2019-03-28 12:41:43,043 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:43,044 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:43,045 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,058 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:43,059 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,059 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:43,125 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:43,127 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:43,128 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,139 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:43,140 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,140 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:43,221 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:43,223 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:43,224 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,235 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:43,236 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,237 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:43,301 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:43,302 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:43,303 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,314 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:43,314 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,315 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:43,378 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:43,380 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:43,380 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,389 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:43,390 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,390 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:43,419 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:43,420 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.54 [2019-03-28 12:41:43,420 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,425 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:43,425 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:43,425 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 142.04/102.54 [2019-03-28 12:41:43,445 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 6 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:43,471 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.54 [2019-03-28 12:41:43,472 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 16] total 33 142.04/102.54 [2019-03-28 12:41:43,541 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. 142.04/102.54 [2019-03-28 12:41:43,542 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=229, Invalid=827, Unknown=0, NotChecked=0, Total=1056 142.04/102.54 [2019-03-28 12:41:43,543 INFO L87 Difference]: Start difference. First operand 39 states and 43 transitions. cyclomatic complexity: 6 Second operand 33 states. 142.04/102.54 [2019-03-28 12:41:44,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.54 [2019-03-28 12:41:44,492 INFO L93 Difference]: Finished difference Result 122 states and 129 transitions. 142.04/102.54 [2019-03-28 12:41:44,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. 142.04/102.54 [2019-03-28 12:41:44,495 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 122 states and 129 transitions. 142.04/102.54 [2019-03-28 12:41:44,497 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.54 [2019-03-28 12:41:44,498 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 122 states to 112 states and 119 transitions. 142.04/102.54 [2019-03-28 12:41:44,498 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:44,498 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.54 [2019-03-28 12:41:44,498 INFO L73 IsDeterministic]: Start isDeterministic. Operand 112 states and 119 transitions. 142.04/102.54 [2019-03-28 12:41:44,498 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.54 [2019-03-28 12:41:44,498 INFO L706 BuchiCegarLoop]: Abstraction has 112 states and 119 transitions. 142.04/102.54 [2019-03-28 12:41:44,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states and 119 transitions. 142.04/102.54 [2019-03-28 12:41:44,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 45. 142.04/102.54 [2019-03-28 12:41:44,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. 142.04/102.54 [2019-03-28 12:41:44,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 49 transitions. 142.04/102.54 [2019-03-28 12:41:44,502 INFO L729 BuchiCegarLoop]: Abstraction has 45 states and 49 transitions. 142.04/102.54 [2019-03-28 12:41:44,502 INFO L609 BuchiCegarLoop]: Abstraction has 45 states and 49 transitions. 142.04/102.54 [2019-03-28 12:41:44,502 INFO L442 BuchiCegarLoop]: ======== Iteration 8============ 142.04/102.54 [2019-03-28 12:41:44,502 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 49 transitions. 142.04/102.54 [2019-03-28 12:41:44,503 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.54 [2019-03-28 12:41:44,503 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.54 [2019-03-28 12:41:44,503 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.54 [2019-03-28 12:41:44,504 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:44,504 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.54 [2019-03-28 12:41:44,505 INFO L794 eck$LassoCheckResult]: Stem: 1631#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 1626#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 1614#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 1610#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 1611#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1639#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1638#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1637#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1636#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1632#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1627#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1623#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1621#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1622#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1617#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1618#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1652#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1624#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1625#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1654#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1653#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1633#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1628#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1629#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1651#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1650#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1649#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1648#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1647#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1646#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1641#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1645#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1644#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1643#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1642#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1640#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1619#L9 142.04/102.54 [2019-03-28 12:41:44,506 INFO L796 eck$LassoCheckResult]: Loop: 1619#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1620#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1615#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 1616#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1635#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 1634#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 1630#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 1612#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1613#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 1619#L9 142.04/102.54 [2019-03-28 12:41:44,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:44,506 INFO L82 PathProgramCache]: Analyzing trace with hash 2026840901, now seen corresponding path program 8 times 142.04/102.54 [2019-03-28 12:41:44,507 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:44,507 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:44,507 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,508 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,508 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:44,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:44,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:44,533 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 6 times 142.04/102.54 [2019-03-28 12:41:44,533 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:44,533 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:44,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,534 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,534 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:44,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.54 [2019-03-28 12:41:44,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.54 [2019-03-28 12:41:44,543 INFO L82 PathProgramCache]: Analyzing trace with hash 1975221402, now seen corresponding path program 5 times 142.04/102.54 [2019-03-28 12:41:44,544 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.54 [2019-03-28 12:41:44,544 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.54 [2019-03-28 12:41:44,544 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,544 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.54 [2019-03-28 12:41:44,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:44,813 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 7 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:44,814 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.54 [2019-03-28 12:41:44,814 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.54 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.54 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.54 Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.54 [2019-03-28 12:41:44,828 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 142.04/102.54 [2019-03-28 12:41:44,871 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) 142.04/102.54 [2019-03-28 12:41:44,872 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 142.04/102.54 [2019-03-28 12:41:44,873 INFO L256 TraceCheckSpWp]: Trace formula consists of 222 conjuncts, 28 conjunts are in the unsatisfiable core 142.04/102.54 [2019-03-28 12:41:44,876 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.54 [2019-03-28 12:41:44,896 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.54 [2019-03-28 12:41:44,897 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:44,903 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:44,903 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:44,903 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 142.04/102.54 [2019-03-28 12:41:44,927 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:44,928 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.54 [2019-03-28 12:41:44,929 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:44,936 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:44,936 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:44,936 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:25, output treesize:21 142.04/102.54 [2019-03-28 12:41:44,995 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:44,996 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:44,997 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,006 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:45,007 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,007 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:45,077 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:45,079 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:45,079 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,088 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:45,089 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,090 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:45,154 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:45,156 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:45,156 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,166 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:45,167 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,167 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:45,235 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:45,237 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:45,237 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,247 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:45,248 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,248 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:45,314 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:45,316 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:45,316 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,325 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:45,326 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,326 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:45,388 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:45,389 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.54 [2019-03-28 12:41:45,390 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,398 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:45,399 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,399 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.54 [2019-03-28 12:41:45,430 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.54 [2019-03-28 12:41:45,430 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.54 [2019-03-28 12:41:45,431 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,435 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.54 [2019-03-28 12:41:45,435 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.54 [2019-03-28 12:41:45,436 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 142.04/102.54 [2019-03-28 12:41:45,447 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 7 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.54 [2019-03-28 12:41:45,473 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.54 [2019-03-28 12:41:45,474 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18] total 38 142.04/102.54 [2019-03-28 12:41:45,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. 142.04/102.54 [2019-03-28 12:41:45,546 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=301, Invalid=1105, Unknown=0, NotChecked=0, Total=1406 142.04/102.54 [2019-03-28 12:41:45,547 INFO L87 Difference]: Start difference. First operand 45 states and 49 transitions. cyclomatic complexity: 6 Second operand 38 states. 142.04/102.54 [2019-03-28 12:41:46,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.54 [2019-03-28 12:41:46,764 INFO L93 Difference]: Finished difference Result 134 states and 141 transitions. 142.04/102.54 [2019-03-28 12:41:46,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. 142.04/102.54 [2019-03-28 12:41:46,767 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 134 states and 141 transitions. 142.04/102.54 [2019-03-28 12:41:46,768 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.54 [2019-03-28 12:41:46,769 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 134 states to 124 states and 131 transitions. 142.04/102.54 [2019-03-28 12:41:46,770 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:46,770 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:46,770 INFO L73 IsDeterministic]: Start isDeterministic. Operand 124 states and 131 transitions. 142.04/102.55 [2019-03-28 12:41:46,770 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.55 [2019-03-28 12:41:46,771 INFO L706 BuchiCegarLoop]: Abstraction has 124 states and 131 transitions. 142.04/102.55 [2019-03-28 12:41:46,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states and 131 transitions. 142.04/102.55 [2019-03-28 12:41:46,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 51. 142.04/102.55 [2019-03-28 12:41:46,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. 142.04/102.55 [2019-03-28 12:41:46,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 55 transitions. 142.04/102.55 [2019-03-28 12:41:46,774 INFO L729 BuchiCegarLoop]: Abstraction has 51 states and 55 transitions. 142.04/102.55 [2019-03-28 12:41:46,774 INFO L609 BuchiCegarLoop]: Abstraction has 51 states and 55 transitions. 142.04/102.55 [2019-03-28 12:41:46,774 INFO L442 BuchiCegarLoop]: ======== Iteration 9============ 142.04/102.55 [2019-03-28 12:41:46,774 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 55 transitions. 142.04/102.55 [2019-03-28 12:41:46,775 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.55 [2019-03-28 12:41:46,775 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.55 [2019-03-28 12:41:46,775 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.55 [2019-03-28 12:41:46,776 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:46,776 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:46,782 INFO L794 eck$LassoCheckResult]: Stem: 2058#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 2054#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 2040#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 2038#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 2039#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2066#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2065#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2064#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2063#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2059#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2055#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2047#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2048#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2088#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2087#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2060#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2056#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2049#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2050#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2053#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2045#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2046#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2086#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2085#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2084#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2083#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2082#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2081#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2080#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2079#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2078#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2077#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2076#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2075#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2074#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2073#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2068#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2072#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2071#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2070#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2069#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2067#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2051#L9 142.04/102.55 [2019-03-28 12:41:46,782 INFO L796 eck$LassoCheckResult]: Loop: 2051#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2052#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2043#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2044#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2062#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2061#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 2057#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 2041#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2042#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2051#L9 142.04/102.55 [2019-03-28 12:41:46,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:46,783 INFO L82 PathProgramCache]: Analyzing trace with hash -1641597823, now seen corresponding path program 9 times 142.04/102.55 [2019-03-28 12:41:46,783 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:46,783 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:46,784 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,784 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,784 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:46,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:46,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:46,811 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 7 times 142.04/102.55 [2019-03-28 12:41:46,812 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:46,812 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:46,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,813 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:46,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:46,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:46,821 INFO L82 PathProgramCache]: Analyzing trace with hash -182645026, now seen corresponding path program 6 times 142.04/102.55 [2019-03-28 12:41:46,821 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:46,822 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:46,822 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,822 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,823 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:46,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:47,121 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 8 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:47,121 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.55 [2019-03-28 12:41:47,121 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.55 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.55 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.55 Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.55 [2019-03-28 12:41:47,133 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE 142.04/102.55 [2019-03-28 12:41:47,208 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) 142.04/102.55 [2019-03-28 12:41:47,208 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:47,210 INFO L256 TraceCheckSpWp]: Trace formula consists of 249 conjuncts, 29 conjunts are in the unsatisfiable core 142.04/102.55 [2019-03-28 12:41:47,212 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.55 [2019-03-28 12:41:47,250 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.55 [2019-03-28 12:41:47,251 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,257 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,258 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,258 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 142.04/102.55 [2019-03-28 12:41:47,283 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,284 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.55 [2019-03-28 12:41:47,285 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,292 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,293 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,293 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,352 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,354 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:47,354 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,363 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,364 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,365 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,430 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,431 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:47,431 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,440 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,441 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,441 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,506 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,508 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:47,508 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,518 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,519 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,519 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,586 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,587 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:47,588 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,597 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,598 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,598 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,666 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,667 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:47,668 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,678 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,679 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,679 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,761 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,762 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:47,763 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,780 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,781 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,781 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,864 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,865 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:47,866 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,879 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,880 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,880 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:47,920 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:47,921 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.55 [2019-03-28 12:41:47,922 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,927 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:47,928 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:47,928 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:30, output treesize:3 142.04/102.55 [2019-03-28 12:41:47,949 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 8 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:47,976 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.55 [2019-03-28 12:41:47,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 20] total 43 142.04/102.55 [2019-03-28 12:41:48,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. 142.04/102.55 [2019-03-28 12:41:48,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=383, Invalid=1423, Unknown=0, NotChecked=0, Total=1806 142.04/102.55 [2019-03-28 12:41:48,079 INFO L87 Difference]: Start difference. First operand 51 states and 55 transitions. cyclomatic complexity: 6 Second operand 43 states. 142.04/102.55 [2019-03-28 12:41:49,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.55 [2019-03-28 12:41:49,520 INFO L93 Difference]: Finished difference Result 146 states and 153 transitions. 142.04/102.55 [2019-03-28 12:41:49,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. 142.04/102.55 [2019-03-28 12:41:49,523 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 146 states and 153 transitions. 142.04/102.55 [2019-03-28 12:41:49,525 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.55 [2019-03-28 12:41:49,526 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 146 states to 136 states and 143 transitions. 142.04/102.55 [2019-03-28 12:41:49,526 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:49,526 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:49,526 INFO L73 IsDeterministic]: Start isDeterministic. Operand 136 states and 143 transitions. 142.04/102.55 [2019-03-28 12:41:49,527 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.55 [2019-03-28 12:41:49,527 INFO L706 BuchiCegarLoop]: Abstraction has 136 states and 143 transitions. 142.04/102.55 [2019-03-28 12:41:49,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states and 143 transitions. 142.04/102.55 [2019-03-28 12:41:49,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 57. 142.04/102.55 [2019-03-28 12:41:49,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. 142.04/102.55 [2019-03-28 12:41:49,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 61 transitions. 142.04/102.55 [2019-03-28 12:41:49,530 INFO L729 BuchiCegarLoop]: Abstraction has 57 states and 61 transitions. 142.04/102.55 [2019-03-28 12:41:49,530 INFO L609 BuchiCegarLoop]: Abstraction has 57 states and 61 transitions. 142.04/102.55 [2019-03-28 12:41:49,530 INFO L442 BuchiCegarLoop]: ======== Iteration 10============ 142.04/102.55 [2019-03-28 12:41:49,531 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 61 transitions. 142.04/102.55 [2019-03-28 12:41:49,531 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.55 [2019-03-28 12:41:49,531 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.55 [2019-03-28 12:41:49,531 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.55 [2019-03-28 12:41:49,532 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:49,532 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:49,534 INFO L794 eck$LassoCheckResult]: Stem: 2539#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 2535#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 2523#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 2519#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 2520#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2547#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2546#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2545#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2544#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2540#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2536#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2528#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2529#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2575#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2574#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2541#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2537#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2530#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2531#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2534#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2526#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2527#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2573#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2572#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2571#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2570#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2569#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2568#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2567#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2566#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2565#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2564#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2563#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2562#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2561#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2560#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2559#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2558#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2557#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2556#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2555#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2554#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2549#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2553#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2552#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2551#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2550#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2548#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2532#L9 142.04/102.55 [2019-03-28 12:41:49,535 INFO L796 eck$LassoCheckResult]: Loop: 2532#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2533#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2524#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 2525#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2543#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 2542#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 2538#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 2521#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2522#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 2532#L9 142.04/102.55 [2019-03-28 12:41:49,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:49,535 INFO L82 PathProgramCache]: Analyzing trace with hash 291793085, now seen corresponding path program 10 times 142.04/102.55 [2019-03-28 12:41:49,535 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:49,535 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:49,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,536 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,537 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:49,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:49,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:49,565 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 8 times 142.04/102.55 [2019-03-28 12:41:49,565 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:49,565 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:49,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,566 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,566 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:49,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:49,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:49,575 INFO L82 PathProgramCache]: Analyzing trace with hash 45145634, now seen corresponding path program 7 times 142.04/102.55 [2019-03-28 12:41:49,575 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:49,575 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:49,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,576 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,576 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:49,928 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 9 proven. 168 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:49,928 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.55 [2019-03-28 12:41:49,929 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.55 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.55 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.55 Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.55 [2019-03-28 12:41:49,941 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:49,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:49,977 INFO L256 TraceCheckSpWp]: Trace formula consists of 276 conjuncts, 34 conjunts are in the unsatisfiable core 142.04/102.55 [2019-03-28 12:41:49,979 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.55 [2019-03-28 12:41:50,001 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.55 [2019-03-28 12:41:50,002 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,007 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,007 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,007 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 142.04/102.55 [2019-03-28 12:41:50,031 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,032 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.55 [2019-03-28 12:41:50,032 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,039 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,039 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,039 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:25, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,094 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,095 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,096 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,104 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,105 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,105 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,174 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,176 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,176 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,187 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,188 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,188 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,258 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,259 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,260 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,269 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,270 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,270 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,346 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,347 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,348 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,362 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,363 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,363 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,454 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,455 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,456 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,467 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,467 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,468 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,558 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,563 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,563 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,576 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,577 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,577 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,660 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,662 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,662 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,672 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,673 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,673 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,749 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,750 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:50,751 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,772 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,773 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,773 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:41, output treesize:21 142.04/102.55 [2019-03-28 12:41:50,810 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:50,811 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.55 [2019-03-28 12:41:50,811 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,817 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:50,818 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:50,818 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 142.04/102.55 [2019-03-28 12:41:50,836 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 9 proven. 168 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:50,863 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.55 [2019-03-28 12:41:50,863 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 22] total 48 142.04/102.55 [2019-03-28 12:41:50,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. 142.04/102.55 [2019-03-28 12:41:50,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=475, Invalid=1781, Unknown=0, NotChecked=0, Total=2256 142.04/102.55 [2019-03-28 12:41:50,940 INFO L87 Difference]: Start difference. First operand 57 states and 61 transitions. cyclomatic complexity: 6 Second operand 48 states. 142.04/102.55 [2019-03-28 12:41:52,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.55 [2019-03-28 12:41:52,714 INFO L93 Difference]: Finished difference Result 158 states and 165 transitions. 142.04/102.55 [2019-03-28 12:41:52,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. 142.04/102.55 [2019-03-28 12:41:52,717 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 158 states and 165 transitions. 142.04/102.55 [2019-03-28 12:41:52,718 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.55 [2019-03-28 12:41:52,719 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 158 states to 148 states and 155 transitions. 142.04/102.55 [2019-03-28 12:41:52,719 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:52,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:52,720 INFO L73 IsDeterministic]: Start isDeterministic. Operand 148 states and 155 transitions. 142.04/102.55 [2019-03-28 12:41:52,720 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.55 [2019-03-28 12:41:52,720 INFO L706 BuchiCegarLoop]: Abstraction has 148 states and 155 transitions. 142.04/102.55 [2019-03-28 12:41:52,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states and 155 transitions. 142.04/102.55 [2019-03-28 12:41:52,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 63. 142.04/102.55 [2019-03-28 12:41:52,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. 142.04/102.55 [2019-03-28 12:41:52,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 67 transitions. 142.04/102.55 [2019-03-28 12:41:52,724 INFO L729 BuchiCegarLoop]: Abstraction has 63 states and 67 transitions. 142.04/102.55 [2019-03-28 12:41:52,724 INFO L609 BuchiCegarLoop]: Abstraction has 63 states and 67 transitions. 142.04/102.55 [2019-03-28 12:41:52,724 INFO L442 BuchiCegarLoop]: ======== Iteration 11============ 142.04/102.55 [2019-03-28 12:41:52,724 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 67 transitions. 142.04/102.55 [2019-03-28 12:41:52,725 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.55 [2019-03-28 12:41:52,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.55 [2019-03-28 12:41:52,725 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.55 [2019-03-28 12:41:52,726 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:52,726 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:52,727 INFO L794 eck$LassoCheckResult]: Stem: 3073#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 3069#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 3057#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 3053#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 3054#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3081#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3080#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3079#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3078#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3074#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3070#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3062#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3063#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3115#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3114#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3075#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3071#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3064#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3065#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3068#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3060#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3061#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3113#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3112#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3111#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3110#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3109#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3108#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3107#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3106#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3105#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3104#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3103#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3102#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3101#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3100#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3099#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3098#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3097#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3096#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3095#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3094#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3093#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3092#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3091#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3090#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3089#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3088#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3083#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3087#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3086#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3085#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3084#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3082#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3066#L9 142.04/102.55 [2019-03-28 12:41:52,728 INFO L796 eck$LassoCheckResult]: Loop: 3066#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3067#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3058#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3059#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3077#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3076#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 3072#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 3055#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3056#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3066#L9 142.04/102.55 [2019-03-28 12:41:52,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:52,728 INFO L82 PathProgramCache]: Analyzing trace with hash -1931444231, now seen corresponding path program 11 times 142.04/102.55 [2019-03-28 12:41:52,728 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:52,729 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:52,729 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,730 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:52,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:52,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:52,759 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 9 times 142.04/102.55 [2019-03-28 12:41:52,760 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:52,760 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:52,760 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,761 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:52,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:52,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:52,768 INFO L82 PathProgramCache]: Analyzing trace with hash -1927992730, now seen corresponding path program 8 times 142.04/102.55 [2019-03-28 12:41:52,768 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:52,769 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:52,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,769 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,769 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:52,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:53,168 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 10 proven. 216 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:53,168 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.55 [2019-03-28 12:41:53,185 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.55 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.55 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.55 Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.55 [2019-03-28 12:41:53,197 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 142.04/102.55 [2019-03-28 12:41:53,239 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) 142.04/102.55 [2019-03-28 12:41:53,239 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:53,241 INFO L256 TraceCheckSpWp]: Trace formula consists of 303 conjuncts, 35 conjunts are in the unsatisfiable core 142.04/102.55 [2019-03-28 12:41:53,243 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.55 [2019-03-28 12:41:53,268 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.55 [2019-03-28 12:41:53,269 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,275 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,276 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,276 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 142.04/102.55 [2019-03-28 12:41:53,304 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,305 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.55 [2019-03-28 12:41:53,305 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,312 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,313 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,313 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,374 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,375 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,376 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,385 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,386 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,386 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,461 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,462 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,462 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,471 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,471 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,472 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,535 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,536 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,536 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,546 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,547 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,547 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,620 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,621 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,621 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,632 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,633 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,633 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,721 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,722 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,723 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,732 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,732 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,732 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,811 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,812 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,813 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,823 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,824 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,824 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,901 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,903 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,903 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,912 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,912 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,912 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:53,984 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:53,985 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:53,985 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,994 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:53,994 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:53,994 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:54,067 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:54,068 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:54,068 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:54,077 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:54,078 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:54,078 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:54,112 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:54,113 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.55 [2019-03-28 12:41:54,113 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:54,118 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:54,118 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:54,118 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:30, output treesize:3 142.04/102.55 [2019-03-28 12:41:54,144 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 10 proven. 216 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:54,171 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.55 [2019-03-28 12:41:54,171 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 24] total 53 142.04/102.55 [2019-03-28 12:41:54,243 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. 142.04/102.55 [2019-03-28 12:41:54,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=577, Invalid=2179, Unknown=0, NotChecked=0, Total=2756 142.04/102.55 [2019-03-28 12:41:54,244 INFO L87 Difference]: Start difference. First operand 63 states and 67 transitions. cyclomatic complexity: 6 Second operand 53 states. 142.04/102.55 [2019-03-28 12:41:56,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.55 [2019-03-28 12:41:56,245 INFO L93 Difference]: Finished difference Result 170 states and 177 transitions. 142.04/102.55 [2019-03-28 12:41:56,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. 142.04/102.55 [2019-03-28 12:41:56,248 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 170 states and 177 transitions. 142.04/102.55 [2019-03-28 12:41:56,249 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.55 [2019-03-28 12:41:56,250 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 170 states to 160 states and 167 transitions. 142.04/102.55 [2019-03-28 12:41:56,251 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:56,251 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.55 [2019-03-28 12:41:56,251 INFO L73 IsDeterministic]: Start isDeterministic. Operand 160 states and 167 transitions. 142.04/102.55 [2019-03-28 12:41:56,251 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.55 [2019-03-28 12:41:56,251 INFO L706 BuchiCegarLoop]: Abstraction has 160 states and 167 transitions. 142.04/102.55 [2019-03-28 12:41:56,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states and 167 transitions. 142.04/102.55 [2019-03-28 12:41:56,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 69. 142.04/102.55 [2019-03-28 12:41:56,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. 142.04/102.55 [2019-03-28 12:41:56,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 73 transitions. 142.04/102.55 [2019-03-28 12:41:56,255 INFO L729 BuchiCegarLoop]: Abstraction has 69 states and 73 transitions. 142.04/102.55 [2019-03-28 12:41:56,255 INFO L609 BuchiCegarLoop]: Abstraction has 69 states and 73 transitions. 142.04/102.55 [2019-03-28 12:41:56,255 INFO L442 BuchiCegarLoop]: ======== Iteration 12============ 142.04/102.55 [2019-03-28 12:41:56,255 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 73 transitions. 142.04/102.55 [2019-03-28 12:41:56,256 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.55 [2019-03-28 12:41:56,256 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.55 [2019-03-28 12:41:56,256 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.55 [2019-03-28 12:41:56,257 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:56,257 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:41:56,259 INFO L794 eck$LassoCheckResult]: Stem: 3660#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 3656#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 3642#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 3640#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 3641#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3668#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3667#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3666#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3665#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3661#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3657#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3649#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3650#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3708#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3707#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3662#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3658#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3651#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3652#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3655#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3647#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3648#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3706#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3705#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3704#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3703#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3702#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3701#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3700#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3699#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3698#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3697#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3696#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3695#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3694#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3693#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3692#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3691#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3690#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3689#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3688#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3687#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3686#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3685#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3684#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3683#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3682#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3681#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3680#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3679#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3678#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3677#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3676#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3675#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3670#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3674#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3673#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3672#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3671#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3669#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3653#L9 142.04/102.55 [2019-03-28 12:41:56,259 INFO L796 eck$LassoCheckResult]: Loop: 3653#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3654#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3645#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 3646#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3664#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 3663#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 3659#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 3643#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3644#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 3653#L9 142.04/102.55 [2019-03-28 12:41:56,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:56,260 INFO L82 PathProgramCache]: Analyzing trace with hash -1868219851, now seen corresponding path program 12 times 142.04/102.55 [2019-03-28 12:41:56,260 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:56,260 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:56,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,261 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,261 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:56,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:56,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:56,294 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 10 times 142.04/102.55 [2019-03-28 12:41:56,294 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:56,294 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:56,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,295 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:56,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:41:56,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:41:56,303 INFO L82 PathProgramCache]: Analyzing trace with hash 590885802, now seen corresponding path program 9 times 142.04/102.55 [2019-03-28 12:41:56,303 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:41:56,303 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:41:56,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,304 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:41:56,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:56,759 INFO L134 CoverageAnalysis]: Checked inductivity of 281 backedges. 11 proven. 270 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:56,760 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 142.04/102.55 [2019-03-28 12:41:56,760 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 142.04/102.55 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 142.04/102.55 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 142.04/102.55 Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 142.04/102.55 [2019-03-28 12:41:56,772 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 142.04/102.55 [2019-03-28 12:41:56,898 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) 142.04/102.55 [2019-03-28 12:41:56,899 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:41:56,901 INFO L256 TraceCheckSpWp]: Trace formula consists of 330 conjuncts, 38 conjunts are in the unsatisfiable core 142.04/102.55 [2019-03-28 12:41:56,903 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.55 [2019-03-28 12:41:56,925 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.55 [2019-03-28 12:41:56,925 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:56,930 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:56,931 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:56,931 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 142.04/102.55 [2019-03-28 12:41:56,956 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:56,957 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.55 [2019-03-28 12:41:56,958 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:56,964 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:56,964 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:56,965 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,023 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,024 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,024 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,032 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,033 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,033 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,095 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,096 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,096 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,105 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,105 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,105 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,168 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,169 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,170 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,178 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,179 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,179 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,354 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,355 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,356 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,364 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,364 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,365 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,435 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,436 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,436 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,445 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,445 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,445 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,518 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,519 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,519 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,528 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,529 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,529 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,616 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,617 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,617 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,628 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,629 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,629 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,712 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,713 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,713 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,723 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,723 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,723 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,804 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,805 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,806 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,816 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,817 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,817 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,902 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,903 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:41:57,903 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,912 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,913 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,913 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:43, output treesize:23 142.04/102.55 [2019-03-28 12:41:57,951 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:41:57,952 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 142.04/102.55 [2019-03-28 12:41:57,952 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,957 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:41:57,958 INFO L427 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:41:57,958 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:30, output treesize:3 142.04/102.55 [2019-03-28 12:41:57,987 INFO L134 CoverageAnalysis]: Checked inductivity of 281 backedges. 11 proven. 270 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:41:58,015 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 142.04/102.55 [2019-03-28 12:41:58,015 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 26] total 58 142.04/102.55 [2019-03-28 12:41:58,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. 142.04/102.55 [2019-03-28 12:41:58,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=689, Invalid=2617, Unknown=0, NotChecked=0, Total=3306 142.04/102.55 [2019-03-28 12:41:58,091 INFO L87 Difference]: Start difference. First operand 69 states and 73 transitions. cyclomatic complexity: 6 Second operand 58 states. 142.04/102.55 [2019-03-28 12:42:00,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 142.04/102.55 [2019-03-28 12:42:00,318 INFO L93 Difference]: Finished difference Result 182 states and 189 transitions. 142.04/102.55 [2019-03-28 12:42:00,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. 142.04/102.55 [2019-03-28 12:42:00,321 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 182 states and 189 transitions. 142.04/102.55 [2019-03-28 12:42:00,323 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 142.04/102.55 [2019-03-28 12:42:00,324 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 182 states to 172 states and 179 transitions. 142.04/102.55 [2019-03-28 12:42:00,324 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 142.04/102.55 [2019-03-28 12:42:00,324 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 142.04/102.55 [2019-03-28 12:42:00,324 INFO L73 IsDeterministic]: Start isDeterministic. Operand 172 states and 179 transitions. 142.04/102.55 [2019-03-28 12:42:00,325 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 142.04/102.55 [2019-03-28 12:42:00,325 INFO L706 BuchiCegarLoop]: Abstraction has 172 states and 179 transitions. 142.04/102.55 [2019-03-28 12:42:00,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states and 179 transitions. 142.04/102.55 [2019-03-28 12:42:00,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 75. 142.04/102.55 [2019-03-28 12:42:00,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. 142.04/102.55 [2019-03-28 12:42:00,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 79 transitions. 142.04/102.55 [2019-03-28 12:42:00,328 INFO L729 BuchiCegarLoop]: Abstraction has 75 states and 79 transitions. 142.04/102.55 [2019-03-28 12:42:00,328 INFO L609 BuchiCegarLoop]: Abstraction has 75 states and 79 transitions. 142.04/102.55 [2019-03-28 12:42:00,328 INFO L442 BuchiCegarLoop]: ======== Iteration 13============ 142.04/102.55 [2019-03-28 12:42:00,329 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 79 transitions. 142.04/102.55 [2019-03-28 12:42:00,329 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 142.04/102.55 [2019-03-28 12:42:00,329 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 142.04/102.55 [2019-03-28 12:42:00,329 INFO L119 BuchiIsEmpty]: Starting construction of run 142.04/102.55 [2019-03-28 12:42:00,330 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:42:00,330 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 142.04/102.55 [2019-03-28 12:42:00,332 INFO L794 eck$LassoCheckResult]: Stem: 4300#ULTIMATE.startENTRY [93] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0) (= |v_#valid_1| (store |v_#valid_2| 0 0))) InVars {#valid=|v_#valid_2|} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] 4296#L-1 [121] L-1-->L7: Formula: (let ((.cse0 (store |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1| 1))) (and (= 0 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= 0 (select |v_#valid_5| |v_ULTIMATE.start_main_#t~malloc0.base_1|)) (= v_ULTIMATE.start_main_~c~0.base_1 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (< |v_ULTIMATE.start_main_#t~malloc0.base_1| |v_#StackHeapBarrier_1|) (= v_ULTIMATE.start_main_~i~0.base_1 |v_ULTIMATE.start_main_#t~malloc0.base_1|) (< |v_ULTIMATE.start_main_#t~malloc1.base_1| |v_#StackHeapBarrier_1|) (= |v_#length_1| (store (store |v_#length_3| |v_ULTIMATE.start_main_#t~malloc0.base_1| 4) |v_ULTIMATE.start_main_#t~malloc1.base_1| 4)) (= 0 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1| 1) |v_#valid_3|) (= (select .cse0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) 0) (= v_ULTIMATE.start_main_~i~0.offset_1 |v_ULTIMATE.start_main_#t~malloc0.offset_1|) (= v_ULTIMATE.start_main_~c~0.offset_1 |v_ULTIMATE.start_main_#t~malloc1.offset_1|) (> 0 |v_ULTIMATE.start_main_#t~malloc1.base_1|) (> |v_ULTIMATE.start_main_#t~malloc0.base_1| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_3|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_1, ULTIMATE.start_main_#t~malloc1.offset=|v_ULTIMATE.start_main_#t~malloc1.offset_1|, ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_1, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_1, ULTIMATE.start_main_#t~malloc0.offset=|v_ULTIMATE.start_main_#t~malloc0.offset_1|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_1|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_1|, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_1, ULTIMATE.start_main_#t~malloc0.base=|v_ULTIMATE.start_main_#t~malloc0.base_1|, ULTIMATE.start_main_#t~malloc1.base=|v_ULTIMATE.start_main_#t~malloc1.base_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_#t~mem8=|v_ULTIMATE.start_main_#t~mem8_1|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|, #valid=|v_#valid_3|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_1|, #length=|v_#length_1|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_1|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_1|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0.offset, ULTIMATE.start_main_#t~malloc1.offset, ULTIMATE.start_main_~c~0.base, ULTIMATE.start_main_~i~0.base, ULTIMATE.start_main_#t~malloc0.offset, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_~c~0.offset, ULTIMATE.start_main_#t~malloc0.base, ULTIMATE.start_main_#t~malloc1.base, ULTIMATE.start_main_#t~mem8, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~mem2, #length, ULTIMATE.start_main_#t~mem6, ULTIMATE.start_main_#t~mem5, ULTIMATE.start_main_#t~mem3] 4282#L7 [61] L7-->L7-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_4 4) (select |v_#length_4| v_ULTIMATE.start_main_~i~0.base_4)) (= 1 (select |v_#valid_6| v_ULTIMATE.start_main_~i~0.base_4)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_4) (= |v_#memory_int_1| (store |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4 (store (select |v_#memory_int_2| v_ULTIMATE.start_main_~i~0.base_4) v_ULTIMATE.start_main_~i~0.offset_4 0)))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_4, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_4, #length=|v_#length_4|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[#memory_int] 4280#L7-1 [55] L7-1-->L9-2: Formula: (and (<= (+ v_ULTIMATE.start_main_~c~0.offset_4 4) (select |v_#length_6| v_ULTIMATE.start_main_~c~0.base_4)) (= (select |v_#valid_8| v_ULTIMATE.start_main_~c~0.base_4) 1) (= (store |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4 (store (select |v_#memory_int_4| v_ULTIMATE.start_main_~c~0.base_4) v_ULTIMATE.start_main_~c~0.offset_4 0)) |v_#memory_int_3|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_4)) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, #valid=|v_#valid_8|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_4, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_4, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#memory_int] 4281#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 4308#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4307#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4306#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4305#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4301#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4297#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4289#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4290#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4354#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4353#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4302#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4298#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4291#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4292#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4295#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4287#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4288#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4352#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4351#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4350#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4349#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4348#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4347#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4346#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4345#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4344#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4343#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4342#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4341#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4340#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4339#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4338#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4337#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4336#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4335#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4334#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4333#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4332#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4331#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4330#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4329#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4328#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4327#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4326#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4325#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4324#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4323#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4322#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4321#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4320#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4319#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4318#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4317#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4316#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4315#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4310#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4314#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4313#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4312#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4311#L11-1 [91] L11-1-->L11-2: Formula: (<= |v_ULTIMATE.start_main_#t~mem5_4| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_4|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4309#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4293#L9 142.04/102.55 [2019-03-28 12:42:00,333 INFO L796 eck$LassoCheckResult]: Loop: 4293#L9 [70] L9-->L10: Formula: (< |v_ULTIMATE.start_main_#t~mem2_6| 20) InVars {ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_6|} OutVars{ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4294#L10 [158] L10-->L10-2: Formula: (and (= |v_ULTIMATE.start_main_#t~mem3_5| (select (select |v_#memory_int_14| v_ULTIMATE.start_main_~i~0.base_19) v_ULTIMATE.start_main_~i~0.offset_14)) (<= (+ v_ULTIMATE.start_main_~i~0.offset_14 4) (select |v_#length_22| v_ULTIMATE.start_main_~i~0.base_19)) (= |v_ULTIMATE.start_main_#t~post4_5| |v_ULTIMATE.start_main_#t~mem3_5|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_14) (= 1 (select |v_#valid_27| v_ULTIMATE.start_main_~i~0.base_19))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_14, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_19, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_14|, #length=|v_#length_22|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_5|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4285#L10-2 [161] L10-2-->L11: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_15 4) (select |v_#length_25| v_ULTIMATE.start_main_~i~0.base_20)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_15) (= (store |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20 (store (select |v_#memory_int_18| v_ULTIMATE.start_main_~i~0.base_20) v_ULTIMATE.start_main_~i~0.offset_15 (+ |v_ULTIMATE.start_main_#t~post4_7| 1))) |v_#memory_int_17|) (= (select |v_#valid_32| v_ULTIMATE.start_main_~i~0.base_20) 1)) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_18|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_7|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_15, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_20, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_17|, #length=|v_#length_25|, ULTIMATE.start_main_#t~post4=|v_ULTIMATE.start_main_#t~post4_6|, ULTIMATE.start_main_#t~mem3=|v_ULTIMATE.start_main_#t~mem3_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post4, ULTIMATE.start_main_#t~mem3] 4286#L11 [94] L11-->L11-1: Formula: (and (<= (+ v_ULTIMATE.start_main_~i~0.offset_12 4) (select |v_#length_14| v_ULTIMATE.start_main_~i~0.base_16)) (= 1 (select |v_#valid_16| v_ULTIMATE.start_main_~i~0.base_16)) (<= 0 v_ULTIMATE.start_main_~i~0.offset_12) (= |v_ULTIMATE.start_main_#t~mem5_2| (select (select |v_#memory_int_9| v_ULTIMATE.start_main_~i~0.base_16) v_ULTIMATE.start_main_~i~0.offset_12))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #length=|v_#length_14|, #valid=|v_#valid_16|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_12, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_16, #valid=|v_#valid_16|, #memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4304#L11-1 [113] L11-1-->L12: Formula: (> |v_ULTIMATE.start_main_#t~mem5_6| 10) InVars {ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_6|} OutVars{ULTIMATE.start_main_#t~mem5=|v_ULTIMATE.start_main_#t~mem5_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem5] 4303#L12 [163] L12-->L12-2: Formula: (and (= (select |v_#valid_35| v_ULTIMATE.start_main_~c~0.base_19) 1) (= |v_ULTIMATE.start_main_#t~mem6_5| (select (select |v_#memory_int_20| v_ULTIMATE.start_main_~c~0.base_19) v_ULTIMATE.start_main_~c~0.offset_15)) (<= 0 v_ULTIMATE.start_main_~c~0.offset_15) (= |v_ULTIMATE.start_main_#t~post7_5| |v_ULTIMATE.start_main_#t~mem6_5|) (<= (+ v_ULTIMATE.start_main_~c~0.offset_15 4) (select |v_#length_27| v_ULTIMATE.start_main_~c~0.base_19))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_19, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_15, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_20|, #length=|v_#length_27|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_5|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 4299#L12-2 [164] L12-2-->L9-2: Formula: (and (= 1 (select |v_#valid_36| v_ULTIMATE.start_main_~c~0.base_20)) (= (store |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20 (store (select |v_#memory_int_22| v_ULTIMATE.start_main_~c~0.base_20) v_ULTIMATE.start_main_~c~0.offset_16 (+ |v_ULTIMATE.start_main_#t~post7_7| 1))) |v_#memory_int_21|) (<= 0 v_ULTIMATE.start_main_~c~0.offset_16) (<= (+ v_ULTIMATE.start_main_~c~0.offset_16 4) (select |v_#length_28| v_ULTIMATE.start_main_~c~0.base_20))) InVars {ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_22|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_7|} OutVars{ULTIMATE.start_main_~c~0.base=v_ULTIMATE.start_main_~c~0.base_20, ULTIMATE.start_main_~c~0.offset=v_ULTIMATE.start_main_~c~0.offset_16, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_21|, #length=|v_#length_28|, ULTIMATE.start_main_#t~post7=|v_ULTIMATE.start_main_#t~post7_6|, ULTIMATE.start_main_#t~mem6=|v_ULTIMATE.start_main_#t~mem6_6|} AuxVars[] AssignedVars[#memory_int, ULTIMATE.start_main_#t~post7, ULTIMATE.start_main_#t~mem6] 4283#L9-2 [64] L9-2-->L11-2: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 4284#L11-2 [66] L11-2-->L9: Formula: (and (= (select |v_#valid_10| v_ULTIMATE.start_main_~i~0.base_7) 1) (= (select (select |v_#memory_int_5| v_ULTIMATE.start_main_~i~0.base_7) v_ULTIMATE.start_main_~i~0.offset_6) |v_ULTIMATE.start_main_#t~mem2_2|) (<= 0 v_ULTIMATE.start_main_~i~0.offset_6) (<= (+ v_ULTIMATE.start_main_~i~0.offset_6 4) (select |v_#length_8| v_ULTIMATE.start_main_~i~0.base_7))) InVars {ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #length=|v_#length_8|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~i~0.offset=v_ULTIMATE.start_main_~i~0.offset_6, ULTIMATE.start_main_~i~0.base=v_ULTIMATE.start_main_~i~0.base_7, #valid=|v_#valid_10|, ULTIMATE.start_main_#t~mem2=|v_ULTIMATE.start_main_#t~mem2_2|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem2] 4293#L9 142.04/102.55 [2019-03-28 12:42:00,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:42:00,333 INFO L82 PathProgramCache]: Analyzing trace with hash 1584158577, now seen corresponding path program 13 times 142.04/102.55 [2019-03-28 12:42:00,333 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:42:00,333 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:42:00,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,334 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:00,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:00,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:42:00,367 INFO L82 PathProgramCache]: Analyzing trace with hash -2018430114, now seen corresponding path program 11 times 142.04/102.55 [2019-03-28 12:42:00,367 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:42:00,367 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:42:00,367 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,368 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:00,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:00,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:42:00,375 INFO L82 PathProgramCache]: Analyzing trace with hash 2019047918, now seen corresponding path program 10 times 142.04/102.55 [2019-03-28 12:42:00,375 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 142.04/102.55 [2019-03-28 12:42:00,376 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 142.04/102.55 [2019-03-28 12:42:00,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,376 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 142.04/102.55 [2019-03-28 12:42:00,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:00,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:22,666 WARN L188 SmtUtils]: Spent 22.16 s on a formula simplification. DAG size of input: 243 DAG size of output: 208 142.04/102.55 [2019-03-28 12:42:22,738 INFO L216 LassoAnalysis]: Preferences: 142.04/102.55 [2019-03-28 12:42:22,738 INFO L124 ssoRankerPreferences]: Compute integeral hull: false 142.04/102.55 [2019-03-28 12:42:22,738 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true 142.04/102.55 [2019-03-28 12:42:22,738 INFO L126 ssoRankerPreferences]: Term annotations enabled: false 142.04/102.55 [2019-03-28 12:42:22,738 INFO L127 ssoRankerPreferences]: Use exernal solver: false 142.04/102.55 [2019-03-28 12:42:22,738 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 142.04/102.55 [2019-03-28 12:42:22,738 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false 142.04/102.55 [2019-03-28 12:42:22,739 INFO L130 ssoRankerPreferences]: Path of dumped script: 142.04/102.55 [2019-03-28 12:42:22,739 INFO L131 ssoRankerPreferences]: Filename of dumped script: theBenchmark.c_BEv2_Iteration13_Lasso 142.04/102.55 [2019-03-28 12:42:22,739 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank 142.04/102.55 [2019-03-28 12:42:22,739 INFO L282 LassoAnalysis]: Starting lasso preprocessing... 142.04/102.55 [2019-03-28 12:42:22,742 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,903 WARN L188 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 47 142.04/102.55 [2019-03-28 12:42:22,971 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,972 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,974 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,975 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,978 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,979 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,981 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,982 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:22,984 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 142.04/102.55 [2019-03-28 12:42:23,222 INFO L300 LassoAnalysis]: Preprocessing complete. 142.04/102.55 [2019-03-28 12:42:23,223 INFO L497 LassoAnalysis]: Using template 'affine'. 142.04/102.55 [2019-03-28 12:42:23,223 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,224 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,224 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,224 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,224 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,226 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,226 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,230 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.55 [2019-03-28 12:42:23,230 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,231 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,231 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,231 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,231 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,232 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,232 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,235 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.55 [2019-03-28 12:42:23,236 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,236 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,236 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,236 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,237 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,240 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,240 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,248 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.55 [2019-03-28 12:42:23,248 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,249 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,249 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,249 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,249 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,250 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,250 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,254 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.55 [2019-03-28 12:42:23,255 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,255 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,255 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,255 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,255 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,256 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,257 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,260 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.55 [2019-03-28 12:42:23,260 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,261 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,261 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,261 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,261 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,262 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,262 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,263 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.55 [2019-03-28 12:42:23,264 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,264 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,264 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,264 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,264 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,265 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,266 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,269 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 142.04/102.55 [2019-03-28 12:42:23,269 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 142.04/102.55 Termination analysis: LINEAR_WITH_GUESSES 142.04/102.55 Number of strict supporting invariants: 0 142.04/102.55 Number of non-strict supporting invariants: 1 142.04/102.55 Consider only non-deceasing supporting invariants: true 142.04/102.55 Simplify termination arguments: true 142.04/102.55 Simplify supporting invariants: trueOverapproximate stem: false 142.04/102.55 [2019-03-28 12:42:23,270 INFO L339 nArgumentSynthesizer]: Template has degree 0. 142.04/102.55 [2019-03-28 12:42:23,270 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 142.04/102.55 [2019-03-28 12:42:23,270 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 142.04/102.55 [2019-03-28 12:42:23,270 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 142.04/102.55 [2019-03-28 12:42:23,271 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 142.04/102.55 [2019-03-28 12:42:23,272 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 142.04/102.55 [2019-03-28 12:42:23,283 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. 142.04/102.55 [2019-03-28 12:42:23,303 INFO L443 ModelExtractionUtils]: Simplification made 9 calls to the SMT solver. 142.04/102.55 [2019-03-28 12:42:23,303 INFO L444 ModelExtractionUtils]: 1 out of 10 variables were initially zero. Simplification set additionally 4 variables to zero. 142.04/102.55 [2019-03-28 12:42:23,304 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... 142.04/102.55 [2019-03-28 12:42:23,305 INFO L440 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. 142.04/102.55 [2019-03-28 12:42:23,305 INFO L518 LassoAnalysis]: Proved termination. 142.04/102.55 [2019-03-28 12:42:23,305 INFO L520 LassoAnalysis]: Termination argument consisting of: 142.04/102.55 Ranking function f(v_rep(select (select #memory_int ULTIMATE.start_main_~i~0.base) ULTIMATE.start_main_~i~0.offset)_2) = -11*v_rep(select (select #memory_int ULTIMATE.start_main_~i~0.base) ULTIMATE.start_main_~i~0.offset)_2 + 224 142.04/102.55 Supporting invariants [23*ULTIMATE.start_main_#t~mem2 - 22*v_rep(select (select #memory_int ULTIMATE.start_main_~i~0.base) ULTIMATE.start_main_~i~0.offset)_2 >= 0] 142.04/102.55 [2019-03-28 12:42:23,343 INFO L297 tatePredicateManager]: 11 out of 12 supporting invariants were superfluous and have been removed 142.04/102.55 [2019-03-28 12:42:23,346 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 142.04/102.55 [2019-03-28 12:42:23,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 142.04/102.55 [2019-03-28 12:42:23,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:42:23,434 INFO L256 TraceCheckSpWp]: Trace formula consists of 316 conjuncts, 41 conjunts are in the unsatisfiable core 142.04/102.55 [2019-03-28 12:42:23,437 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.55 [2019-03-28 12:42:23,454 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 142.04/102.55 [2019-03-28 12:42:23,454 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,461 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:23,462 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,462 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 142.04/102.55 [2019-03-28 12:42:23,481 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:23,482 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 142.04/102.55 [2019-03-28 12:42:23,482 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,490 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:23,490 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,491 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:22 142.04/102.55 [2019-03-28 12:42:23,544 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:23,545 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:23,545 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,556 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:23,557 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,557 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:23,623 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:23,624 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:23,625 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,638 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:23,638 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,639 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:23,712 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:23,714 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:23,715 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,744 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:23,745 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,745 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:23,825 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:23,826 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:23,827 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,840 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:23,840 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,841 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:23,923 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:23,925 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:23,925 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,938 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:23,939 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:23,939 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:24,024 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:24,025 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:24,026 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,036 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:24,037 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,037 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:24,128 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:24,129 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:24,130 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,141 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:24,142 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,142 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:24,234 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:24,235 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:24,236 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,247 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:24,247 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,248 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:24,346 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:24,347 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:24,347 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,358 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:24,359 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,359 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:24,461 INFO L189 IndexEqualityManager]: detected not equals via solver 142.04/102.55 [2019-03-28 12:42:24,462 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 142.04/102.55 [2019-03-28 12:42:24,462 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,476 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:24,477 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,477 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:22 142.04/102.55 [2019-03-28 12:42:24,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 142.04/102.55 [2019-03-28 12:42:24,533 INFO L256 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 13 conjunts are in the unsatisfiable core 142.04/102.55 [2019-03-28 12:42:24,534 INFO L279 TraceCheckSpWp]: Computing forward predicates... 142.04/102.55 [2019-03-28 12:42:24,626 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 27 142.04/102.55 [2019-03-28 12:42:24,627 INFO L427 ElimStorePlain]: Start of recursive call 2: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,637 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:24,638 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,638 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:46, output treesize:27 142.04/102.55 [2019-03-28 12:42:24,872 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 142.04/102.55 [2019-03-28 12:42:24,873 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 66 142.04/102.55 [2019-03-28 12:42:24,876 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,945 INFO L497 ElimStorePlain]: treesize reduction 35, result has 66.3 percent of original size 142.04/102.55 [2019-03-28 12:42:24,947 INFO L427 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. 142.04/102.55 [2019-03-28 12:42:24,947 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:54, output treesize:67 142.04/102.55 [2019-03-28 12:42:42,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 142.04/102.55 [2019-03-28 12:42:43,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:43,662 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.55 [2019-03-28 12:42:43,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:43,670 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.55 [2019-03-28 12:42:43,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:43,678 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.55 [2019-03-28 12:42:43,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:43,687 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.55 [2019-03-28 12:42:43,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 142.04/102.55 [2019-03-28 12:42:43,696 INFO L137 LoopCannibalizer]: termination argument not suffcient for all loop shiftings 142.04/102.55 [2019-03-28 12:42:43,696 INFO L98 LoopCannibalizer]: 10 predicates before loop cannibalization 10 predicates after loop cannibalization 142.04/102.55 [2019-03-28 12:42:43,696 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.16 stem predicates 10 loop predicates 142.04/102.55 [2019-03-28 12:42:43,697 INFO L69 BuchiDifferenceNCSB]: Start buchiDifferenceNCSB. First operand 75 states and 79 transitions. cyclomatic complexity: 6 Second operand 33 states. 142.04/102.55 [2019-03-28 12:42:53,960 INFO L73 BuchiDifferenceNCSB]: Finished buchiDifferenceNCSB. First operand 75 states and 79 transitions. cyclomatic complexity: 6. Second operand 33 states. Result 841 states and 856 transitions. Complement of second has 761 states. 142.04/102.55 [2019-03-28 12:42:53,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 114 states 99 stem states 11 non-accepting loop states 4 accepting loop states 142.04/102.55 [2019-03-28 12:42:53,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. 142.04/102.55 [2019-03-28 12:42:53,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 391 transitions. 142.04/102.55 [2019-03-28 12:42:53,962 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 114 states and 391 transitions. Stem has 66 letters. Loop has 9 letters. 142.04/102.55 [2019-03-28 12:42:53,965 INFO L116 BuchiAccepts]: Finished buchiAccepts. 142.04/102.55 [2019-03-28 12:42:53,965 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 114 states and 391 transitions. Stem has 75 letters. Loop has 9 letters. 142.04/102.55 [2019-03-28 12:42:53,967 INFO L116 BuchiAccepts]: Finished buchiAccepts. 142.04/102.55 [2019-03-28 12:42:53,967 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 114 states and 391 transitions. Stem has 66 letters. Loop has 18 letters. 142.04/102.55 [2019-03-28 12:42:53,968 INFO L116 BuchiAccepts]: Finished buchiAccepts. 142.04/102.55 [2019-03-28 12:42:53,974 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 841 states and 856 transitions. 142.04/102.55 [2019-03-28 12:42:53,981 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 142.04/102.55 [2019-03-28 12:42:53,982 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 841 states to 0 states and 0 transitions. 142.04/102.55 [2019-03-28 12:42:53,982 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 142.04/102.55 [2019-03-28 12:42:53,982 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 142.04/102.55 [2019-03-28 12:42:53,982 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. 142.04/102.55 [2019-03-28 12:42:53,982 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 142.04/102.55 [2019-03-28 12:42:53,982 INFO L706 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 142.04/102.55 [2019-03-28 12:42:53,983 INFO L729 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 142.04/102.55 [2019-03-28 12:42:53,983 INFO L609 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 142.04/102.55 [2019-03-28 12:42:53,983 INFO L442 BuchiCegarLoop]: ======== Iteration 14============ 142.04/102.55 [2019-03-28 12:42:53,983 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. 142.04/102.55 [2019-03-28 12:42:53,983 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 142.04/102.55 [2019-03-28 12:42:53,983 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true 142.04/102.55 [2019-03-28 12:42:53,990 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:42:53 BasicIcfg 142.04/102.55 [2019-03-28 12:42:53,990 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- 142.04/102.55 [2019-03-28 12:42:53,990 INFO L168 Benchmark]: Toolchain (without parser) took 98168.02 ms. Allocated memory was 649.6 MB in the beginning and 960.5 MB in the end (delta: 310.9 MB). Free memory was 563.9 MB in the beginning and 759.7 MB in the end (delta: -195.8 MB). Peak memory consumption was 115.1 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,991 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 649.6 MB. Free memory is still 585.5 MB. There was no memory consumed. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,991 INFO L168 Benchmark]: CACSL2BoogieTranslator took 302.05 ms. Allocated memory was 649.6 MB in the beginning and 677.4 MB in the end (delta: 27.8 MB). Free memory was 563.9 MB in the beginning and 644.9 MB in the end (delta: -81.0 MB). Peak memory consumption was 30.2 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,992 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.47 ms. Allocated memory is still 677.4 MB. Free memory was 644.9 MB in the beginning and 640.5 MB in the end (delta: 4.4 MB). Peak memory consumption was 4.4 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,992 INFO L168 Benchmark]: Boogie Preprocessor took 23.43 ms. Allocated memory is still 677.4 MB. Free memory was 640.5 MB in the beginning and 639.1 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,993 INFO L168 Benchmark]: RCFGBuilder took 364.74 ms. Allocated memory is still 677.4 MB. Free memory was 639.1 MB in the beginning and 618.0 MB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,993 INFO L168 Benchmark]: BlockEncodingV2 took 127.24 ms. Allocated memory is still 677.4 MB. Free memory was 618.0 MB in the beginning and 608.6 MB in the end (delta: 9.4 MB). Peak memory consumption was 9.4 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,994 INFO L168 Benchmark]: TraceAbstraction took 1058.32 ms. Allocated memory is still 677.4 MB. Free memory was 607.3 MB in the beginning and 504.0 MB in the end (delta: 103.3 MB). Peak memory consumption was 103.3 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,994 INFO L168 Benchmark]: BuchiAutomizer took 96243.47 ms. Allocated memory was 677.4 MB in the beginning and 960.5 MB in the end (delta: 283.1 MB). Free memory was 504.0 MB in the beginning and 759.7 MB in the end (delta: -255.7 MB). Peak memory consumption was 27.4 MB. Max. memory is 50.3 GB. 142.04/102.55 [2019-03-28 12:42:53,996 INFO L337 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### 142.04/102.55 --- Results --- 142.04/102.55 * Results from de.uni_freiburg.informatik.ultimate.plugins.blockencoding: 142.04/102.55 - StatisticsResult: Initial Icfg 142.04/102.55 40 locations, 42 edges 142.04/102.55 - StatisticsResult: Encoded RCFG 142.04/102.55 32 locations, 54 edges 142.04/102.55 * Results from de.uni_freiburg.informatik.ultimate.core: 142.04/102.55 - StatisticsResult: Toolchain Benchmarks 142.04/102.55 Benchmark results are: 142.04/102.55 * CDTParser took 0.17 ms. Allocated memory is still 649.6 MB. Free memory is still 585.5 MB. There was no memory consumed. Max. memory is 50.3 GB. 142.04/102.55 * CACSL2BoogieTranslator took 302.05 ms. Allocated memory was 649.6 MB in the beginning and 677.4 MB in the end (delta: 27.8 MB). Free memory was 563.9 MB in the beginning and 644.9 MB in the end (delta: -81.0 MB). Peak memory consumption was 30.2 MB. Max. memory is 50.3 GB. 142.04/102.55 * Boogie Procedure Inliner took 43.47 ms. Allocated memory is still 677.4 MB. Free memory was 644.9 MB in the beginning and 640.5 MB in the end (delta: 4.4 MB). Peak memory consumption was 4.4 MB. Max. memory is 50.3 GB. 142.04/102.55 * Boogie Preprocessor took 23.43 ms. Allocated memory is still 677.4 MB. Free memory was 640.5 MB in the beginning and 639.1 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 50.3 GB. 142.04/102.55 * RCFGBuilder took 364.74 ms. Allocated memory is still 677.4 MB. Free memory was 639.1 MB in the beginning and 618.0 MB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 50.3 GB. 142.04/102.55 * BlockEncodingV2 took 127.24 ms. Allocated memory is still 677.4 MB. Free memory was 618.0 MB in the beginning and 608.6 MB in the end (delta: 9.4 MB). Peak memory consumption was 9.4 MB. Max. memory is 50.3 GB. 142.04/102.55 * TraceAbstraction took 1058.32 ms. Allocated memory is still 677.4 MB. Free memory was 607.3 MB in the beginning and 504.0 MB in the end (delta: 103.3 MB). Peak memory consumption was 103.3 MB. Max. memory is 50.3 GB. 142.04/102.55 * BuchiAutomizer took 96243.47 ms. Allocated memory was 677.4 MB in the beginning and 960.5 MB in the end (delta: 283.1 MB). Free memory was 504.0 MB in the beginning and 759.7 MB in the end (delta: -255.7 MB). Peak memory consumption was 27.4 MB. Max. memory is 50.3 GB. 142.04/102.55 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #length 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #memory_int 142.04/102.55 - GenericResult: Unfinished Backtranslation 142.04/102.55 unknown boogie variable #memory_int 142.04/102.55 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: 142.04/102.55 - PositiveResult [Line: 8]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 12]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 12]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 12]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 8]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 11]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 7]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 7]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 11]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 10]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 10]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 10]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 9]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 9]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 12]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 10]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 14]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - PositiveResult [Line: 14]: pointer dereference always succeeds 142.04/102.55 For all program executions holds that pointer dereference always succeeds at this location 142.04/102.55 - AllSpecificationsHoldResult: All specifications hold 142.04/102.55 18 specifications checked. All of them hold 142.04/102.55 - InvariantResult [Line: 8]: Loop Invariant 142.04/102.55 [2019-03-28 12:42:54,003 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 [2019-03-28 12:42:54,003 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 [2019-03-28 12:42:54,004 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 [2019-03-28 12:42:54,004 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 Derived loop invariant: ((((4 == unknown-#length-unknown[c] && c == 0) && 4 == unknown-#length-unknown[i]) && 0 == i) && 1 == \valid[c]) && 1 == \valid[i] 142.04/102.55 - InvariantResult [Line: 9]: Loop Invariant 142.04/102.55 [2019-03-28 12:42:54,005 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 [2019-03-28 12:42:54,005 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 [2019-03-28 12:42:54,005 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 [2019-03-28 12:42:54,006 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 142.04/102.55 Derived loop invariant: ((((4 == unknown-#length-unknown[c] && c == 0) && 4 == unknown-#length-unknown[i]) && 0 == i) && 1 == \valid[c]) && 1 == \valid[i] 142.04/102.55 - StatisticsResult: Ultimate Automizer benchmark data 142.04/102.55 CFG has 1 procedures, 32 locations, 18 error locations. SAFE Result, 0.9s OverallTime, 6 OverallIterations, 1 TraceHistogramMax, 0.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 32 SDtfs, 158 SDslu, 4 SDs, 0 SdLazy, 161 SolverSat, 48 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 12 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=32occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 6 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 2 LocationsWithAnnotation, 2 PreInvPairs, 2 NumberOfFragments, 54 HoareAnnotationTreeSize, 2 FomulaSimplifications, 0 FormulaSimplificationTreeSizeReduction, 0.0s HoareSimplificationTime, 2 FomulaSimplificationsInter, 0 FormulaSimplificationTreeSizeReductionInter, 0.0s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.1s InterpolantComputationTime, 21 NumberOfCodeBlocks, 21 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 15 ConstructedInterpolants, 0 QuantifiedInterpolants, 151 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available 142.04/102.55 - StatisticsResult: Constructed decomposition of program 142.04/102.55 Your program was decomposed into 13 terminating modules (11 trivial, 0 deterministic, 2 nondeterministic). One nondeterministic module has affine ranking function -2 * unknown-#memory_int-unknown[i][i] + 19 and consists of 6 locations. One nondeterministic module has affine ranking function -11 * unknown-#memory_int-unknown[i][i] + 224 and consists of 114 locations. 11 modules have a trivial ranking function, the largest among these consists of 58 locations. 142.04/102.55 - StatisticsResult: Timing statistics 142.04/102.55 BüchiAutomizer plugin needed 96.2s and 14 iterations. TraceHistogramMax:11. Analysis of lassos took 45.8s. Construction of modules took 8.3s. Büchi inclusion checks took 41.8s. Highest rank in rank-based complementation 3. Minimization of det autom 2. Minimization of nondet autom 11. Automata minimization 0.0s AutomataMinimizationTime, 12 MinimizatonAttempts, 668 StatesRemovedByMinimization, 12 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 75 states and ocurred in iteration 12. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 142 SDtfs, 1870 SDslu, 1605 SDs, 0 SdLazy, 5451 SolverSat, 581 SolverUnsat, 3 SolverUnknown, 0 SolverNotchecked, 8.3s Time LassoAnalysisResults: nont0 unkn0 SFLI1 SFLT0 conc10 concLT0 SILN0 SILU0 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital243 mio100 ax100 hnf100 lsp96 ukn48 mio100 lsp40 div100 bol100 ite100 ukn100 eq183 hnf88 smp95 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 6ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s 142.04/102.55 - TerminationAnalysisResult: Termination proven 142.04/102.55 Buchi Automizer proved that your program is terminating 142.04/102.55 RESULT: Ultimate proved your program to be correct! 142.04/102.55 !SESSION 2019-03-28 12:41:12.532 ----------------------------------------------- 142.04/102.55 eclipse.buildId=unknown 142.04/102.55 java.version=1.8.0_181 142.04/102.55 java.vendor=Oracle Corporation 142.04/102.55 BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US 142.04/102.55 Framework arguments: -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -i /export/starexec/sandbox/benchmark/theBenchmark.c 142.04/102.55 Command-line arguments: -os linux -ws gtk -arch x86_64 -consoleLog -data @user.home/.ultimate -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -data /export/starexec/sandbox/tmp -i /export/starexec/sandbox/benchmark/theBenchmark.c 142.04/102.55 142.04/102.55 !ENTRY org.eclipse.core.resources 2 10035 2019-03-28 12:42:54.231 142.04/102.55 !MESSAGE The workspace will exit with unsaved changes in this session. 142.04/102.55 Received shutdown request... 142.04/102.55 Ultimate: 142.04/102.55 GTK+ Version Check 142.04/102.55 EOF