51.82/17.44 YES 52.11/17.91 proof of /export/starexec/sandbox2/benchmark/theBenchmark.c 52.11/17.91 # AProVE Commit ID: 48fb2092695e11cc9f56e44b17a92a5f88ffb256 marcel 20180622 unpublished dirty 52.11/17.91 52.11/17.91 52.11/17.91 Termination of the given C Problem could be proven: 52.11/17.91 52.11/17.91 (0) C Problem 52.11/17.91 (1) CToLLVMProof [EQUIVALENT, 165 ms] 52.11/17.91 (2) LLVM problem 52.11/17.91 (3) LLVMToTerminationGraphProof [EQUIVALENT, 12.0 s] 52.11/17.91 (4) LLVM Symbolic Execution Graph 52.11/17.91 (5) SymbolicExecutionGraphToSCCProof [SOUND, 0 ms] 52.11/17.91 (6) AND 52.11/17.91 (7) LLVM Symbolic Execution SCC 52.11/17.91 (8) SCC2IRS [SOUND, 112 ms] 52.11/17.91 (9) IntTRS 52.11/17.91 (10) IntTRSCompressionProof [EQUIVALENT, 0 ms] 52.11/17.91 (11) IntTRS 52.11/17.91 (12) RankingReductionPairProof [EQUIVALENT, 0 ms] 52.11/17.91 (13) YES 52.11/17.91 (14) LLVM Symbolic Execution SCC 52.11/17.91 (15) SCC2IRS [SOUND, 94 ms] 52.11/17.91 (16) IntTRS 52.11/17.91 (17) IntTRSCompressionProof [EQUIVALENT, 2 ms] 52.11/17.91 (18) IntTRS 52.11/17.91 (19) RankingReductionPairProof [EQUIVALENT, 20 ms] 52.11/17.91 (20) YES 52.11/17.91 (21) LLVM Symbolic Execution SCC 52.11/17.91 (22) SCC2IRS [SOUND, 108 ms] 52.11/17.91 (23) IntTRS 52.11/17.91 (24) IntTRSCompressionProof [EQUIVALENT, 0 ms] 52.11/17.91 (25) IntTRS 52.11/17.91 (26) RankingReductionPairProof [EQUIVALENT, 0 ms] 52.11/17.91 (27) YES 52.11/17.91 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (0) 52.11/17.91 Obligation: 52.11/17.91 c file /export/starexec/sandbox2/benchmark/theBenchmark.c 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (1) CToLLVMProof (EQUIVALENT) 52.11/17.91 Compiled c-file /export/starexec/sandbox2/benchmark/theBenchmark.c to LLVM. 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (2) 52.11/17.91 Obligation: 52.11/17.91 LLVM Problem 52.11/17.91 52.11/17.91 Aliases: 52.11/17.91 52.11/17.91 Data layout: 52.11/17.91 52.11/17.91 "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" 52.11/17.91 52.11/17.91 Machine: 52.11/17.91 52.11/17.91 "x86_64-pc-linux-gnu" 52.11/17.91 52.11/17.91 Type definitions: 52.11/17.91 52.11/17.91 Global variables: 52.11/17.91 52.11/17.91 Function declarations and definitions: 52.11/17.91 52.11/17.91 *BasicFunctionTypename: "__VERIFIER_nondet_int" returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 52.11/17.91 *BasicFunctionTypename: "test_fun" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: (x i32, y i32, z i32) variableLength: false visibilityType: DEFAULT callingConvention: ccc 52.11/17.91 0: 52.11/17.91 %1 = alloca i32, align 4 52.11/17.91 %2 = alloca i32, align 4 52.11/17.91 %3 = alloca i32, align 4 52.11/17.91 %x_ref = alloca *i32, align 8 52.11/17.91 %y_ref = alloca *i32, align 8 52.11/17.91 %z_ref = alloca *i32, align 8 52.11/17.91 %c = alloca *i32, align 8 52.11/17.91 store %x, %1 52.11/17.91 store %y, %2 52.11/17.91 store %z, %3 52.11/17.91 %4 = alloca i8, numElementsLit: 4 52.11/17.91 %5 = bitcast *i8 %4 to *i32 52.11/17.91 store %5, %x_ref 52.11/17.91 %6 = alloca i8, numElementsLit: 4 52.11/17.91 %7 = bitcast *i8 %6 to *i32 52.11/17.91 store %7, %y_ref 52.11/17.91 %8 = alloca i8, numElementsLit: 4 52.11/17.91 %9 = bitcast *i8 %8 to *i32 52.11/17.91 store %9, %z_ref 52.11/17.91 %10 = alloca i8, numElementsLit: 4 52.11/17.91 %11 = bitcast *i8 %10 to *i32 52.11/17.91 store %11, %c 52.11/17.91 %12 = load %1 52.11/17.91 %13 = load %x_ref 52.11/17.91 store %12, %13 52.11/17.91 %14 = load %2 52.11/17.91 %15 = load %y_ref 52.11/17.91 store %14, %15 52.11/17.91 %16 = load %3 52.11/17.91 %17 = load %z_ref 52.11/17.91 store %16, %17 52.11/17.91 %18 = load %c 52.11/17.91 store 0, %18 52.11/17.91 br %19 52.11/17.91 19: 52.11/17.91 %20 = load %x_ref 52.11/17.91 %21 = load %20 52.11/17.91 %22 = load %z_ref 52.11/17.91 %23 = load %22 52.11/17.91 %24 = icmp sgt %21 %23 52.11/17.91 br %24, %25, %50 52.11/17.91 25: 52.11/17.91 br %26 52.11/17.91 26: 52.11/17.91 %27 = load %y_ref 52.11/17.91 %28 = load %27 52.11/17.91 %29 = load %z_ref 52.11/17.91 %30 = load %29 52.11/17.91 %31 = icmp sgt %28 %30 52.11/17.91 br %31, %32, %41 52.11/17.91 32: 52.11/17.91 %33 = load %y_ref 52.11/17.91 %34 = load %33 52.11/17.91 %35 = sub %34 1 52.11/17.91 %36 = load %y_ref 52.11/17.91 store %35, %36 52.11/17.91 %37 = load %c 52.11/17.91 %38 = load %37 52.11/17.91 %39 = add %38 1 52.11/17.91 %40 = load %c 52.11/17.91 store %39, %40 52.11/17.91 br %26 52.11/17.91 41: 52.11/17.91 %42 = load %c 52.11/17.91 %43 = load %42 52.11/17.91 %44 = add %43 1 52.11/17.91 %45 = load %c 52.11/17.91 store %44, %45 52.11/17.91 %46 = load %x_ref 52.11/17.91 %47 = load %46 52.11/17.91 %48 = sub %47 1 52.11/17.91 %49 = load %x_ref 52.11/17.91 store %48, %49 52.11/17.91 br %19 52.11/17.91 50: 52.11/17.91 %51 = load %c 52.11/17.91 %52 = load %51 52.11/17.91 ret %52 52.11/17.91 52.11/17.91 *BasicFunctionTypename: "main" linkageType: EXTERNALLY_VISIBLE returnParam: i32 parameters: () variableLength: false visibilityType: DEFAULT callingConvention: ccc 52.11/17.91 0: 52.11/17.91 %1 = alloca i32, align 4 52.11/17.91 store 0, %1 52.11/17.91 %2 = call i32 @__VERIFIER_nondet_int() 52.11/17.91 %3 = call i32 @__VERIFIER_nondet_int() 52.11/17.91 %4 = call i32 @__VERIFIER_nondet_int() 52.11/17.91 %5 = call i32 @test_fun(i32 %2, i32 %3, i32 %4) 52.11/17.91 ret %5 52.11/17.91 52.11/17.91 52.11/17.91 Analyze Termination of all function calls matching the pattern: 52.11/17.91 main() 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (3) LLVMToTerminationGraphProof (EQUIVALENT) 52.11/17.91 Constructed symbolic execution graph for LLVM program and proved memory safety. 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (4) 52.11/17.91 Obligation: 52.11/17.91 SE Graph 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (5) SymbolicExecutionGraphToSCCProof (SOUND) 52.11/17.91 Splitted symbolic execution graph to 3 SCCs. 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (6) 52.11/17.91 Complex Obligation (AND) 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (7) 52.11/17.91 Obligation: 52.11/17.91 SCC 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (8) SCC2IRS (SOUND) 52.11/17.91 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 52.11/17.91 Generated rules. Obtained 26 rulesP rules: 52.11/17.91 f_839(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1259, 1, 0, v1262, v1263, v1264, v1265, v1266, v1267, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_840(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_840(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_841(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_841(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_842(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_842(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_843(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: v1247 < v1267 52.11/17.91 f_843(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_845(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_845(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_847(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: TRUE 52.11/17.91 f_847(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_849(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: TRUE 52.11/17.91 f_849(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_851(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_851(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_853(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_853(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_855(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_855(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_856(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_856(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_857(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_857(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_858(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: TRUE 52.11/17.91 f_858(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_859(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_859(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1265, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_860(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_860(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_861(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: v1378 = 1 + v1266 && 3 <= v1378 52.11/17.91 f_861(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_862(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_862(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_863(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: TRUE 52.11/17.91 f_863(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_864(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_864(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1259, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_865(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_865(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_866(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 1 + v1380 = v1267 52.11/17.91 f_866(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_867(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 f_867(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_868(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: TRUE 52.11/17.91 f_868(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_869(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: TRUE 52.11/17.91 f_869(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_838(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1267, 1, 0, v1262, v1263, v1264, v1266, v1378, v1380, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: TRUE 52.11/17.91 f_838(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1259, 1, 0, v1262, v1263, v1264, v1265, v1266, v1267, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) -> f_839(v1245, v1246, v1247, v1248, v1249, v1250, v1251, v1252, v1253, v1254, v1255, v1256, v1257, v1258, v1259, 1, 0, v1262, v1263, v1264, v1265, v1266, v1267, v1268, v1269, v1270, v1271, v1272, v1273, v1274, v1275, v1276, v1277, v1278, v1279, v1280, 3, 7, 2, 4, 8) :|: 0 = 0 52.11/17.91 Combined rules. Obtained 1 rulesP rules: 52.11/17.91 f_839(v1245:0, v1246:0, v1247:0, v1248:0, v1249:0, v1250:0, v1251:0, v1252:0, v1253:0, v1254:0, v1255:0, v1256:0, v1257:0, v1258:0, v1259:0, 1, 0, v1262:0, v1263:0, v1264:0, v1265:0, v1266:0, 1 + v1380:0, v1268:0, v1269:0, v1270:0, v1271:0, v1272:0, v1273:0, v1274:0, v1275:0, v1276:0, v1277:0, v1278:0, v1279:0, v1280:0, 3, 7, 2, 4, 8) -> f_839(v1245:0, v1246:0, v1247:0, v1248:0, v1249:0, v1250:0, v1251:0, v1252:0, v1253:0, v1254:0, v1255:0, v1256:0, v1257:0, v1258:0, 1 + v1380:0, 1, 0, v1262:0, v1263:0, v1264:0, v1266:0, 1 + v1266:0, v1380:0, v1268:0, v1269:0, v1270:0, v1271:0, v1272:0, v1273:0, v1274:0, v1275:0, v1276:0, v1277:0, v1278:0, v1279:0, v1280:0, 3, 7, 2, 4, 8) :|: v1266:0 > 1 && v1247:0 < 1 + v1380:0 52.11/17.91 Filtered unneeded arguments: 52.11/17.91 f_839(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33, x34, x35, x36, x37, x38, x39, x40, x41) -> f_839(x3, x22, x23) 52.11/17.91 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 52.11/17.91 f_839(v1247:0, v1266:0, sum~cons_1~v1380:0) -> f_839(v1247:0, 1 + v1266:0, v1380:0) :|: v1266:0 > 1 && v1247:0 < 1 + v1380:0 && sum~cons_1~v1380:0 = 1 + v1380:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (9) 52.11/17.91 Obligation: 52.11/17.91 Rules: 52.11/17.91 f_839(v1247:0, v1266:0, sum~cons_1~v1380:0) -> f_839(v1247:0, 1 + v1266:0, v1380:0) :|: v1266:0 > 1 && v1247:0 < 1 + v1380:0 && sum~cons_1~v1380:0 = 1 + v1380:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (10) IntTRSCompressionProof (EQUIVALENT) 52.11/17.91 Compressed rules. 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (11) 52.11/17.91 Obligation: 52.11/17.91 Rules: 52.11/17.91 f_839(v1247:0:0, v1266:0:0, sum~cons_1~v1380:0:0) -> f_839(v1247:0:0, 1 + v1266:0:0, v1380:0:0) :|: v1266:0:0 > 1 && v1247:0:0 < 1 + v1380:0:0 && sum~cons_1~v1380:0:0 = 1 + v1380:0:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (12) RankingReductionPairProof (EQUIVALENT) 52.11/17.91 Interpretation: 52.11/17.91 [ f_839 ] = -1*f_839_1 + f_839_3 52.11/17.91 52.11/17.91 The following rules are decreasing: 52.11/17.91 f_839(v1247:0:0, v1266:0:0, sum~cons_1~v1380:0:0) -> f_839(v1247:0:0, 1 + v1266:0:0, v1380:0:0) :|: v1266:0:0 > 1 && v1247:0:0 < 1 + v1380:0:0 && sum~cons_1~v1380:0:0 = 1 + v1380:0:0 52.11/17.91 52.11/17.91 The following rules are bounded: 52.11/17.91 f_839(v1247:0:0, v1266:0:0, sum~cons_1~v1380:0:0) -> f_839(v1247:0:0, 1 + v1266:0:0, v1380:0:0) :|: v1266:0:0 > 1 && v1247:0:0 < 1 + v1380:0:0 && sum~cons_1~v1380:0:0 = 1 + v1380:0:0 52.11/17.91 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (13) 52.11/17.91 YES 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (14) 52.11/17.91 Obligation: 52.11/17.91 SCC 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (15) SCC2IRS (SOUND) 52.11/17.91 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 52.11/17.91 Generated rules. Obtained 26 rulesP rules: 52.11/17.91 f_776(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v945, 1, 0, v948, v949, v950, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_778(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_778(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_780(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_780(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_782(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_782(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_784(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: v933 < v950 52.11/17.91 f_784(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_788(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_788(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_792(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: TRUE 52.11/17.91 f_792(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_796(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: TRUE 52.11/17.91 f_796(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_800(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_800(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_804(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_804(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_808(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_808(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_810(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_810(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_812(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_812(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_814(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: TRUE 52.11/17.91 f_814(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_816(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_816(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v948, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_818(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_818(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_820(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: v1166 = 1 + v949 && 2 <= v1166 52.11/17.91 f_820(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_822(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: 0 = 0 52.11/17.91 f_822(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_824(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: TRUE 52.11/17.91 f_824(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_826(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: 0 = 0 52.11/17.91 f_826(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v945, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_828(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: 0 = 0 52.11/17.91 f_828(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_830(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: 1 + v1170 = v950 52.11/17.91 f_830(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_832(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: 0 = 0 52.11/17.91 f_832(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_834(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: TRUE 52.11/17.91 f_834(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_836(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) :|: TRUE 52.11/17.91 f_836(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8, 2) -> f_773(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v950, 1, 0, v949, v1166, v1170, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: TRUE 52.11/17.91 f_773(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v945, 1, 0, v948, v949, v950, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) -> f_776(v931, v932, v933, v934, v935, v936, v937, v938, v939, v940, v941, v942, v943, v944, v945, 1, 0, v948, v949, v950, v951, v952, v953, v954, v955, v956, v957, v958, v959, v960, v961, v962, v963, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 Combined rules. Obtained 1 rulesP rules: 52.11/17.91 f_776(v931:0, v932:0, v933:0, v934:0, v935:0, v936:0, v937:0, v938:0, v939:0, v940:0, v941:0, v942:0, v943:0, v944:0, v945:0, 1, 0, v948:0, v949:0, 1 + v1170:0, v951:0, v952:0, v953:0, v954:0, v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, v963:0, 3, 7, 4, 8) -> f_776(v931:0, v932:0, v933:0, v934:0, v935:0, v936:0, v937:0, v938:0, v939:0, v940:0, v941:0, v942:0, v943:0, v944:0, 1 + v1170:0, 1, 0, v949:0, 1 + v949:0, v1170:0, v951:0, v952:0, v953:0, v954:0, v955:0, v956:0, v957:0, v958:0, v959:0, v960:0, v961:0, v962:0, v963:0, 3, 7, 4, 8) :|: v949:0 > 0 && v933:0 < 1 + v1170:0 52.11/17.91 Filtered unneeded arguments: 52.11/17.91 f_776(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33, x34, x35, x36, x37) -> f_776(x3, x19, x20) 52.11/17.91 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 52.11/17.91 f_776(v933:0, v949:0, sum~cons_1~v1170:0) -> f_776(v933:0, 1 + v949:0, v1170:0) :|: v949:0 > 0 && v933:0 < 1 + v1170:0 && sum~cons_1~v1170:0 = 1 + v1170:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (16) 52.11/17.91 Obligation: 52.11/17.91 Rules: 52.11/17.91 f_776(v933:0, v949:0, sum~cons_1~v1170:0) -> f_776(v933:0, 1 + v949:0, v1170:0) :|: v949:0 > 0 && v933:0 < 1 + v1170:0 && sum~cons_1~v1170:0 = 1 + v1170:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (17) IntTRSCompressionProof (EQUIVALENT) 52.11/17.91 Compressed rules. 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (18) 52.11/17.91 Obligation: 52.11/17.91 Rules: 52.11/17.91 f_776(v933:0:0, v949:0:0, sum~cons_1~v1170:0:0) -> f_776(v933:0:0, 1 + v949:0:0, v1170:0:0) :|: v949:0:0 > 0 && v933:0:0 < 1 + v1170:0:0 && sum~cons_1~v1170:0:0 = 1 + v1170:0:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (19) RankingReductionPairProof (EQUIVALENT) 52.11/17.91 Interpretation: 52.11/17.91 [ f_776 ] = -1*f_776_1 + f_776_3 52.11/17.91 52.11/17.91 The following rules are decreasing: 52.11/17.91 f_776(v933:0:0, v949:0:0, sum~cons_1~v1170:0:0) -> f_776(v933:0:0, 1 + v949:0:0, v1170:0:0) :|: v949:0:0 > 0 && v933:0:0 < 1 + v1170:0:0 && sum~cons_1~v1170:0:0 = 1 + v1170:0:0 52.11/17.91 52.11/17.91 The following rules are bounded: 52.11/17.91 f_776(v933:0:0, v949:0:0, sum~cons_1~v1170:0:0) -> f_776(v933:0:0, 1 + v949:0:0, v1170:0:0) :|: v949:0:0 > 0 && v933:0:0 < 1 + v1170:0:0 && sum~cons_1~v1170:0:0 = 1 + v1170:0:0 52.11/17.91 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (20) 52.11/17.91 YES 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (21) 52.11/17.91 Obligation: 52.11/17.91 SCC 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (22) SCC2IRS (SOUND) 52.11/17.91 Transformed LLVM symbolic execution graph SCC into a rewrite problem. Log: 52.11/17.91 Generated rules. Obtained 19 rulesP rules: 52.11/17.91 f_660(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v636, v637, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_663(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_663(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_666(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_666(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_668(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_668(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_670(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: v623 < v637 52.11/17.91 f_670(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_673(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_673(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_676(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: TRUE 52.11/17.91 f_676(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_679(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_679(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v636, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_682(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_682(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_685(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 1 + v687 = v637 52.11/17.91 f_685(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_688(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_688(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_691(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: TRUE 52.11/17.91 f_691(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_694(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_694(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_697(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 f_697(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_700(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) :|: v693 = 1 + v639 && 2 <= v693 52.11/17.91 f_700(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) -> f_703(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) :|: 0 = 0 52.11/17.91 f_703(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) -> f_706(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) :|: TRUE 52.11/17.91 f_706(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) -> f_710(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) :|: TRUE 52.11/17.91 f_710(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8, 2) -> f_657(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v637, v687, v639, v693, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: TRUE 52.11/17.91 f_657(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v636, v637, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) -> f_660(v621, v622, v623, v624, v625, v626, v627, v628, v629, v630, v631, v632, v633, v634, 1, v636, v637, v638, v639, v640, v641, v642, v643, v644, v645, v646, v647, v648, v649, v650, v651, v652, 0, 3, 7, 4, 8) :|: 0 = 0 52.11/17.91 Combined rules. Obtained 1 rulesP rules: 52.11/17.91 f_660(v621:0, v622:0, v623:0, v624:0, v625:0, v626:0, v627:0, v628:0, v629:0, v630:0, v631:0, v632:0, v633:0, v634:0, 1, v636:0, 1 + v687:0, v638:0, v639:0, v640:0, v641:0, v642:0, v643:0, v644:0, v645:0, v646:0, v647:0, v648:0, v649:0, v650:0, v651:0, v652:0, 0, 3, 7, 4, 8) -> f_660(v621:0, v622:0, v623:0, v624:0, v625:0, v626:0, v627:0, v628:0, v629:0, v630:0, v631:0, v632:0, v633:0, v634:0, 1, 1 + v687:0, v687:0, v639:0, 1 + v639:0, v640:0, v641:0, v642:0, v643:0, v644:0, v645:0, v646:0, v647:0, v648:0, v649:0, v650:0, v651:0, v652:0, 0, 3, 7, 4, 8) :|: v639:0 > 0 && v623:0 < 1 + v687:0 52.11/17.91 Filtered unneeded arguments: 52.11/17.91 f_660(x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15, x16, x17, x18, x19, x20, x21, x22, x23, x24, x25, x26, x27, x28, x29, x30, x31, x32, x33, x34, x35, x36, x37) -> f_660(x3, x17, x19) 52.11/17.91 Removed division, modulo operations, cleaned up constraints. Obtained 1 rules.P rules: 52.11/17.91 f_660(v623:0, sum~cons_1~v687:0, v639:0) -> f_660(v623:0, v687:0, 1 + v639:0) :|: v639:0 > 0 && v623:0 < 1 + v687:0 && sum~cons_1~v687:0 = 1 + v687:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (23) 52.11/17.91 Obligation: 52.11/17.91 Rules: 52.11/17.91 f_660(v623:0, sum~cons_1~v687:0, v639:0) -> f_660(v623:0, v687:0, 1 + v639:0) :|: v639:0 > 0 && v623:0 < 1 + v687:0 && sum~cons_1~v687:0 = 1 + v687:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (24) IntTRSCompressionProof (EQUIVALENT) 52.11/17.91 Compressed rules. 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (25) 52.11/17.91 Obligation: 52.11/17.91 Rules: 52.11/17.91 f_660(v623:0:0, sum~cons_1~v687:0:0, v639:0:0) -> f_660(v623:0:0, v687:0:0, 1 + v639:0:0) :|: v639:0:0 > 0 && v623:0:0 < 1 + v687:0:0 && sum~cons_1~v687:0:0 = 1 + v687:0:0 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (26) RankingReductionPairProof (EQUIVALENT) 52.11/17.91 Interpretation: 52.11/17.91 [ f_660 ] = -1*f_660_1 + f_660_2 52.11/17.91 52.11/17.91 The following rules are decreasing: 52.11/17.91 f_660(v623:0:0, sum~cons_1~v687:0:0, v639:0:0) -> f_660(v623:0:0, v687:0:0, 1 + v639:0:0) :|: v639:0:0 > 0 && v623:0:0 < 1 + v687:0:0 && sum~cons_1~v687:0:0 = 1 + v687:0:0 52.11/17.91 52.11/17.91 The following rules are bounded: 52.11/17.91 f_660(v623:0:0, sum~cons_1~v687:0:0, v639:0:0) -> f_660(v623:0:0, v687:0:0, 1 + v639:0:0) :|: v639:0:0 > 0 && v623:0:0 < 1 + v687:0:0 && sum~cons_1~v687:0:0 = 1 + v687:0:0 52.11/17.91 52.11/17.91 52.11/17.91 ---------------------------------------- 52.11/17.91 52.11/17.91 (27) 52.11/17.91 YES 52.13/21.57 EOF