71.43/34.39 YES 71.43/34.39 71.43/34.39 Ultimate: Cannot open display: 71.43/34.39 This is Ultimate 0.1.24-8dc7c08-m 71.43/34.39 [2019-03-28 12:39:16,060 INFO L170 SettingsManager]: Resetting all preferences to default values... 71.43/34.39 [2019-03-28 12:39:16,063 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values 71.43/34.39 [2019-03-28 12:39:16,074 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,075 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values 71.43/34.39 [2019-03-28 12:39:16,075 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values 71.43/34.39 [2019-03-28 12:39:16,077 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values 71.43/34.39 [2019-03-28 12:39:16,078 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values 71.43/34.39 [2019-03-28 12:39:16,080 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values 71.43/34.39 [2019-03-28 12:39:16,081 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values 71.43/34.39 [2019-03-28 12:39:16,082 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,082 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values 71.43/34.39 [2019-03-28 12:39:16,083 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values 71.43/34.39 [2019-03-28 12:39:16,084 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values 71.43/34.39 [2019-03-28 12:39:16,085 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values 71.43/34.39 [2019-03-28 12:39:16,086 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values 71.43/34.39 [2019-03-28 12:39:16,087 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values 71.43/34.39 [2019-03-28 12:39:16,088 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values 71.43/34.39 [2019-03-28 12:39:16,090 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values 71.43/34.39 [2019-03-28 12:39:16,092 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values 71.43/34.39 [2019-03-28 12:39:16,093 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values 71.43/34.39 [2019-03-28 12:39:16,094 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values 71.43/34.39 [2019-03-28 12:39:16,096 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,096 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,096 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values 71.43/34.39 [2019-03-28 12:39:16,097 INFO L174 SettingsManager]: Resetting IcfgToChc preferences to default values 71.43/34.39 [2019-03-28 12:39:16,098 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values 71.43/34.39 [2019-03-28 12:39:16,099 INFO L177 SettingsManager]: ReqToTest provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,099 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values 71.43/34.39 [2019-03-28 12:39:16,099 INFO L174 SettingsManager]: Resetting ChcSmtPrinter preferences to default values 71.43/34.39 [2019-03-28 12:39:16,100 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values 71.43/34.39 [2019-03-28 12:39:16,101 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values 71.43/34.39 [2019-03-28 12:39:16,102 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,102 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values 71.43/34.39 [2019-03-28 12:39:16,103 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,103 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... 71.43/34.39 [2019-03-28 12:39:16,103 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values 71.43/34.39 [2019-03-28 12:39:16,104 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values 71.43/34.39 [2019-03-28 12:39:16,105 INFO L181 SettingsManager]: Finished resetting all preferences to default values... 71.43/34.39 [2019-03-28 12:39:16,105 INFO L98 SettingsManager]: Beginning loading settings from /export/starexec/sandbox/solver/bin/./../termcomp2017.epf 71.43/34.39 [2019-03-28 12:39:16,120 INFO L110 SettingsManager]: Loading preferences was successful 71.43/34.39 [2019-03-28 12:39:16,120 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: 71.43/34.39 [2019-03-28 12:39:16,121 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: 71.43/34.39 [2019-03-28 12:39:16,122 INFO L133 SettingsManager]: * Rewrite not-equals=true 71.43/34.39 [2019-03-28 12:39:16,122 INFO L133 SettingsManager]: * Create parallel compositions if possible=false 71.43/34.39 [2019-03-28 12:39:16,122 INFO L133 SettingsManager]: * Minimize states using LBE with the strategy=SINGLE 71.43/34.39 [2019-03-28 12:39:16,122 INFO L133 SettingsManager]: * Use SBE=true 71.43/34.39 [2019-03-28 12:39:16,122 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: 71.43/34.39 [2019-03-28 12:39:16,123 INFO L133 SettingsManager]: * Use old map elimination=false 71.43/34.39 [2019-03-28 12:39:16,123 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false 71.43/34.39 [2019-03-28 12:39:16,123 INFO L133 SettingsManager]: * Buchi interpolant automaton construction strategy=DANDELION 71.43/34.39 [2019-03-28 12:39:16,123 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true 71.43/34.39 [2019-03-28 12:39:16,123 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES 71.43/34.39 [2019-03-28 12:39:16,123 INFO L133 SettingsManager]: * Construct termination proof for TermComp=true 71.43/34.39 [2019-03-28 12:39:16,124 INFO L133 SettingsManager]: * Command for external solver (GNTA synthesis)=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:12000 71.43/34.39 [2019-03-28 12:39:16,124 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: 71.43/34.39 [2019-03-28 12:39:16,124 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false 71.43/34.39 [2019-03-28 12:39:16,124 INFO L133 SettingsManager]: * Check division by zero=IGNORE 71.43/34.39 [2019-03-28 12:39:16,124 INFO L133 SettingsManager]: * Check if freed pointer was valid=false 71.43/34.39 [2019-03-28 12:39:16,125 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false 71.43/34.39 [2019-03-28 12:39:16,125 INFO L133 SettingsManager]: * How to treat unsigned ints differently from normal ones=IGNORE 71.43/34.39 [2019-03-28 12:39:16,125 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: 71.43/34.39 [2019-03-28 12:39:16,125 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements 71.43/34.39 [2019-03-28 12:39:16,125 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump 71.43/34.39 [2019-03-28 12:39:16,126 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 71.43/34.39 [2019-03-28 12:39:16,126 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: 71.43/34.39 [2019-03-28 12:39:16,126 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles 71.43/34.39 [2019-03-28 12:39:16,126 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL 71.43/34.39 [2019-03-28 12:39:16,126 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true 71.43/34.39 [2019-03-28 12:39:16,161 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp 71.43/34.39 [2019-03-28 12:39:16,175 INFO L259 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized 71.43/34.40 [2019-03-28 12:39:16,179 INFO L215 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. 71.43/34.40 [2019-03-28 12:39:16,180 INFO L271 PluginConnector]: Initializing CDTParser... 71.43/34.40 [2019-03-28 12:39:16,181 INFO L276 PluginConnector]: CDTParser initialized 71.43/34.40 [2019-03-28 12:39:16,181 INFO L430 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /export/starexec/sandbox/benchmark/theBenchmark.c 71.43/34.40 [2019-03-28 12:39:16,247 INFO L221 CDTParser]: Created temporary CDT project at /export/starexec/sandbox/tmp/365faa2671d0461faabe6aaa3f7e79e0/FLAG4a4f75b9a 71.43/34.40 [2019-03-28 12:39:16,608 INFO L307 CDTParser]: Found 1 translation units. 71.43/34.40 [2019-03-28 12:39:16,608 INFO L161 CDTParser]: Scanning /export/starexec/sandbox/benchmark/theBenchmark.c 71.43/34.40 [2019-03-28 12:39:16,609 WARN L117 ultiparseSymbolTable]: System include stdlib.h could not be resolved by CDT -- only built-in system includes are available. 71.43/34.40 [2019-03-28 12:39:16,616 INFO L355 CDTParser]: About to delete temporary CDT project at /export/starexec/sandbox/tmp/365faa2671d0461faabe6aaa3f7e79e0/FLAG4a4f75b9a 71.43/34.40 [2019-03-28 12:39:17,014 INFO L363 CDTParser]: Successfully deleted /export/starexec/sandbox/tmp/365faa2671d0461faabe6aaa3f7e79e0 71.43/34.40 [2019-03-28 12:39:17,026 INFO L297 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### 71.43/34.40 [2019-03-28 12:39:17,028 INFO L131 ToolchainWalker]: Walking toolchain with 7 elements. 71.43/34.40 [2019-03-28 12:39:17,029 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- 71.43/34.40 [2019-03-28 12:39:17,029 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... 71.43/34.40 [2019-03-28 12:39:17,032 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized 71.43/34.40 [2019-03-28 12:39:17,033 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,037 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@530aa035 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17, skipping insertion in model container 71.43/34.40 [2019-03-28 12:39:17,037 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,045 INFO L145 MainTranslator]: Starting translation in SV-COMP mode 71.43/34.40 [2019-03-28 12:39:17,068 INFO L176 MainTranslator]: Built tables and reachable declarations 71.43/34.40 [2019-03-28 12:39:17,242 INFO L206 PostProcessor]: Analyzing one entry point: main 71.43/34.40 [2019-03-28 12:39:17,254 INFO L191 MainTranslator]: Completed pre-run 71.43/34.40 [2019-03-28 12:39:17,332 INFO L206 PostProcessor]: Analyzing one entry point: main 71.43/34.40 [2019-03-28 12:39:17,349 INFO L195 MainTranslator]: Completed translation 71.43/34.40 [2019-03-28 12:39:17,349 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17 WrapperNode 71.43/34.40 [2019-03-28 12:39:17,349 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- 71.43/34.40 [2019-03-28 12:39:17,350 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- 71.43/34.40 [2019-03-28 12:39:17,350 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... 71.43/34.40 [2019-03-28 12:39:17,351 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized 71.43/34.40 [2019-03-28 12:39:17,360 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,369 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,394 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- 71.43/34.40 [2019-03-28 12:39:17,395 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- 71.43/34.40 [2019-03-28 12:39:17,395 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... 71.43/34.40 [2019-03-28 12:39:17,395 INFO L276 PluginConnector]: Boogie Preprocessor initialized 71.43/34.40 [2019-03-28 12:39:17,405 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,406 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,408 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,408 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,415 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,420 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,422 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,424 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- 71.43/34.40 [2019-03-28 12:39:17,424 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- 71.43/34.40 [2019-03-28 12:39:17,425 INFO L271 PluginConnector]: Initializing RCFGBuilder... 71.43/34.40 [2019-03-28 12:39:17,425 INFO L276 PluginConnector]: RCFGBuilder initialized 71.43/34.40 [2019-03-28 12:39:17,426 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (1/1) ... 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:4560 -smt2 -in -t:5000 71.43/34.40 [2019-03-28 12:39:17,489 INFO L130 BoogieDeclarations]: Found specification of procedure write~int 71.43/34.40 [2019-03-28 12:39:17,489 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start 71.43/34.40 [2019-03-28 12:39:17,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start 71.43/34.40 [2019-03-28 12:39:17,489 INFO L130 BoogieDeclarations]: Found specification of procedure read~int 71.43/34.40 [2019-03-28 12:39:17,489 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack 71.43/34.40 [2019-03-28 12:39:17,490 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc 71.43/34.40 [2019-03-28 12:39:17,783 INFO L281 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) 71.43/34.40 [2019-03-28 12:39:17,783 INFO L286 CfgBuilder]: Removed 8 assue(true) statements. 71.43/34.40 [2019-03-28 12:39:17,785 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:39:17 BoogieIcfgContainer 71.43/34.40 [2019-03-28 12:39:17,785 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- 71.43/34.40 [2019-03-28 12:39:17,786 INFO L113 PluginConnector]: ------------------------BlockEncodingV2---------------------------- 71.43/34.40 [2019-03-28 12:39:17,786 INFO L271 PluginConnector]: Initializing BlockEncodingV2... 71.43/34.40 [2019-03-28 12:39:17,788 INFO L276 PluginConnector]: BlockEncodingV2 initialized 71.43/34.40 [2019-03-28 12:39:17,789 INFO L185 PluginConnector]: Executing the observer BlockEncodingObserver from plugin BlockEncodingV2 for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:39:17" (1/1) ... 71.43/34.40 [2019-03-28 12:39:17,810 INFO L313 BlockEncoder]: Initial Icfg 38 locations, 47 edges 71.43/34.40 [2019-03-28 12:39:17,812 INFO L258 BlockEncoder]: Using Remove infeasible edges 71.43/34.40 [2019-03-28 12:39:17,812 INFO L263 BlockEncoder]: Using Maximize final states 71.43/34.40 [2019-03-28 12:39:17,813 INFO L270 BlockEncoder]: Using Minimize states even if more edges are added than removed.=false 71.43/34.40 [2019-03-28 12:39:17,813 INFO L276 BlockEncoder]: Using Minimize states using LBE with the strategy=SINGLE 71.43/34.40 [2019-03-28 12:39:17,815 INFO L296 BlockEncoder]: Using Remove sink states 71.43/34.40 [2019-03-28 12:39:17,816 INFO L171 BlockEncoder]: Using Apply optimizations until nothing changes=true 71.43/34.40 [2019-03-28 12:39:17,816 INFO L179 BlockEncoder]: Using Rewrite not-equals 71.43/34.40 [2019-03-28 12:39:17,843 INFO L185 BlockEncoder]: Using Use SBE 71.43/34.40 [2019-03-28 12:39:17,876 INFO L200 BlockEncoder]: SBE split 21 edges 71.43/34.40 [2019-03-28 12:39:17,881 INFO L70 emoveInfeasibleEdges]: Removed 2 edges and 0 locations because of local infeasibility 71.43/34.40 [2019-03-28 12:39:17,883 INFO L71 MaximizeFinalStates]: 0 new accepting states 71.43/34.40 [2019-03-28 12:39:17,907 INFO L100 BaseMinimizeStates]: Removed 8 edges and 4 locations by large block encoding 71.43/34.40 [2019-03-28 12:39:17,910 INFO L70 RemoveSinkStates]: Removed 5 edges and 2 locations by removing sink states 71.43/34.40 [2019-03-28 12:39:17,912 INFO L70 emoveInfeasibleEdges]: Removed 0 edges and 0 locations because of local infeasibility 71.43/34.40 [2019-03-28 12:39:17,912 INFO L71 MaximizeFinalStates]: 0 new accepting states 71.43/34.40 [2019-03-28 12:39:17,912 INFO L100 BaseMinimizeStates]: Removed 0 edges and 0 locations by large block encoding 71.43/34.40 [2019-03-28 12:39:17,913 INFO L70 RemoveSinkStates]: Removed 0 edges and 0 locations by removing sink states 71.43/34.40 [2019-03-28 12:39:17,914 INFO L313 BlockEncoder]: Encoded RCFG 32 locations, 61 edges 71.43/34.40 [2019-03-28 12:39:17,914 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:39:17 BasicIcfg 71.43/34.40 [2019-03-28 12:39:17,914 INFO L132 PluginConnector]: ------------------------ END BlockEncodingV2---------------------------- 71.43/34.40 [2019-03-28 12:39:17,915 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- 71.43/34.40 [2019-03-28 12:39:17,915 INFO L271 PluginConnector]: Initializing TraceAbstraction... 71.43/34.40 [2019-03-28 12:39:17,919 INFO L276 PluginConnector]: TraceAbstraction initialized 71.43/34.40 [2019-03-28 12:39:17,919 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.03 12:39:17" (1/4) ... 71.43/34.40 [2019-03-28 12:39:17,920 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@481d824 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 12:39:17, skipping insertion in model container 71.43/34.40 [2019-03-28 12:39:17,920 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (2/4) ... 71.43/34.40 [2019-03-28 12:39:17,921 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@481d824 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 12:39:17, skipping insertion in model container 71.43/34.40 [2019-03-28 12:39:17,921 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:39:17" (3/4) ... 71.43/34.40 [2019-03-28 12:39:17,921 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@481d824 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:39:17, skipping insertion in model container 71.43/34.40 [2019-03-28 12:39:17,921 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:39:17" (4/4) ... 71.43/34.40 [2019-03-28 12:39:17,923 INFO L112 eAbstractionObserver]: Analyzing ICFG theBenchmark.c_BEv2 71.43/34.40 [2019-03-28 12:39:17,933 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION 71.43/34.40 [2019-03-28 12:39:17,942 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 13 error locations. 71.43/34.40 [2019-03-28 12:39:17,959 INFO L257 AbstractCegarLoop]: Starting to check reachability of 13 error locations. 71.43/34.40 [2019-03-28 12:39:17,988 INFO L133 ementStrategyFactory]: Using default assertion order modulation 71.43/34.40 [2019-03-28 12:39:17,989 INFO L382 AbstractCegarLoop]: Interprodecural is true 71.43/34.40 [2019-03-28 12:39:17,989 INFO L383 AbstractCegarLoop]: Hoare is true 71.43/34.40 [2019-03-28 12:39:17,989 INFO L384 AbstractCegarLoop]: Compute interpolants for ForwardPredicates 71.43/34.40 [2019-03-28 12:39:17,989 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE 71.43/34.40 [2019-03-28 12:39:17,990 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION 71.43/34.40 [2019-03-28 12:39:17,990 INFO L387 AbstractCegarLoop]: Difference is false 71.43/34.40 [2019-03-28 12:39:17,990 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA 71.43/34.40 [2019-03-28 12:39:17,990 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== 71.43/34.40 [2019-03-28 12:39:18,005 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. 71.43/34.40 [2019-03-28 12:39:18,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 71.43/34.40 [2019-03-28 12:39:18,011 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:18,012 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:18,014 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:18,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:18,020 INFO L82 PathProgramCache]: Analyzing trace with hash 222869673, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:18,022 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:18,022 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:18,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:18,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:18,231 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:18,231 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 71.43/34.40 [2019-03-28 12:39:18,235 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 71.43/34.40 [2019-03-28 12:39:18,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 71.43/34.40 [2019-03-28 12:39:18,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:18,253 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. 71.43/34.40 [2019-03-28 12:39:18,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:18,415 INFO L93 Difference]: Finished difference Result 32 states and 61 transitions. 71.43/34.40 [2019-03-28 12:39:18,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:18,417 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 71.43/34.40 [2019-03-28 12:39:18,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:18,430 INFO L225 Difference]: With dead ends: 32 71.43/34.40 [2019-03-28 12:39:18,430 INFO L226 Difference]: Without dead ends: 31 71.43/34.40 [2019-03-28 12:39:18,434 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:18,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. 71.43/34.40 [2019-03-28 12:39:18,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. 71.43/34.40 [2019-03-28 12:39:18,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. 71.43/34.40 [2019-03-28 12:39:18,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 59 transitions. 71.43/34.40 [2019-03-28 12:39:18,474 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 59 transitions. Word has length 5 71.43/34.40 [2019-03-28 12:39:18,475 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:18,476 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 59 transitions. 71.43/34.40 [2019-03-28 12:39:18,476 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:18,476 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 59 transitions. 71.43/34.40 [2019-03-28 12:39:18,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 71.43/34.40 [2019-03-28 12:39:18,476 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:18,477 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:18,477 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:18,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:18,477 INFO L82 PathProgramCache]: Analyzing trace with hash 222869675, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:18,478 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:18,478 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:18,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,479 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,479 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:18,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:18,514 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:18,514 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 71.43/34.40 [2019-03-28 12:39:18,516 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:18,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:18,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:18,517 INFO L87 Difference]: Start difference. First operand 31 states and 59 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:18,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:18,605 INFO L93 Difference]: Finished difference Result 32 states and 59 transitions. 71.43/34.40 [2019-03-28 12:39:18,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:18,606 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 5 71.43/34.40 [2019-03-28 12:39:18,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:18,607 INFO L225 Difference]: With dead ends: 32 71.43/34.40 [2019-03-28 12:39:18,607 INFO L226 Difference]: Without dead ends: 31 71.43/34.40 [2019-03-28 12:39:18,609 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:18,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. 71.43/34.40 [2019-03-28 12:39:18,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. 71.43/34.40 [2019-03-28 12:39:18,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. 71.43/34.40 [2019-03-28 12:39:18,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 58 transitions. 71.43/34.40 [2019-03-28 12:39:18,614 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 58 transitions. Word has length 5 71.43/34.40 [2019-03-28 12:39:18,614 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:18,614 INFO L480 AbstractCegarLoop]: Abstraction has 31 states and 58 transitions. 71.43/34.40 [2019-03-28 12:39:18,614 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:18,615 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 58 transitions. 71.43/34.40 [2019-03-28 12:39:18,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 71.43/34.40 [2019-03-28 12:39:18,615 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:18,615 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:18,615 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:18,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:18,616 INFO L82 PathProgramCache]: Analyzing trace with hash 222869676, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:18,616 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:18,616 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:18,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,617 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,617 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:18,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:18,651 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:18,652 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 71.43/34.40 [2019-03-28 12:39:18,652 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 71.43/34.40 [2019-03-28 12:39:18,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 71.43/34.40 [2019-03-28 12:39:18,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:18,653 INFO L87 Difference]: Start difference. First operand 31 states and 58 transitions. Second operand 3 states. 71.43/34.40 [2019-03-28 12:39:18,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:18,746 INFO L93 Difference]: Finished difference Result 31 states and 58 transitions. 71.43/34.40 [2019-03-28 12:39:18,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:18,746 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 71.43/34.40 [2019-03-28 12:39:18,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:18,747 INFO L225 Difference]: With dead ends: 31 71.43/34.40 [2019-03-28 12:39:18,747 INFO L226 Difference]: Without dead ends: 30 71.43/34.40 [2019-03-28 12:39:18,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:18,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. 71.43/34.40 [2019-03-28 12:39:18,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. 71.43/34.40 [2019-03-28 12:39:18,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. 71.43/34.40 [2019-03-28 12:39:18,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 57 transitions. 71.43/34.40 [2019-03-28 12:39:18,753 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 57 transitions. Word has length 5 71.43/34.40 [2019-03-28 12:39:18,753 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:18,753 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 57 transitions. 71.43/34.40 [2019-03-28 12:39:18,753 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:18,753 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 57 transitions. 71.43/34.40 [2019-03-28 12:39:18,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 71.43/34.40 [2019-03-28 12:39:18,754 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:18,754 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:18,754 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:18,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:18,755 INFO L82 PathProgramCache]: Analyzing trace with hash -1680976855, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:18,755 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:18,755 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:18,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:18,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:18,785 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:18,785 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 71.43/34.40 [2019-03-28 12:39:18,786 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 71.43/34.40 [2019-03-28 12:39:18,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 71.43/34.40 [2019-03-28 12:39:18,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:18,787 INFO L87 Difference]: Start difference. First operand 30 states and 57 transitions. Second operand 3 states. 71.43/34.40 [2019-03-28 12:39:18,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:18,853 INFO L93 Difference]: Finished difference Result 30 states and 57 transitions. 71.43/34.40 [2019-03-28 12:39:18,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:18,854 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 6 71.43/34.40 [2019-03-28 12:39:18,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:18,855 INFO L225 Difference]: With dead ends: 30 71.43/34.40 [2019-03-28 12:39:18,855 INFO L226 Difference]: Without dead ends: 29 71.43/34.40 [2019-03-28 12:39:18,856 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:18,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. 71.43/34.40 [2019-03-28 12:39:18,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. 71.43/34.40 [2019-03-28 12:39:18,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. 71.43/34.40 [2019-03-28 12:39:18,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 55 transitions. 71.43/34.40 [2019-03-28 12:39:18,860 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 55 transitions. Word has length 6 71.43/34.40 [2019-03-28 12:39:18,860 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:18,860 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 55 transitions. 71.43/34.40 [2019-03-28 12:39:18,861 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:18,861 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 55 transitions. 71.43/34.40 [2019-03-28 12:39:18,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 71.43/34.40 [2019-03-28 12:39:18,861 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:18,861 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:18,862 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:18,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:18,862 INFO L82 PathProgramCache]: Analyzing trace with hash -1680976853, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:18,862 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:18,862 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:18,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,864 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:18,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:18,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:18,914 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:18,914 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 71.43/34.40 [2019-03-28 12:39:18,914 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 71.43/34.40 [2019-03-28 12:39:18,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 71.43/34.40 [2019-03-28 12:39:18,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:18,915 INFO L87 Difference]: Start difference. First operand 29 states and 55 transitions. Second operand 3 states. 71.43/34.40 [2019-03-28 12:39:19,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:19,024 INFO L93 Difference]: Finished difference Result 30 states and 55 transitions. 71.43/34.40 [2019-03-28 12:39:19,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:19,024 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 6 71.43/34.40 [2019-03-28 12:39:19,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:19,025 INFO L225 Difference]: With dead ends: 30 71.43/34.40 [2019-03-28 12:39:19,025 INFO L226 Difference]: Without dead ends: 29 71.43/34.40 [2019-03-28 12:39:19,026 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:19,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. 71.43/34.40 [2019-03-28 12:39:19,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. 71.43/34.40 [2019-03-28 12:39:19,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. 71.43/34.40 [2019-03-28 12:39:19,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:19,031 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 54 transitions. Word has length 6 71.43/34.40 [2019-03-28 12:39:19,031 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:19,031 INFO L480 AbstractCegarLoop]: Abstraction has 29 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:19,031 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:19,031 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:19,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 71.43/34.40 [2019-03-28 12:39:19,032 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:19,032 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:19,032 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:19,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:19,032 INFO L82 PathProgramCache]: Analyzing trace with hash -1680976852, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:19,033 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:19,033 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:19,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,034 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:19,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:19,069 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:19,069 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 71.43/34.40 [2019-03-28 12:39:19,069 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:19,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:19,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:19,070 INFO L87 Difference]: Start difference. First operand 29 states and 54 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:19,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:19,140 INFO L93 Difference]: Finished difference Result 29 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:19,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:19,140 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 6 71.43/34.40 [2019-03-28 12:39:19,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:19,142 INFO L225 Difference]: With dead ends: 29 71.43/34.40 [2019-03-28 12:39:19,142 INFO L226 Difference]: Without dead ends: 28 71.43/34.40 [2019-03-28 12:39:19,142 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:19,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. 71.43/34.40 [2019-03-28 12:39:19,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. 71.43/34.40 [2019-03-28 12:39:19,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. 71.43/34.40 [2019-03-28 12:39:19,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 53 transitions. 71.43/34.40 [2019-03-28 12:39:19,147 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 53 transitions. Word has length 6 71.43/34.40 [2019-03-28 12:39:19,147 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:19,147 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 53 transitions. 71.43/34.40 [2019-03-28 12:39:19,147 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:19,147 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 53 transitions. 71.43/34.40 [2019-03-28 12:39:19,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 71.43/34.40 [2019-03-28 12:39:19,148 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:19,148 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:19,148 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:19,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:19,149 INFO L82 PathProgramCache]: Analyzing trace with hash 1338449498, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:19,149 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:19,149 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:19,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,150 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,150 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:19,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:19,193 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:19,193 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.43/34.40 [2019-03-28 12:39:19,194 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:19,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:19,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:19,195 INFO L87 Difference]: Start difference. First operand 28 states and 53 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:19,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:19,291 INFO L93 Difference]: Finished difference Result 52 states and 95 transitions. 71.43/34.40 [2019-03-28 12:39:19,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:19,291 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 71.43/34.40 [2019-03-28 12:39:19,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:19,292 INFO L225 Difference]: With dead ends: 52 71.43/34.40 [2019-03-28 12:39:19,292 INFO L226 Difference]: Without dead ends: 31 71.43/34.40 [2019-03-28 12:39:19,293 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:19,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. 71.43/34.40 [2019-03-28 12:39:19,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 28. 71.43/34.40 [2019-03-28 12:39:19,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. 71.43/34.40 [2019-03-28 12:39:19,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 51 transitions. 71.43/34.40 [2019-03-28 12:39:19,297 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 51 transitions. Word has length 9 71.43/34.40 [2019-03-28 12:39:19,297 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:19,297 INFO L480 AbstractCegarLoop]: Abstraction has 28 states and 51 transitions. 71.43/34.40 [2019-03-28 12:39:19,298 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:19,298 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 51 transitions. 71.43/34.40 [2019-03-28 12:39:19,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 71.43/34.40 [2019-03-28 12:39:19,298 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:19,298 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:19,299 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:19,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:19,299 INFO L82 PathProgramCache]: Analyzing trace with hash -1455669111, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:19,299 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:19,299 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:19,300 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,301 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,301 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:19,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:19,343 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:19,343 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 71.43/34.40 [2019-03-28 12:39:19,343 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states 71.43/34.40 [2019-03-28 12:39:19,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 71.43/34.40 [2019-03-28 12:39:19,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:19,344 INFO L87 Difference]: Start difference. First operand 28 states and 51 transitions. Second operand 5 states. 71.43/34.40 [2019-03-28 12:39:19,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:19,505 INFO L93 Difference]: Finished difference Result 76 states and 138 transitions. 71.43/34.40 [2019-03-28 12:39:19,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:19,505 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 10 71.43/34.40 [2019-03-28 12:39:19,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:19,506 INFO L225 Difference]: With dead ends: 76 71.43/34.40 [2019-03-28 12:39:19,506 INFO L226 Difference]: Without dead ends: 55 71.43/34.40 [2019-03-28 12:39:19,507 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 71.43/34.40 [2019-03-28 12:39:19,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. 71.43/34.40 [2019-03-28 12:39:19,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 37. 71.43/34.40 [2019-03-28 12:39:19,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. 71.43/34.40 [2019-03-28 12:39:19,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:19,514 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 74 transitions. Word has length 10 71.43/34.40 [2019-03-28 12:39:19,514 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:19,514 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:19,514 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:19,515 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:19,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 71.43/34.40 [2019-03-28 12:39:19,515 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:19,515 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:19,516 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:19,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:19,516 INFO L82 PathProgramCache]: Analyzing trace with hash -1455669080, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:19,516 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:19,516 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:19,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,517 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,517 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:19,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:19,551 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:19,551 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.43/34.40 [2019-03-28 12:39:19,551 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:19,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:19,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:19,552 INFO L87 Difference]: Start difference. First operand 37 states and 74 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:19,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:19,653 INFO L93 Difference]: Finished difference Result 64 states and 122 transitions. 71.43/34.40 [2019-03-28 12:39:19,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:19,654 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 71.43/34.40 [2019-03-28 12:39:19,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:19,654 INFO L225 Difference]: With dead ends: 64 71.43/34.40 [2019-03-28 12:39:19,655 INFO L226 Difference]: Without dead ends: 38 71.43/34.40 [2019-03-28 12:39:19,655 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:19,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. 71.43/34.40 [2019-03-28 12:39:19,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 36. 71.43/34.40 [2019-03-28 12:39:19,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. 71.43/34.40 [2019-03-28 12:39:19,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 63 transitions. 71.43/34.40 [2019-03-28 12:39:19,660 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 63 transitions. Word has length 10 71.43/34.40 [2019-03-28 12:39:19,660 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:19,661 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 63 transitions. 71.43/34.40 [2019-03-28 12:39:19,661 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:19,661 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 63 transitions. 71.43/34.40 [2019-03-28 12:39:19,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 71.43/34.40 [2019-03-28 12:39:19,662 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:19,662 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:19,662 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:19,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:19,663 INFO L82 PathProgramCache]: Analyzing trace with hash 659492473, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:19,663 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:19,663 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:19,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:19,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:19,749 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:19,749 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 71.43/34.40 [2019-03-28 12:39:19,750 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 71.43/34.40 [2019-03-28 12:39:19,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 71.43/34.40 [2019-03-28 12:39:19,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 71.43/34.40 [2019-03-28 12:39:19,750 INFO L87 Difference]: Start difference. First operand 36 states and 63 transitions. Second operand 6 states. 71.43/34.40 [2019-03-28 12:39:19,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:19,934 INFO L93 Difference]: Finished difference Result 51 states and 90 transitions. 71.43/34.40 [2019-03-28 12:39:19,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:19,934 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 10 71.43/34.40 [2019-03-28 12:39:19,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:19,935 INFO L225 Difference]: With dead ends: 51 71.43/34.40 [2019-03-28 12:39:19,935 INFO L226 Difference]: Without dead ends: 50 71.43/34.40 [2019-03-28 12:39:19,936 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 71.43/34.40 [2019-03-28 12:39:19,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. 71.43/34.40 [2019-03-28 12:39:19,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 37. 71.43/34.40 [2019-03-28 12:39:19,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. 71.43/34.40 [2019-03-28 12:39:19,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 66 transitions. 71.43/34.40 [2019-03-28 12:39:19,941 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 66 transitions. Word has length 10 71.43/34.40 [2019-03-28 12:39:19,941 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:19,942 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 66 transitions. 71.43/34.40 [2019-03-28 12:39:19,942 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:19,942 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 66 transitions. 71.43/34.40 [2019-03-28 12:39:19,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 71.43/34.40 [2019-03-28 12:39:19,942 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:19,943 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:19,943 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:19,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:19,943 INFO L82 PathProgramCache]: Analyzing trace with hash 659492471, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:19,943 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:19,944 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:19,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,945 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,945 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:19,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:19,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:19,979 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:19,979 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 71.43/34.40 [2019-03-28 12:39:19,979 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:19,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:19,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:19,980 INFO L87 Difference]: Start difference. First operand 37 states and 66 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:20,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:20,065 INFO L93 Difference]: Finished difference Result 37 states and 66 transitions. 71.43/34.40 [2019-03-28 12:39:20,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:20,066 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 71.43/34.40 [2019-03-28 12:39:20,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:20,067 INFO L225 Difference]: With dead ends: 37 71.43/34.40 [2019-03-28 12:39:20,067 INFO L226 Difference]: Without dead ends: 36 71.43/34.40 [2019-03-28 12:39:20,067 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:20,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. 71.43/34.40 [2019-03-28 12:39:20,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. 71.43/34.40 [2019-03-28 12:39:20,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. 71.43/34.40 [2019-03-28 12:39:20,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 62 transitions. 71.43/34.40 [2019-03-28 12:39:20,071 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 62 transitions. Word has length 10 71.43/34.40 [2019-03-28 12:39:20,072 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:20,072 INFO L480 AbstractCegarLoop]: Abstraction has 36 states and 62 transitions. 71.43/34.40 [2019-03-28 12:39:20,072 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:20,072 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 62 transitions. 71.43/34.40 [2019-03-28 12:39:20,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 71.43/34.40 [2019-03-28 12:39:20,073 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:20,073 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:20,073 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:20,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:20,074 INFO L82 PathProgramCache]: Analyzing trace with hash 2118847463, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:20,074 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:20,074 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:20,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,075 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:20,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:20,106 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:20,106 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.43/34.40 [2019-03-28 12:39:20,106 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:20,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:20,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:20,107 INFO L87 Difference]: Start difference. First operand 36 states and 62 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:20,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:20,198 INFO L93 Difference]: Finished difference Result 48 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:20,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:20,199 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:20,200 INFO L225 Difference]: With dead ends: 48 71.43/34.40 [2019-03-28 12:39:20,200 INFO L226 Difference]: Without dead ends: 46 71.43/34.40 [2019-03-28 12:39:20,200 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:20,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:20,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 39. 71.43/34.40 [2019-03-28 12:39:20,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. 71.43/34.40 [2019-03-28 12:39:20,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 72 transitions. 71.43/34.40 [2019-03-28 12:39:20,205 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 72 transitions. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,205 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:20,205 INFO L480 AbstractCegarLoop]: Abstraction has 39 states and 72 transitions. 71.43/34.40 [2019-03-28 12:39:20,206 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:20,206 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 72 transitions. 71.43/34.40 [2019-03-28 12:39:20,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 71.43/34.40 [2019-03-28 12:39:20,206 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:20,206 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:20,207 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:20,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:20,207 INFO L82 PathProgramCache]: Analyzing trace with hash 2118847494, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:20,207 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:20,207 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:20,208 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,208 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,209 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:20,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:20,233 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:20,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.43/34.40 [2019-03-28 12:39:20,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:20,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:20,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:20,234 INFO L87 Difference]: Start difference. First operand 39 states and 72 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:20,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:20,352 INFO L93 Difference]: Finished difference Result 53 states and 96 transitions. 71.43/34.40 [2019-03-28 12:39:20,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:20,352 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:20,353 INFO L225 Difference]: With dead ends: 53 71.43/34.40 [2019-03-28 12:39:20,353 INFO L226 Difference]: Without dead ends: 51 71.43/34.40 [2019-03-28 12:39:20,354 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:20,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. 71.43/34.40 [2019-03-28 12:39:20,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. 71.43/34.40 [2019-03-28 12:39:20,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:20,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 90 transitions. 71.43/34.40 [2019-03-28 12:39:20,359 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 90 transitions. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,359 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:20,359 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 90 transitions. 71.43/34.40 [2019-03-28 12:39:20,359 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:20,359 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 90 transitions. 71.43/34.40 [2019-03-28 12:39:20,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 71.43/34.40 [2019-03-28 12:39:20,360 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:20,360 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:20,361 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:20,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:20,361 INFO L82 PathProgramCache]: Analyzing trace with hash -1030572099, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:20,361 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:20,361 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:20,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,362 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,362 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:20,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:20,411 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:20,411 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.43/34.40 [2019-03-28 12:39:20,412 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states 71.43/34.40 [2019-03-28 12:39:20,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 71.43/34.40 [2019-03-28 12:39:20,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:20,412 INFO L87 Difference]: Start difference. First operand 46 states and 90 transitions. Second operand 5 states. 71.43/34.40 [2019-03-28 12:39:20,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:20,515 INFO L93 Difference]: Finished difference Result 46 states and 90 transitions. 71.43/34.40 [2019-03-28 12:39:20,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:20,515 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:20,516 INFO L225 Difference]: With dead ends: 46 71.43/34.40 [2019-03-28 12:39:20,516 INFO L226 Difference]: Without dead ends: 44 71.43/34.40 [2019-03-28 12:39:20,516 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 71.43/34.40 [2019-03-28 12:39:20,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. 71.43/34.40 [2019-03-28 12:39:20,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. 71.43/34.40 [2019-03-28 12:39:20,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. 71.43/34.40 [2019-03-28 12:39:20,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 82 transitions. 71.43/34.40 [2019-03-28 12:39:20,521 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 82 transitions. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,522 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:20,522 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 82 transitions. 71.43/34.40 [2019-03-28 12:39:20,522 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:20,522 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 82 transitions. 71.43/34.40 [2019-03-28 12:39:20,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 71.43/34.40 [2019-03-28 12:39:20,523 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:20,523 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:20,523 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:20,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:20,523 INFO L82 PathProgramCache]: Analyzing trace with hash -1030572097, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:20,523 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:20,524 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:20,524 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,525 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:20,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:20,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:20,568 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.43/34.40 [2019-03-28 12:39:20,568 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states 71.43/34.40 [2019-03-28 12:39:20,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 71.43/34.40 [2019-03-28 12:39:20,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:20,569 INFO L87 Difference]: Start difference. First operand 44 states and 82 transitions. Second operand 5 states. 71.43/34.40 [2019-03-28 12:39:20,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:20,690 INFO L93 Difference]: Finished difference Result 57 states and 99 transitions. 71.43/34.40 [2019-03-28 12:39:20,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:20,690 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:20,691 INFO L225 Difference]: With dead ends: 57 71.43/34.40 [2019-03-28 12:39:20,691 INFO L226 Difference]: Without dead ends: 55 71.43/34.40 [2019-03-28 12:39:20,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 71.43/34.40 [2019-03-28 12:39:20,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. 71.43/34.40 [2019-03-28 12:39:20,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 46. 71.43/34.40 [2019-03-28 12:39:20,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:20,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 86 transitions. 71.43/34.40 [2019-03-28 12:39:20,697 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 86 transitions. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,697 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:20,697 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 86 transitions. 71.43/34.40 [2019-03-28 12:39:20,698 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:20,698 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 86 transitions. 71.43/34.40 [2019-03-28 12:39:20,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 71.43/34.40 [2019-03-28 12:39:20,698 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:20,698 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:20,699 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:20,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:20,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1030572096, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:20,699 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:20,699 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:20,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,701 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,701 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:20,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:20,768 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:20,768 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 71.43/34.40 [2019-03-28 12:39:20,768 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 71.43/34.40 [2019-03-28 12:39:20,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 71.43/34.40 [2019-03-28 12:39:20,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 71.43/34.40 [2019-03-28 12:39:20,769 INFO L87 Difference]: Start difference. First operand 46 states and 86 transitions. Second operand 6 states. 71.43/34.40 [2019-03-28 12:39:20,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:20,923 INFO L93 Difference]: Finished difference Result 47 states and 86 transitions. 71.43/34.40 [2019-03-28 12:39:20,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:20,924 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:20,924 INFO L225 Difference]: With dead ends: 47 71.43/34.40 [2019-03-28 12:39:20,924 INFO L226 Difference]: Without dead ends: 46 71.43/34.40 [2019-03-28 12:39:20,925 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 71.43/34.40 [2019-03-28 12:39:20,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:20,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. 71.43/34.40 [2019-03-28 12:39:20,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:20,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 85 transitions. 71.43/34.40 [2019-03-28 12:39:20,930 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 85 transitions. Word has length 11 71.43/34.40 [2019-03-28 12:39:20,930 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:20,930 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 85 transitions. 71.43/34.40 [2019-03-28 12:39:20,930 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:20,930 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 85 transitions. 71.43/34.40 [2019-03-28 12:39:20,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 71.43/34.40 [2019-03-28 12:39:20,931 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:20,931 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:20,931 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:20,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:20,932 INFO L82 PathProgramCache]: Analyzing trace with hash 1259688043, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:20,932 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:20,932 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:20,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,933 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,933 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:20,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:20,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:20,966 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:20,966 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 71.43/34.40 [2019-03-28 12:39:20,966 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states 71.43/34.40 [2019-03-28 12:39:20,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 71.43/34.40 [2019-03-28 12:39:20,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:20,967 INFO L87 Difference]: Start difference. First operand 46 states and 85 transitions. Second operand 5 states. 71.43/34.40 [2019-03-28 12:39:21,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:21,026 INFO L93 Difference]: Finished difference Result 56 states and 101 transitions. 71.43/34.40 [2019-03-28 12:39:21,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:21,027 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 71.43/34.40 [2019-03-28 12:39:21,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:21,028 INFO L225 Difference]: With dead ends: 56 71.43/34.40 [2019-03-28 12:39:21,028 INFO L226 Difference]: Without dead ends: 46 71.43/34.40 [2019-03-28 12:39:21,028 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:21,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:21,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. 71.43/34.40 [2019-03-28 12:39:21,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:21,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 81 transitions. 71.43/34.40 [2019-03-28 12:39:21,032 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 81 transitions. Word has length 12 71.43/34.40 [2019-03-28 12:39:21,033 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:21,033 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 81 transitions. 71.43/34.40 [2019-03-28 12:39:21,033 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:21,033 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 81 transitions. 71.43/34.40 [2019-03-28 12:39:21,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 71.43/34.40 [2019-03-28 12:39:21,034 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:21,034 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:21,034 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:21,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:21,034 INFO L82 PathProgramCache]: Analyzing trace with hash 1259688074, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:21,035 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:21,035 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:21,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,036 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,036 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:21,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:21,095 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:21,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 71.43/34.40 [2019-03-28 12:39:21,095 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 71.43/34.40 [2019-03-28 12:39:21,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 71.43/34.40 [2019-03-28 12:39:21,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 71.43/34.40 [2019-03-28 12:39:21,096 INFO L87 Difference]: Start difference. First operand 46 states and 81 transitions. Second operand 6 states. 71.43/34.40 [2019-03-28 12:39:21,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:21,231 INFO L93 Difference]: Finished difference Result 54 states and 92 transitions. 71.43/34.40 [2019-03-28 12:39:21,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:21,231 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 12 71.43/34.40 [2019-03-28 12:39:21,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:21,232 INFO L225 Difference]: With dead ends: 54 71.43/34.40 [2019-03-28 12:39:21,232 INFO L226 Difference]: Without dead ends: 53 71.43/34.40 [2019-03-28 12:39:21,233 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 71.43/34.40 [2019-03-28 12:39:21,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. 71.43/34.40 [2019-03-28 12:39:21,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 46. 71.43/34.40 [2019-03-28 12:39:21,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:21,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,237 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 80 transitions. Word has length 12 71.43/34.40 [2019-03-28 12:39:21,237 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:21,237 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,237 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:21,237 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 71.43/34.40 [2019-03-28 12:39:21,238 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:21,238 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:21,239 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:21,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:21,239 INFO L82 PathProgramCache]: Analyzing trace with hash -620594832, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:21,239 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:21,239 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:21,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,240 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,240 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:21,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:21,268 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:21,268 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 71.43/34.40 [2019-03-28 12:39:21,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:21,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:21,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:21,269 INFO L87 Difference]: Start difference. First operand 46 states and 80 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:21,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:21,341 INFO L93 Difference]: Finished difference Result 46 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:21,341 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:21,342 INFO L225 Difference]: With dead ends: 46 71.43/34.40 [2019-03-28 12:39:21,342 INFO L226 Difference]: Without dead ends: 45 71.43/34.40 [2019-03-28 12:39:21,343 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:21,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. 71.43/34.40 [2019-03-28 12:39:21,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. 71.43/34.40 [2019-03-28 12:39:21,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. 71.43/34.40 [2019-03-28 12:39:21,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 78 transitions. 71.43/34.40 [2019-03-28 12:39:21,346 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 78 transitions. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,347 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:21,347 INFO L480 AbstractCegarLoop]: Abstraction has 45 states and 78 transitions. 71.43/34.40 [2019-03-28 12:39:21,347 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:21,347 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 78 transitions. 71.43/34.40 [2019-03-28 12:39:21,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 71.43/34.40 [2019-03-28 12:39:21,348 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:21,348 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:21,348 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:21,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:21,348 INFO L82 PathProgramCache]: Analyzing trace with hash -620594830, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:21,349 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:21,349 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:21,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,350 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:21,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:21,411 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:21,411 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 71.43/34.40 [2019-03-28 12:39:21,411 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 71.43/34.40 [2019-03-28 12:39:21,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 71.43/34.40 [2019-03-28 12:39:21,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 71.43/34.40 [2019-03-28 12:39:21,412 INFO L87 Difference]: Start difference. First operand 45 states and 78 transitions. Second operand 6 states. 71.43/34.40 [2019-03-28 12:39:21,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:21,584 INFO L93 Difference]: Finished difference Result 49 states and 85 transitions. 71.43/34.40 [2019-03-28 12:39:21,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:21,586 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:21,587 INFO L225 Difference]: With dead ends: 49 71.43/34.40 [2019-03-28 12:39:21,587 INFO L226 Difference]: Without dead ends: 48 71.43/34.40 [2019-03-28 12:39:21,588 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 71.43/34.40 [2019-03-28 12:39:21,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. 71.43/34.40 [2019-03-28 12:39:21,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 47. 71.43/34.40 [2019-03-28 12:39:21,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. 71.43/34.40 [2019-03-28 12:39:21,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,591 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 80 transitions. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,592 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:21,592 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,592 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:21,592 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 71.43/34.40 [2019-03-28 12:39:21,593 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:21,593 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:21,593 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:21,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:21,593 INFO L82 PathProgramCache]: Analyzing trace with hash -1349746105, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:21,594 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:21,594 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:21,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,595 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,595 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:21,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:21,621 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:21,621 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 71.43/34.40 [2019-03-28 12:39:21,621 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 71.43/34.40 [2019-03-28 12:39:21,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 71.43/34.40 [2019-03-28 12:39:21,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:21,622 INFO L87 Difference]: Start difference. First operand 47 states and 80 transitions. Second operand 3 states. 71.43/34.40 [2019-03-28 12:39:21,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:21,669 INFO L93 Difference]: Finished difference Result 48 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:21,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:21,670 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:21,671 INFO L225 Difference]: With dead ends: 48 71.43/34.40 [2019-03-28 12:39:21,671 INFO L226 Difference]: Without dead ends: 47 71.43/34.40 [2019-03-28 12:39:21,671 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:21,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. 71.43/34.40 [2019-03-28 12:39:21,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. 71.43/34.40 [2019-03-28 12:39:21,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. 71.43/34.40 [2019-03-28 12:39:21,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 79 transitions. 71.43/34.40 [2019-03-28 12:39:21,675 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 79 transitions. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,675 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:21,675 INFO L480 AbstractCegarLoop]: Abstraction has 47 states and 79 transitions. 71.43/34.40 [2019-03-28 12:39:21,675 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:21,676 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 79 transitions. 71.43/34.40 [2019-03-28 12:39:21,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 71.43/34.40 [2019-03-28 12:39:21,676 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:21,676 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:21,677 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:21,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:21,677 INFO L82 PathProgramCache]: Analyzing trace with hash -1349746104, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:21,677 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:21,677 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:21,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,678 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:21,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:21,702 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:21,702 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 71.43/34.40 [2019-03-28 12:39:21,702 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states 71.43/34.40 [2019-03-28 12:39:21,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. 71.43/34.40 [2019-03-28 12:39:21,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:21,703 INFO L87 Difference]: Start difference. First operand 47 states and 79 transitions. Second operand 3 states. 71.43/34.40 [2019-03-28 12:39:21,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:21,746 INFO L93 Difference]: Finished difference Result 47 states and 79 transitions. 71.43/34.40 [2019-03-28 12:39:21,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:21,747 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:21,748 INFO L225 Difference]: With dead ends: 47 71.43/34.40 [2019-03-28 12:39:21,748 INFO L226 Difference]: Without dead ends: 45 71.43/34.40 [2019-03-28 12:39:21,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 71.43/34.40 [2019-03-28 12:39:21,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. 71.43/34.40 [2019-03-28 12:39:21,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 37. 71.43/34.40 [2019-03-28 12:39:21,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. 71.43/34.40 [2019-03-28 12:39:21,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 55 transitions. 71.43/34.40 [2019-03-28 12:39:21,752 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 55 transitions. Word has length 14 71.43/34.40 [2019-03-28 12:39:21,752 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:21,752 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 55 transitions. 71.43/34.40 [2019-03-28 12:39:21,753 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. 71.43/34.40 [2019-03-28 12:39:21,753 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 55 transitions. 71.43/34.40 [2019-03-28 12:39:21,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 71.43/34.40 [2019-03-28 12:39:21,754 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:21,754 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:21,754 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:21,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:21,755 INFO L82 PathProgramCache]: Analyzing trace with hash 1107468904, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:21,755 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:21,755 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:21,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,756 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:21,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:21,806 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:21,806 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 71.43/34.40 [2019-03-28 12:39:21,807 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states 71.43/34.40 [2019-03-28 12:39:21,807 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. 71.43/34.40 [2019-03-28 12:39:21,807 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 71.43/34.40 [2019-03-28 12:39:21,807 INFO L87 Difference]: Start difference. First operand 37 states and 55 transitions. Second operand 6 states. 71.43/34.40 [2019-03-28 12:39:21,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:21,933 INFO L93 Difference]: Finished difference Result 43 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:21,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:21,934 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15 71.43/34.40 [2019-03-28 12:39:21,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:21,935 INFO L225 Difference]: With dead ends: 43 71.43/34.40 [2019-03-28 12:39:21,935 INFO L226 Difference]: Without dead ends: 42 71.43/34.40 [2019-03-28 12:39:21,935 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 71.43/34.40 [2019-03-28 12:39:21,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. 71.43/34.40 [2019-03-28 12:39:21,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 37. 71.43/34.40 [2019-03-28 12:39:21,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. 71.43/34.40 [2019-03-28 12:39:21,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:21,939 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 54 transitions. Word has length 15 71.43/34.40 [2019-03-28 12:39:21,939 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:21,939 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:21,939 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. 71.43/34.40 [2019-03-28 12:39:21,939 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:21,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 71.43/34.40 [2019-03-28 12:39:21,940 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:21,940 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:21,941 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:21,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:21,941 INFO L82 PathProgramCache]: Analyzing trace with hash 1107468905, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:21,941 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:21,941 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:21,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,942 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,942 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:21,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:21,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:21,969 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:21,969 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.43/34.40 [2019-03-28 12:39:21,969 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states 71.43/34.40 [2019-03-28 12:39:21,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.43/34.40 [2019-03-28 12:39:21,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:21,970 INFO L87 Difference]: Start difference. First operand 37 states and 54 transitions. Second operand 4 states. 71.43/34.40 [2019-03-28 12:39:22,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:22,048 INFO L93 Difference]: Finished difference Result 51 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:22,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:22,048 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 71.43/34.40 [2019-03-28 12:39:22,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:22,049 INFO L225 Difference]: With dead ends: 51 71.43/34.40 [2019-03-28 12:39:22,049 INFO L226 Difference]: Without dead ends: 43 71.43/34.40 [2019-03-28 12:39:22,049 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.43/34.40 [2019-03-28 12:39:22,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. 71.43/34.40 [2019-03-28 12:39:22,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 40. 71.43/34.40 [2019-03-28 12:39:22,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. 71.43/34.40 [2019-03-28 12:39:22,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 62 transitions. 71.43/34.40 [2019-03-28 12:39:22,053 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 62 transitions. Word has length 15 71.43/34.40 [2019-03-28 12:39:22,053 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:22,053 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 62 transitions. 71.43/34.40 [2019-03-28 12:39:22,053 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:22,054 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 62 transitions. 71.43/34.40 [2019-03-28 12:39:22,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 71.43/34.40 [2019-03-28 12:39:22,054 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:22,054 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:22,055 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:22,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:22,055 INFO L82 PathProgramCache]: Analyzing trace with hash 1110505885, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:22,055 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:22,055 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:22,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:22,056 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:22,056 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:22,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:22,140 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:22,140 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:22,141 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 71.43/34.40 [2019-03-28 12:39:22,141 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states 71.43/34.40 [2019-03-28 12:39:22,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. 71.43/34.40 [2019-03-28 12:39:22,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 71.43/34.40 [2019-03-28 12:39:22,142 INFO L87 Difference]: Start difference. First operand 40 states and 62 transitions. Second operand 7 states. 71.43/34.40 [2019-03-28 12:39:22,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:22,311 INFO L93 Difference]: Finished difference Result 83 states and 129 transitions. 71.43/34.40 [2019-03-28 12:39:22,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 71.43/34.40 [2019-03-28 12:39:22,312 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 71.43/34.40 [2019-03-28 12:39:22,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:22,313 INFO L225 Difference]: With dead ends: 83 71.43/34.40 [2019-03-28 12:39:22,313 INFO L226 Difference]: Without dead ends: 62 71.43/34.40 [2019-03-28 12:39:22,313 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 71.43/34.40 [2019-03-28 12:39:22,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. 71.43/34.40 [2019-03-28 12:39:22,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 41. 71.43/34.40 [2019-03-28 12:39:22,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. 71.43/34.40 [2019-03-28 12:39:22,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:22,317 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 64 transitions. Word has length 15 71.43/34.40 [2019-03-28 12:39:22,317 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:22,317 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:22,317 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. 71.43/34.40 [2019-03-28 12:39:22,318 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:22,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 71.43/34.40 [2019-03-28 12:39:22,318 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:22,318 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:22,319 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:22,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:22,319 INFO L82 PathProgramCache]: Analyzing trace with hash 1866562806, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:22,319 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:22,319 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:22,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:22,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:22,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:22,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:22,460 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:22,460 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:22,460 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:22,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:22,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:22,511 INFO L256 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 28 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:22,517 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:22,587 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:22,588 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 25 71.43/34.40 [2019-03-28 12:39:22,589 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:22,607 INFO L497 ElimStorePlain]: treesize reduction 10, result has 67.7 percent of original size 71.43/34.40 [2019-03-28 12:39:22,608 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:22,608 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:16, output treesize:12 71.43/34.40 [2019-03-28 12:39:22,637 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 71.43/34.40 [2019-03-28 12:39:22,637 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:22,646 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:22,647 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:22,648 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 71.43/34.40 [2019-03-28 12:39:22,738 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:22,738 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 20 71.43/34.40 [2019-03-28 12:39:22,742 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.40 [2019-03-28 12:39:22,757 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:22,763 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:22,763 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:36, output treesize:34 71.43/34.40 [2019-03-28 12:39:22,911 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:22,939 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:22,940 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 71.43/34.40 [2019-03-28 12:39:22,940 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states 71.43/34.40 [2019-03-28 12:39:22,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. 71.43/34.40 [2019-03-28 12:39:22,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 71.43/34.40 [2019-03-28 12:39:22,941 INFO L87 Difference]: Start difference. First operand 41 states and 64 transitions. Second operand 15 states. 71.43/34.40 [2019-03-28 12:39:23,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:23,644 INFO L93 Difference]: Finished difference Result 58 states and 92 transitions. 71.43/34.40 [2019-03-28 12:39:23,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 71.43/34.40 [2019-03-28 12:39:23,658 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 71.43/34.40 [2019-03-28 12:39:23,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:23,658 INFO L225 Difference]: With dead ends: 58 71.43/34.40 [2019-03-28 12:39:23,659 INFO L226 Difference]: Without dead ends: 57 71.43/34.40 [2019-03-28 12:39:23,659 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=125, Invalid=381, Unknown=0, NotChecked=0, Total=506 71.43/34.40 [2019-03-28 12:39:23,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. 71.43/34.40 [2019-03-28 12:39:23,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 46. 71.43/34.40 [2019-03-28 12:39:23,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:23,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:23,664 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 74 transitions. Word has length 15 71.43/34.40 [2019-03-28 12:39:23,664 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:23,664 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:23,664 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. 71.43/34.40 [2019-03-28 12:39:23,664 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:23,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 71.43/34.40 [2019-03-28 12:39:23,665 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:23,665 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:23,665 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:23,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:23,666 INFO L82 PathProgramCache]: Analyzing trace with hash 1866562807, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:23,666 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:23,666 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:23,667 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:23,667 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:23,667 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:23,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:23,715 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:23,716 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:23,716 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:23,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:23,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:23,751 INFO L256 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 4 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:23,753 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:23,769 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:23,797 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:23,797 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4] total 7 71.43/34.40 [2019-03-28 12:39:23,798 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states 71.43/34.40 [2019-03-28 12:39:23,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. 71.43/34.40 [2019-03-28 12:39:23,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 71.43/34.40 [2019-03-28 12:39:23,798 INFO L87 Difference]: Start difference. First operand 46 states and 74 transitions. Second operand 8 states. 71.43/34.40 [2019-03-28 12:39:23,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:23,962 INFO L93 Difference]: Finished difference Result 47 states and 74 transitions. 71.43/34.40 [2019-03-28 12:39:23,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 71.43/34.40 [2019-03-28 12:39:23,963 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 15 71.43/34.40 [2019-03-28 12:39:23,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:23,964 INFO L225 Difference]: With dead ends: 47 71.43/34.40 [2019-03-28 12:39:23,964 INFO L226 Difference]: Without dead ends: 46 71.43/34.40 [2019-03-28 12:39:23,964 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 71.43/34.40 [2019-03-28 12:39:23,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:23,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. 71.43/34.40 [2019-03-28 12:39:23,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:23,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 70 transitions. 71.43/34.40 [2019-03-28 12:39:23,969 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 70 transitions. Word has length 15 71.43/34.40 [2019-03-28 12:39:23,969 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:23,969 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 70 transitions. 71.43/34.40 [2019-03-28 12:39:23,969 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. 71.43/34.40 [2019-03-28 12:39:23,969 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 70 transitions. 71.43/34.40 [2019-03-28 12:39:23,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 71.43/34.40 [2019-03-28 12:39:23,970 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:23,970 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:23,970 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:23,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:23,970 INFO L82 PathProgramCache]: Analyzing trace with hash 2028869858, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:23,970 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:23,971 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:23,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:23,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:23,972 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:23,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:24,019 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:24,019 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:24,019 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:24,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:24,072 INFO L256 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 4 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:24,073 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:24,085 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:24,113 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:24,114 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4] total 7 71.43/34.40 [2019-03-28 12:39:24,114 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states 71.43/34.40 [2019-03-28 12:39:24,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. 71.43/34.40 [2019-03-28 12:39:24,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 71.43/34.40 [2019-03-28 12:39:24,115 INFO L87 Difference]: Start difference. First operand 46 states and 70 transitions. Second operand 8 states. 71.43/34.40 [2019-03-28 12:39:24,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:24,289 INFO L93 Difference]: Finished difference Result 51 states and 76 transitions. 71.43/34.40 [2019-03-28 12:39:24,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 71.43/34.40 [2019-03-28 12:39:24,290 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 71.43/34.40 [2019-03-28 12:39:24,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:24,290 INFO L225 Difference]: With dead ends: 51 71.43/34.40 [2019-03-28 12:39:24,290 INFO L226 Difference]: Without dead ends: 50 71.43/34.40 [2019-03-28 12:39:24,291 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 71.43/34.40 [2019-03-28 12:39:24,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. 71.43/34.40 [2019-03-28 12:39:24,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 46. 71.43/34.40 [2019-03-28 12:39:24,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:24,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 68 transitions. 71.43/34.40 [2019-03-28 12:39:24,295 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 68 transitions. Word has length 16 71.43/34.40 [2019-03-28 12:39:24,295 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:24,295 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 68 transitions. 71.43/34.40 [2019-03-28 12:39:24,295 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. 71.43/34.40 [2019-03-28 12:39:24,295 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 68 transitions. 71.43/34.40 [2019-03-28 12:39:24,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 71.43/34.40 [2019-03-28 12:39:24,296 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:24,296 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:24,296 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:24,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:24,297 INFO L82 PathProgramCache]: Analyzing trace with hash 2028869859, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:24,297 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:24,297 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:24,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,298 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,298 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:24,415 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:24,416 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:24,416 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:24,431 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:24,461 INFO L256 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 28 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:24,463 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:24,502 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:24,530 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:24,530 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6] total 10 71.43/34.40 [2019-03-28 12:39:24,530 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states 71.43/34.40 [2019-03-28 12:39:24,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. 71.43/34.40 [2019-03-28 12:39:24,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 71.43/34.40 [2019-03-28 12:39:24,531 INFO L87 Difference]: Start difference. First operand 46 states and 68 transitions. Second operand 11 states. 71.43/34.40 [2019-03-28 12:39:24,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:24,820 INFO L93 Difference]: Finished difference Result 60 states and 84 transitions. 71.43/34.40 [2019-03-28 12:39:24,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 71.43/34.40 [2019-03-28 12:39:24,820 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 16 71.43/34.40 [2019-03-28 12:39:24,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:24,821 INFO L225 Difference]: With dead ends: 60 71.43/34.40 [2019-03-28 12:39:24,821 INFO L226 Difference]: Without dead ends: 59 71.43/34.40 [2019-03-28 12:39:24,821 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 71.43/34.40 [2019-03-28 12:39:24,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. 71.43/34.40 [2019-03-28 12:39:24,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 46. 71.43/34.40 [2019-03-28 12:39:24,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. 71.43/34.40 [2019-03-28 12:39:24,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 67 transitions. 71.43/34.40 [2019-03-28 12:39:24,825 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 67 transitions. Word has length 16 71.43/34.40 [2019-03-28 12:39:24,826 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:24,826 INFO L480 AbstractCegarLoop]: Abstraction has 46 states and 67 transitions. 71.43/34.40 [2019-03-28 12:39:24,826 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. 71.43/34.40 [2019-03-28 12:39:24,826 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 67 transitions. 71.43/34.40 [2019-03-28 12:39:24,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 71.43/34.40 [2019-03-28 12:39:24,826 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:24,827 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:24,827 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:24,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:24,827 INFO L82 PathProgramCache]: Analyzing trace with hash 2028870820, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:24,827 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:24,827 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:24,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,828 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:24,856 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:24,856 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:24,856 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:24,874 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:24,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:24,911 INFO L256 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 5 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:24,912 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:24,916 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:24,943 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:24,944 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 71.43/34.40 [2019-03-28 12:39:24,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states 71.43/34.40 [2019-03-28 12:39:24,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 71.43/34.40 [2019-03-28 12:39:24,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 71.43/34.40 [2019-03-28 12:39:24,945 INFO L87 Difference]: Start difference. First operand 46 states and 67 transitions. Second operand 5 states. 71.43/34.40 [2019-03-28 12:39:25,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:25,008 INFO L93 Difference]: Finished difference Result 60 states and 86 transitions. 71.43/34.40 [2019-03-28 12:39:25,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.43/34.40 [2019-03-28 12:39:25,008 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 71.43/34.40 [2019-03-28 12:39:25,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:25,009 INFO L225 Difference]: With dead ends: 60 71.43/34.40 [2019-03-28 12:39:25,009 INFO L226 Difference]: Without dead ends: 41 71.43/34.40 [2019-03-28 12:39:25,009 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 71.43/34.40 [2019-03-28 12:39:25,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. 71.43/34.40 [2019-03-28 12:39:25,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. 71.43/34.40 [2019-03-28 12:39:25,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. 71.43/34.40 [2019-03-28 12:39:25,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 57 transitions. 71.43/34.40 [2019-03-28 12:39:25,013 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 57 transitions. Word has length 16 71.43/34.40 [2019-03-28 12:39:25,013 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:25,013 INFO L480 AbstractCegarLoop]: Abstraction has 41 states and 57 transitions. 71.43/34.40 [2019-03-28 12:39:25,014 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. 71.43/34.40 [2019-03-28 12:39:25,014 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. 71.43/34.40 [2019-03-28 12:39:25,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 71.43/34.40 [2019-03-28 12:39:25,014 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:25,014 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:25,015 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:25,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:25,015 INFO L82 PathProgramCache]: Analyzing trace with hash 1691115001, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:25,015 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:25,015 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:25,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:25,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:25,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:25,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:25,095 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:25,095 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:25,095 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 71.43/34.40 [2019-03-28 12:39:25,096 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states 71.43/34.40 [2019-03-28 12:39:25,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. 71.43/34.40 [2019-03-28 12:39:25,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 71.43/34.40 [2019-03-28 12:39:25,097 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand 8 states. 71.43/34.40 [2019-03-28 12:39:25,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:25,226 INFO L93 Difference]: Finished difference Result 57 states and 79 transitions. 71.43/34.40 [2019-03-28 12:39:25,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 71.43/34.40 [2019-03-28 12:39:25,226 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 17 71.43/34.40 [2019-03-28 12:39:25,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:25,227 INFO L225 Difference]: With dead ends: 57 71.43/34.40 [2019-03-28 12:39:25,227 INFO L226 Difference]: Without dead ends: 40 71.43/34.40 [2019-03-28 12:39:25,228 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 71.43/34.40 [2019-03-28 12:39:25,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. 71.43/34.40 [2019-03-28 12:39:25,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. 71.43/34.40 [2019-03-28 12:39:25,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. 71.43/34.40 [2019-03-28 12:39:25,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:25,231 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 54 transitions. Word has length 17 71.43/34.40 [2019-03-28 12:39:25,232 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:25,232 INFO L480 AbstractCegarLoop]: Abstraction has 40 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:25,232 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. 71.43/34.40 [2019-03-28 12:39:25,232 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 54 transitions. 71.43/34.40 [2019-03-28 12:39:25,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 71.43/34.40 [2019-03-28 12:39:25,232 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:25,232 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:25,233 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:25,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:25,233 INFO L82 PathProgramCache]: Analyzing trace with hash -1882624238, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:25,233 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:25,233 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:25,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:25,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:25,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:25,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:25,380 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:25,380 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:25,380 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:25,396 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:25,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:25,419 INFO L256 TraceCheckSpWp]: Trace formula consists of 112 conjuncts, 37 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:25,420 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:25,428 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.40 [2019-03-28 12:39:25,430 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.40 [2019-03-28 12:39:25,430 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,438 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:25,439 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,439 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:15 71.43/34.40 [2019-03-28 12:39:25,460 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.40 [2019-03-28 12:39:25,461 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,466 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:25,466 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,466 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 71.43/34.40 [2019-03-28 12:39:25,491 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.40 [2019-03-28 12:39:25,492 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.40 [2019-03-28 12:39:25,493 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,500 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:25,501 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,501 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:29, output treesize:25 71.43/34.40 [2019-03-28 12:39:25,563 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.40 [2019-03-28 12:39:25,568 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:25,568 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 22 71.43/34.40 [2019-03-28 12:39:25,569 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,579 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:25,581 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:25,582 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:44, output treesize:27 71.43/34.40 [2019-03-28 12:39:25,660 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:25,687 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:25,687 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 16 71.43/34.40 [2019-03-28 12:39:25,688 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states 71.43/34.40 [2019-03-28 12:39:25,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. 71.43/34.40 [2019-03-28 12:39:25,688 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 71.43/34.40 [2019-03-28 12:39:25,688 INFO L87 Difference]: Start difference. First operand 40 states and 54 transitions. Second operand 17 states. 71.43/34.40 [2019-03-28 12:39:26,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:26,858 INFO L93 Difference]: Finished difference Result 85 states and 110 transitions. 71.43/34.40 [2019-03-28 12:39:26,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. 71.43/34.40 [2019-03-28 12:39:26,858 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 17 71.43/34.40 [2019-03-28 12:39:26,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:26,859 INFO L225 Difference]: With dead ends: 85 71.43/34.40 [2019-03-28 12:39:26,859 INFO L226 Difference]: Without dead ends: 84 71.43/34.40 [2019-03-28 12:39:26,860 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 174 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=214, Invalid=778, Unknown=0, NotChecked=0, Total=992 71.43/34.40 [2019-03-28 12:39:26,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. 71.43/34.40 [2019-03-28 12:39:26,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 61. 71.43/34.40 [2019-03-28 12:39:26,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. 71.43/34.40 [2019-03-28 12:39:26,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:26,865 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 80 transitions. Word has length 17 71.43/34.40 [2019-03-28 12:39:26,865 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:26,865 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:26,865 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. 71.43/34.40 [2019-03-28 12:39:26,866 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 80 transitions. 71.43/34.40 [2019-03-28 12:39:26,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 71.43/34.40 [2019-03-28 12:39:26,866 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:26,866 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:26,866 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:26,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:26,867 INFO L82 PathProgramCache]: Analyzing trace with hash -1882624237, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:26,867 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:26,867 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:26,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:26,868 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:26,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:26,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:26,918 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:26,918 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:26,918 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:26,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:26,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:26,948 INFO L256 TraceCheckSpWp]: Trace formula consists of 112 conjuncts, 4 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:26,950 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:26,960 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:26,986 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:26,987 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4] total 7 71.43/34.40 [2019-03-28 12:39:26,987 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states 71.43/34.40 [2019-03-28 12:39:26,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. 71.43/34.40 [2019-03-28 12:39:26,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 71.43/34.40 [2019-03-28 12:39:26,988 INFO L87 Difference]: Start difference. First operand 61 states and 80 transitions. Second operand 8 states. 71.43/34.40 [2019-03-28 12:39:27,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:27,116 INFO L93 Difference]: Finished difference Result 63 states and 82 transitions. 71.43/34.40 [2019-03-28 12:39:27,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 71.43/34.40 [2019-03-28 12:39:27,116 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 17 71.43/34.40 [2019-03-28 12:39:27,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:27,117 INFO L225 Difference]: With dead ends: 63 71.43/34.40 [2019-03-28 12:39:27,117 INFO L226 Difference]: Without dead ends: 48 71.43/34.40 [2019-03-28 12:39:27,118 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 71.43/34.40 [2019-03-28 12:39:27,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. 71.43/34.40 [2019-03-28 12:39:27,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. 71.43/34.40 [2019-03-28 12:39:27,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. 71.43/34.40 [2019-03-28 12:39:27,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 61 transitions. 71.43/34.40 [2019-03-28 12:39:27,122 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 61 transitions. Word has length 17 71.43/34.40 [2019-03-28 12:39:27,122 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:27,122 INFO L480 AbstractCegarLoop]: Abstraction has 48 states and 61 transitions. 71.43/34.40 [2019-03-28 12:39:27,122 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. 71.43/34.40 [2019-03-28 12:39:27,123 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 61 transitions. 71.43/34.40 [2019-03-28 12:39:27,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 71.43/34.40 [2019-03-28 12:39:27,123 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:27,123 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:27,123 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:27,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:27,124 INFO L82 PathProgramCache]: Analyzing trace with hash -1531107913, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:27,124 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:27,124 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:27,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,125 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:27,190 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:27,191 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:27,191 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:27,209 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:27,235 INFO L256 TraceCheckSpWp]: Trace formula consists of 115 conjuncts, 24 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:27,237 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:27,338 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:27,365 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:27,365 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 9 71.43/34.40 [2019-03-28 12:39:27,365 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states 71.43/34.40 [2019-03-28 12:39:27,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. 71.43/34.40 [2019-03-28 12:39:27,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 71.43/34.40 [2019-03-28 12:39:27,366 INFO L87 Difference]: Start difference. First operand 48 states and 61 transitions. Second operand 10 states. 71.43/34.40 [2019-03-28 12:39:27,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:27,564 INFO L93 Difference]: Finished difference Result 56 states and 70 transitions. 71.43/34.40 [2019-03-28 12:39:27,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. 71.43/34.40 [2019-03-28 12:39:27,564 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 17 71.43/34.40 [2019-03-28 12:39:27,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:27,565 INFO L225 Difference]: With dead ends: 56 71.43/34.40 [2019-03-28 12:39:27,565 INFO L226 Difference]: Without dead ends: 55 71.43/34.40 [2019-03-28 12:39:27,565 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=66, Invalid=174, Unknown=0, NotChecked=0, Total=240 71.43/34.40 [2019-03-28 12:39:27,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. 71.43/34.40 [2019-03-28 12:39:27,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 51. 71.43/34.40 [2019-03-28 12:39:27,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. 71.43/34.40 [2019-03-28 12:39:27,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:27,569 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 64 transitions. Word has length 17 71.43/34.40 [2019-03-28 12:39:27,570 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:27,570 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:27,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. 71.43/34.40 [2019-03-28 12:39:27,570 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:27,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 71.43/34.40 [2019-03-28 12:39:27,570 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:27,571 INFO L402 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:27,571 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:27,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:27,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1779021663, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:27,571 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:27,571 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:27,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:27,679 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:27,680 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:27,680 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:27,691 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:27,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:27,713 INFO L256 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 28 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:27,715 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:27,728 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:27,729 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 25 71.43/34.40 [2019-03-28 12:39:27,729 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:27,746 INFO L497 ElimStorePlain]: treesize reduction 10, result has 67.7 percent of original size 71.43/34.40 [2019-03-28 12:39:27,747 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:27,747 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:16, output treesize:12 71.43/34.40 [2019-03-28 12:39:27,767 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 71.43/34.40 [2019-03-28 12:39:27,767 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:27,774 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:27,774 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:27,774 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:28, output treesize:24 71.43/34.40 [2019-03-28 12:39:27,830 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:27,830 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 20 71.43/34.40 [2019-03-28 12:39:27,831 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.40 [2019-03-28 12:39:27,843 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:27,846 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:27,846 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:36, output treesize:34 71.43/34.40 [2019-03-28 12:39:27,945 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:27,971 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:27,972 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 14 71.43/34.40 [2019-03-28 12:39:27,972 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states 71.43/34.40 [2019-03-28 12:39:27,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. 71.43/34.40 [2019-03-28 12:39:27,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 71.43/34.40 [2019-03-28 12:39:27,973 INFO L87 Difference]: Start difference. First operand 51 states and 64 transitions. Second operand 15 states. 71.43/34.40 [2019-03-28 12:39:28,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:28,513 INFO L93 Difference]: Finished difference Result 55 states and 69 transitions. 71.43/34.40 [2019-03-28 12:39:28,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 71.43/34.40 [2019-03-28 12:39:28,514 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 19 71.43/34.40 [2019-03-28 12:39:28,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:28,515 INFO L225 Difference]: With dead ends: 55 71.43/34.40 [2019-03-28 12:39:28,515 INFO L226 Difference]: Without dead ends: 54 71.43/34.40 [2019-03-28 12:39:28,515 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=111, Invalid=395, Unknown=0, NotChecked=0, Total=506 71.43/34.40 [2019-03-28 12:39:28,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. 71.43/34.40 [2019-03-28 12:39:28,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 51. 71.43/34.40 [2019-03-28 12:39:28,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. 71.43/34.40 [2019-03-28 12:39:28,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:28,519 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 64 transitions. Word has length 19 71.43/34.40 [2019-03-28 12:39:28,519 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:28,519 INFO L480 AbstractCegarLoop]: Abstraction has 51 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:28,520 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. 71.43/34.40 [2019-03-28 12:39:28,520 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 64 transitions. 71.43/34.40 [2019-03-28 12:39:28,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 71.43/34.40 [2019-03-28 12:39:28,520 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:28,520 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:28,520 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:28,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:28,521 INFO L82 PathProgramCache]: Analyzing trace with hash -224927142, now seen corresponding path program 1 times 71.43/34.40 [2019-03-28 12:39:28,521 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:28,521 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:28,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:28,522 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:28,522 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:28,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:28,725 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:28,725 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:28,737 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:28,749 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:28,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:28,772 INFO L256 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 45 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:28,774 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:28,791 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.40 [2019-03-28 12:39:28,792 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.40 [2019-03-28 12:39:28,793 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,800 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:28,807 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 71.43/34.40 [2019-03-28 12:39:28,807 INFO L427 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,815 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:28,816 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,816 INFO L217 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:13 71.43/34.40 [2019-03-28 12:39:28,839 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.40 [2019-03-28 12:39:28,839 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,844 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:28,844 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,844 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 71.43/34.40 [2019-03-28 12:39:28,868 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.40 [2019-03-28 12:39:28,869 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,876 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:28,876 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,877 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:23 71.43/34.40 [2019-03-28 12:39:28,951 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:28,952 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 22 71.43/34.40 [2019-03-28 12:39:28,953 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,965 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:28,967 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. 71.43/34.40 [2019-03-28 12:39:28,967 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:23 71.43/34.40 [2019-03-28 12:39:29,006 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:29,033 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:29,033 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 15 71.43/34.40 [2019-03-28 12:39:29,033 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states 71.43/34.40 [2019-03-28 12:39:29,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. 71.43/34.40 [2019-03-28 12:39:29,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 71.43/34.40 [2019-03-28 12:39:29,034 INFO L87 Difference]: Start difference. First operand 51 states and 64 transitions. Second operand 16 states. 71.43/34.40 [2019-03-28 12:39:29,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:29,820 INFO L93 Difference]: Finished difference Result 58 states and 73 transitions. 71.43/34.40 [2019-03-28 12:39:29,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. 71.43/34.40 [2019-03-28 12:39:29,821 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 20 71.43/34.40 [2019-03-28 12:39:29,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:29,821 INFO L225 Difference]: With dead ends: 58 71.43/34.40 [2019-03-28 12:39:29,821 INFO L226 Difference]: Without dead ends: 39 71.43/34.40 [2019-03-28 12:39:29,822 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=167, Invalid=589, Unknown=0, NotChecked=0, Total=756 71.43/34.40 [2019-03-28 12:39:29,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. 71.43/34.40 [2019-03-28 12:39:29,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 34. 71.43/34.40 [2019-03-28 12:39:29,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. 71.43/34.40 [2019-03-28 12:39:29,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. 71.43/34.40 [2019-03-28 12:39:29,825 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 20 71.43/34.40 [2019-03-28 12:39:29,825 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.40 [2019-03-28 12:39:29,825 INFO L480 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. 71.43/34.40 [2019-03-28 12:39:29,825 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. 71.43/34.40 [2019-03-28 12:39:29,825 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. 71.43/34.40 [2019-03-28 12:39:29,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 71.43/34.40 [2019-03-28 12:39:29,826 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.40 [2019-03-28 12:39:29,826 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.40 [2019-03-28 12:39:29,826 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.40 [2019-03-28 12:39:29,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.40 [2019-03-28 12:39:29,827 INFO L82 PathProgramCache]: Analyzing trace with hash -1411313344, now seen corresponding path program 2 times 71.43/34.40 [2019-03-28 12:39:29,827 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.40 [2019-03-28 12:39:29,827 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.40 [2019-03-28 12:39:29,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:29,828 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:29,828 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.40 [2019-03-28 12:39:29,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:30,050 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:30,050 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.40 [2019-03-28 12:39:30,050 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.40 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.40 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.40 Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.40 [2019-03-28 12:39:30,061 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 71.43/34.40 [2019-03-28 12:39:30,089 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) 71.43/34.40 [2019-03-28 12:39:30,089 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 71.43/34.40 [2019-03-28 12:39:30,091 INFO L256 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 47 conjunts are in the unsatisfiable core 71.43/34.40 [2019-03-28 12:39:30,093 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.40 [2019-03-28 12:39:30,099 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.40 [2019-03-28 12:39:30,100 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.40 [2019-03-28 12:39:30,100 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,108 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:30,109 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,109 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:15 71.43/34.40 [2019-03-28 12:39:30,132 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.40 [2019-03-28 12:39:30,132 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,138 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:30,138 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,138 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 71.43/34.40 [2019-03-28 12:39:30,184 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.40 [2019-03-28 12:39:30,185 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.40 [2019-03-28 12:39:30,185 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,192 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:30,193 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,193 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:29, output treesize:15 71.43/34.40 [2019-03-28 12:39:30,245 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:30,245 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 71.43/34.40 [2019-03-28 12:39:30,246 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,255 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.40 [2019-03-28 12:39:30,256 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.40 [2019-03-28 12:39:30,256 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:34, output treesize:27 71.43/34.40 [2019-03-28 12:39:30,345 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.40 [2019-03-28 12:39:30,371 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.40 [2019-03-28 12:39:30,372 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 18 71.43/34.40 [2019-03-28 12:39:30,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states 71.43/34.40 [2019-03-28 12:39:30,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. 71.43/34.40 [2019-03-28 12:39:30,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 71.43/34.40 [2019-03-28 12:39:30,373 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand 19 states. 71.43/34.40 [2019-03-28 12:39:31,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.40 [2019-03-28 12:39:31,517 INFO L93 Difference]: Finished difference Result 77 states and 94 transitions. 71.43/34.40 [2019-03-28 12:39:31,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. 71.43/34.40 [2019-03-28 12:39:31,518 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 20 71.43/34.40 [2019-03-28 12:39:31,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.40 [2019-03-28 12:39:31,519 INFO L225 Difference]: With dead ends: 77 71.43/34.40 [2019-03-28 12:39:31,519 INFO L226 Difference]: Without dead ends: 76 71.43/34.40 [2019-03-28 12:39:31,520 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=237, Invalid=1023, Unknown=0, NotChecked=0, Total=1260 71.43/34.40 [2019-03-28 12:39:31,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. 71.43/34.40 [2019-03-28 12:39:31,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 54. 71.43/34.41 [2019-03-28 12:39:31,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. 71.43/34.41 [2019-03-28 12:39:31,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 68 transitions. 71.43/34.41 [2019-03-28 12:39:31,526 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 68 transitions. Word has length 20 71.43/34.41 [2019-03-28 12:39:31,526 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.41 [2019-03-28 12:39:31,526 INFO L480 AbstractCegarLoop]: Abstraction has 54 states and 68 transitions. 71.43/34.41 [2019-03-28 12:39:31,526 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. 71.43/34.41 [2019-03-28 12:39:31,526 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 68 transitions. 71.43/34.41 [2019-03-28 12:39:31,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 71.43/34.41 [2019-03-28 12:39:31,527 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.41 [2019-03-28 12:39:31,527 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.41 [2019-03-28 12:39:31,527 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.41 [2019-03-28 12:39:31,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.41 [2019-03-28 12:39:31,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1064583956, now seen corresponding path program 1 times 71.43/34.41 [2019-03-28 12:39:31,527 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.41 [2019-03-28 12:39:31,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.41 [2019-03-28 12:39:31,528 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:31,529 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:31,529 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:31,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:31,969 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:31,970 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.41 [2019-03-28 12:39:31,970 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.41 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.41 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.41 Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.41 [2019-03-28 12:39:31,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:32,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:32,005 INFO L256 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 50 conjunts are in the unsatisfiable core 71.43/34.41 [2019-03-28 12:39:32,007 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.41 [2019-03-28 12:39:32,013 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.41 [2019-03-28 12:39:32,014 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.41 [2019-03-28 12:39:32,014 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,022 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:32,023 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,023 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:15 71.43/34.41 [2019-03-28 12:39:32,052 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.41 [2019-03-28 12:39:32,052 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,058 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:32,058 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,058 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 71.43/34.41 [2019-03-28 12:39:32,116 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.41 [2019-03-28 12:39:32,117 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:32,118 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,125 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:32,125 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,126 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:29, output treesize:18 71.43/34.41 [2019-03-28 12:39:32,132 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.41 [2019-03-28 12:39:32,133 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:32,133 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,141 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:32,142 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,142 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:29, output treesize:25 71.43/34.41 [2019-03-28 12:39:32,227 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.41 [2019-03-28 12:39:32,232 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:32,233 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 22 71.43/34.41 [2019-03-28 12:39:32,234 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,246 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:32,247 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:32,248 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:44, output treesize:27 71.43/34.41 [2019-03-28 12:39:32,348 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:32,375 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.41 [2019-03-28 12:39:32,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 22 71.43/34.41 [2019-03-28 12:39:32,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states 71.43/34.41 [2019-03-28 12:39:32,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. 71.43/34.41 [2019-03-28 12:39:32,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=446, Unknown=0, NotChecked=0, Total=506 71.43/34.41 [2019-03-28 12:39:32,376 INFO L87 Difference]: Start difference. First operand 54 states and 68 transitions. Second operand 23 states. 71.43/34.41 [2019-03-28 12:39:34,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.41 [2019-03-28 12:39:34,053 INFO L93 Difference]: Finished difference Result 74 states and 92 transitions. 71.43/34.41 [2019-03-28 12:39:34,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. 71.43/34.41 [2019-03-28 12:39:34,053 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 22 71.43/34.41 [2019-03-28 12:39:34,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.41 [2019-03-28 12:39:34,054 INFO L225 Difference]: With dead ends: 74 71.43/34.41 [2019-03-28 12:39:34,054 INFO L226 Difference]: Without dead ends: 64 71.43/34.41 [2019-03-28 12:39:34,055 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 494 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=323, Invalid=1933, Unknown=0, NotChecked=0, Total=2256 71.43/34.41 [2019-03-28 12:39:34,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. 71.43/34.41 [2019-03-28 12:39:34,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. 71.43/34.41 [2019-03-28 12:39:34,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. 71.43/34.41 [2019-03-28 12:39:34,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 77 transitions. 71.43/34.41 [2019-03-28 12:39:34,060 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 77 transitions. Word has length 22 71.43/34.41 [2019-03-28 12:39:34,060 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.41 [2019-03-28 12:39:34,061 INFO L480 AbstractCegarLoop]: Abstraction has 62 states and 77 transitions. 71.43/34.41 [2019-03-28 12:39:34,061 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. 71.43/34.41 [2019-03-28 12:39:34,061 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 77 transitions. 71.43/34.41 [2019-03-28 12:39:34,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 71.43/34.41 [2019-03-28 12:39:34,061 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.41 [2019-03-28 12:39:34,061 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.41 [2019-03-28 12:39:34,062 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.41 [2019-03-28 12:39:34,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.41 [2019-03-28 12:39:34,062 INFO L82 PathProgramCache]: Analyzing trace with hash 935907201, now seen corresponding path program 2 times 71.43/34.41 [2019-03-28 12:39:34,062 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.41 [2019-03-28 12:39:34,062 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.41 [2019-03-28 12:39:34,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:34,063 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:34,064 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:34,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:34,159 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:34,159 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.41 [2019-03-28 12:39:34,159 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.41 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.41 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.41 Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.41 [2019-03-28 12:39:34,176 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 71.43/34.41 [2019-03-28 12:39:34,227 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) 71.43/34.41 [2019-03-28 12:39:34,227 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:34,228 INFO L256 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 32 conjunts are in the unsatisfiable core 71.43/34.41 [2019-03-28 12:39:34,230 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.41 [2019-03-28 12:39:34,276 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:34,304 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. 71.43/34.41 [2019-03-28 12:39:34,304 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [8] total 10 71.43/34.41 [2019-03-28 12:39:34,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states 71.43/34.41 [2019-03-28 12:39:34,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. 71.43/34.41 [2019-03-28 12:39:34,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 71.43/34.41 [2019-03-28 12:39:34,305 INFO L87 Difference]: Start difference. First operand 62 states and 77 transitions. Second operand 11 states. 71.43/34.41 [2019-03-28 12:39:34,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.41 [2019-03-28 12:39:34,533 INFO L93 Difference]: Finished difference Result 62 states and 77 transitions. 71.43/34.41 [2019-03-28 12:39:34,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 71.43/34.41 [2019-03-28 12:39:34,533 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 22 71.43/34.41 [2019-03-28 12:39:34,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.41 [2019-03-28 12:39:34,534 INFO L225 Difference]: With dead ends: 62 71.43/34.41 [2019-03-28 12:39:34,534 INFO L226 Difference]: Without dead ends: 61 71.43/34.41 [2019-03-28 12:39:34,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 71.43/34.41 [2019-03-28 12:39:34,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. 71.43/34.41 [2019-03-28 12:39:34,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. 71.43/34.41 [2019-03-28 12:39:34,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. 71.43/34.41 [2019-03-28 12:39:34,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 75 transitions. 71.43/34.41 [2019-03-28 12:39:34,540 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 75 transitions. Word has length 22 71.43/34.41 [2019-03-28 12:39:34,540 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.41 [2019-03-28 12:39:34,540 INFO L480 AbstractCegarLoop]: Abstraction has 61 states and 75 transitions. 71.43/34.41 [2019-03-28 12:39:34,540 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. 71.43/34.41 [2019-03-28 12:39:34,540 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 75 transitions. 71.43/34.41 [2019-03-28 12:39:34,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 71.43/34.41 [2019-03-28 12:39:34,541 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.41 [2019-03-28 12:39:34,541 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.41 [2019-03-28 12:39:34,541 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.41 [2019-03-28 12:39:34,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.41 [2019-03-28 12:39:34,541 INFO L82 PathProgramCache]: Analyzing trace with hash 1758598825, now seen corresponding path program 2 times 71.43/34.41 [2019-03-28 12:39:34,542 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.41 [2019-03-28 12:39:34,542 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.41 [2019-03-28 12:39:34,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:34,542 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:34,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:34,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:34,864 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:34,864 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.41 [2019-03-28 12:39:34,864 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.41 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.41 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.41 Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.41 [2019-03-28 12:39:34,878 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 71.43/34.41 [2019-03-28 12:39:34,916 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) 71.43/34.41 [2019-03-28 12:39:34,916 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:34,919 INFO L256 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 43 conjunts are in the unsatisfiable core 71.43/34.41 [2019-03-28 12:39:34,921 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.41 [2019-03-28 12:39:34,940 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.41 [2019-03-28 12:39:34,941 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.41 [2019-03-28 12:39:34,942 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:34,952 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:34,952 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:34,953 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:19, output treesize:15 71.43/34.41 [2019-03-28 12:39:34,977 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.41 [2019-03-28 12:39:34,977 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:34,983 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:34,983 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:34,984 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 71.43/34.41 [2019-03-28 12:39:35,036 INFO L189 IndexEqualityManager]: detected not equals via solver 71.43/34.41 [2019-03-28 12:39:35,037 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:35,038 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:35,047 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:35,047 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:35,048 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:29, output treesize:15 71.43/34.41 [2019-03-28 12:39:35,105 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:35,106 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 71.43/34.41 [2019-03-28 12:39:35,107 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:35,117 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:35,118 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:35,119 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:34, output treesize:27 71.43/34.41 [2019-03-28 12:39:35,214 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:35,241 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.41 [2019-03-28 12:39:35,241 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 18 71.43/34.41 [2019-03-28 12:39:35,241 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states 71.43/34.41 [2019-03-28 12:39:35,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. 71.43/34.41 [2019-03-28 12:39:35,242 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 71.43/34.41 [2019-03-28 12:39:35,242 INFO L87 Difference]: Start difference. First operand 61 states and 75 transitions. Second operand 19 states. 71.43/34.41 [2019-03-28 12:39:36,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.41 [2019-03-28 12:39:36,414 INFO L93 Difference]: Finished difference Result 70 states and 85 transitions. 71.43/34.41 [2019-03-28 12:39:36,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. 71.43/34.41 [2019-03-28 12:39:36,414 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 24 71.43/34.41 [2019-03-28 12:39:36,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.41 [2019-03-28 12:39:36,415 INFO L225 Difference]: With dead ends: 70 71.43/34.41 [2019-03-28 12:39:36,415 INFO L226 Difference]: Without dead ends: 46 71.43/34.41 [2019-03-28 12:39:36,416 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=226, Invalid=1034, Unknown=0, NotChecked=0, Total=1260 71.43/34.41 [2019-03-28 12:39:36,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. 71.43/34.41 [2019-03-28 12:39:36,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 44. 71.43/34.41 [2019-03-28 12:39:36,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. 71.43/34.41 [2019-03-28 12:39:36,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 54 transitions. 71.43/34.41 [2019-03-28 12:39:36,420 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 54 transitions. Word has length 24 71.43/34.41 [2019-03-28 12:39:36,420 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.41 [2019-03-28 12:39:36,420 INFO L480 AbstractCegarLoop]: Abstraction has 44 states and 54 transitions. 71.43/34.41 [2019-03-28 12:39:36,420 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. 71.43/34.41 [2019-03-28 12:39:36,420 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 54 transitions. 71.43/34.41 [2019-03-28 12:39:36,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 71.43/34.41 [2019-03-28 12:39:36,420 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.41 [2019-03-28 12:39:36,421 INFO L402 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.41 [2019-03-28 12:39:36,421 INFO L423 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.41 [2019-03-28 12:39:36,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.41 [2019-03-28 12:39:36,421 INFO L82 PathProgramCache]: Analyzing trace with hash 1272277726, now seen corresponding path program 1 times 71.43/34.41 [2019-03-28 12:39:36,421 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.41 [2019-03-28 12:39:36,421 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.41 [2019-03-28 12:39:36,422 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:36,422 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:36,423 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:36,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:36,872 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:36,872 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.41 [2019-03-28 12:39:36,872 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.41 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.41 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.41 Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.41 [2019-03-28 12:39:36,883 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:36,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:36,912 INFO L256 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 50 conjunts are in the unsatisfiable core 71.43/34.41 [2019-03-28 12:39:36,914 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.41 [2019-03-28 12:39:36,921 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 71.43/34.41 [2019-03-28 12:39:36,921 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:36,927 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:36,929 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.41 [2019-03-28 12:39:36,929 INFO L427 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:36,936 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:36,936 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:36,936 INFO L217 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:13 71.43/34.41 [2019-03-28 12:39:36,964 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.41 [2019-03-28 12:39:36,964 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:36,968 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:36,968 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:36,969 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 71.43/34.41 [2019-03-28 12:39:37,026 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:37,026 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:37,032 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:37,033 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:37,033 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:16 71.43/34.41 [2019-03-28 12:39:37,047 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:37,047 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:37,054 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:37,055 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:37,055 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:23 71.43/34.41 [2019-03-28 12:39:37,152 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:37,153 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 22 71.43/34.41 [2019-03-28 12:39:37,154 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:37,163 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:37,164 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:37,165 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:42, output treesize:23 71.43/34.41 [2019-03-28 12:39:37,206 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:37,233 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.41 [2019-03-28 12:39:37,233 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 9] total 22 71.43/34.41 [2019-03-28 12:39:37,234 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states 71.43/34.41 [2019-03-28 12:39:37,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. 71.43/34.41 [2019-03-28 12:39:37,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=440, Unknown=0, NotChecked=0, Total=506 71.43/34.41 [2019-03-28 12:39:37,234 INFO L87 Difference]: Start difference. First operand 44 states and 54 transitions. Second operand 23 states. 71.43/34.41 [2019-03-28 12:39:37,658 WARN L188 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 60 71.43/34.41 [2019-03-28 12:39:38,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.41 [2019-03-28 12:39:38,498 INFO L93 Difference]: Finished difference Result 49 states and 59 transitions. 71.43/34.41 [2019-03-28 12:39:38,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. 71.43/34.41 [2019-03-28 12:39:38,499 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 25 71.43/34.41 [2019-03-28 12:39:38,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.41 [2019-03-28 12:39:38,499 INFO L225 Difference]: With dead ends: 49 71.43/34.41 [2019-03-28 12:39:38,500 INFO L226 Difference]: Without dead ends: 32 71.43/34.41 [2019-03-28 12:39:38,500 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=271, Invalid=1135, Unknown=0, NotChecked=0, Total=1406 71.43/34.41 [2019-03-28 12:39:38,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. 71.43/34.41 [2019-03-28 12:39:38,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. 71.43/34.41 [2019-03-28 12:39:38,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. 71.43/34.41 [2019-03-28 12:39:38,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 37 transitions. 71.43/34.41 [2019-03-28 12:39:38,504 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 37 transitions. Word has length 25 71.43/34.41 [2019-03-28 12:39:38,504 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.41 [2019-03-28 12:39:38,504 INFO L480 AbstractCegarLoop]: Abstraction has 32 states and 37 transitions. 71.43/34.41 [2019-03-28 12:39:38,504 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. 71.43/34.41 [2019-03-28 12:39:38,504 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 37 transitions. 71.43/34.41 [2019-03-28 12:39:38,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 71.43/34.41 [2019-03-28 12:39:38,504 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.41 [2019-03-28 12:39:38,505 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.41 [2019-03-28 12:39:38,505 INFO L423 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.41 [2019-03-28 12:39:38,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.41 [2019-03-28 12:39:38,505 INFO L82 PathProgramCache]: Analyzing trace with hash 212489685, now seen corresponding path program 1 times 71.43/34.41 [2019-03-28 12:39:38,505 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.41 [2019-03-28 12:39:38,505 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.41 [2019-03-28 12:39:38,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:38,506 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:38,506 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:38,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:38,688 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:38,688 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.41 [2019-03-28 12:39:38,688 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.41 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.41 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.41 Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.41 [2019-03-28 12:39:38,705 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:38,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:38,742 INFO L256 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 56 conjunts are in the unsatisfiable core 71.43/34.41 [2019-03-28 12:39:38,744 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.41 [2019-03-28 12:39:38,762 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 71.43/34.41 [2019-03-28 12:39:38,763 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,770 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:38,776 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.41 [2019-03-28 12:39:38,776 INFO L427 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,797 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:38,797 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,797 INFO L217 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:13 71.43/34.41 [2019-03-28 12:39:38,802 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.41 [2019-03-28 12:39:38,802 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,807 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:38,807 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,807 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 71.43/34.41 [2019-03-28 12:39:38,829 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:38,829 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,835 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:38,836 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,836 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:16 71.43/34.41 [2019-03-28 12:39:38,841 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:38,842 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,848 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:38,848 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,848 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 71.43/34.41 [2019-03-28 12:39:38,880 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:38,881 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 71.43/34.41 [2019-03-28 12:39:38,882 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,892 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:38,893 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:38,894 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 71.43/34.41 [2019-03-28 12:39:38,928 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:38,955 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.41 [2019-03-28 12:39:38,956 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 15 71.43/34.41 [2019-03-28 12:39:38,956 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states 71.43/34.41 [2019-03-28 12:39:38,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. 71.43/34.41 [2019-03-28 12:39:38,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 71.43/34.41 [2019-03-28 12:39:38,957 INFO L87 Difference]: Start difference. First operand 32 states and 37 transitions. Second operand 16 states. 71.43/34.41 [2019-03-28 12:39:39,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.41 [2019-03-28 12:39:39,225 INFO L93 Difference]: Finished difference Result 32 states and 37 transitions. 71.43/34.41 [2019-03-28 12:39:39,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 71.43/34.41 [2019-03-28 12:39:39,231 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 25 71.43/34.41 [2019-03-28 12:39:39,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.41 [2019-03-28 12:39:39,232 INFO L225 Difference]: With dead ends: 32 71.43/34.41 [2019-03-28 12:39:39,232 INFO L226 Difference]: Without dead ends: 31 71.43/34.41 [2019-03-28 12:39:39,232 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=95, Invalid=285, Unknown=0, NotChecked=0, Total=380 71.43/34.41 [2019-03-28 12:39:39,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. 71.43/34.41 [2019-03-28 12:39:39,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. 71.43/34.41 [2019-03-28 12:39:39,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. 71.43/34.41 [2019-03-28 12:39:39,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 35 transitions. 71.43/34.41 [2019-03-28 12:39:39,236 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 35 transitions. Word has length 25 71.43/34.41 [2019-03-28 12:39:39,236 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.41 [2019-03-28 12:39:39,236 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 35 transitions. 71.43/34.41 [2019-03-28 12:39:39,236 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. 71.43/34.41 [2019-03-28 12:39:39,236 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 35 transitions. 71.43/34.41 [2019-03-28 12:39:39,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 71.43/34.41 [2019-03-28 12:39:39,237 INFO L394 BasicCegarLoop]: Found error trace 71.43/34.41 [2019-03-28 12:39:39,237 INFO L402 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.43/34.41 [2019-03-28 12:39:39,237 INFO L423 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC, ULTIMATE.startErr8REQUIRES_VIOLATION, ULTIMATE.startErr9REQUIRES_VIOLATION, ULTIMATE.startErr10REQUIRES_VIOLATION, ULTIMATE.startErr6REQUIRES_VIOLATION, ULTIMATE.startErr7REQUIRES_VIOLATION, ULTIMATE.startErr3REQUIRES_VIOLATION, ULTIMATE.startErr4REQUIRES_VIOLATION, ULTIMATE.startErr5REQUIRES_VIOLATION, ULTIMATE.startErr0REQUIRES_VIOLATION, ULTIMATE.startErr11REQUIRES_VIOLATION, ULTIMATE.startErr1REQUIRES_VIOLATION, ULTIMATE.startErr2REQUIRES_VIOLATION]=== 71.43/34.41 [2019-03-28 12:39:39,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.43/34.41 [2019-03-28 12:39:39,237 INFO L82 PathProgramCache]: Analyzing trace with hash 59574462, now seen corresponding path program 1 times 71.43/34.41 [2019-03-28 12:39:39,237 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.43/34.41 [2019-03-28 12:39:39,238 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.43/34.41 [2019-03-28 12:39:39,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:39,239 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:39,239 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:39,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:39,409 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:39,410 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.43/34.41 [2019-03-28 12:39:39,410 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.43/34.41 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.43/34.41 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.43/34.41 Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.43/34.41 [2019-03-28 12:39:39,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.43/34.41 [2019-03-28 12:39:39,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.43/34.41 [2019-03-28 12:39:39,463 INFO L256 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 52 conjunts are in the unsatisfiable core 71.43/34.41 [2019-03-28 12:39:39,465 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.43/34.41 [2019-03-28 12:39:39,472 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 71.43/34.41 [2019-03-28 12:39:39,472 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,478 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:39,480 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 71.43/34.41 [2019-03-28 12:39:39,481 INFO L427 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,489 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:39,489 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,489 INFO L217 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:13 71.43/34.41 [2019-03-28 12:39:39,494 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 71.43/34.41 [2019-03-28 12:39:39,494 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,501 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:39,502 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,502 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 71.43/34.41 [2019-03-28 12:39:39,523 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:39,524 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,530 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:39,531 INFO L427 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,531 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:16 71.43/34.41 [2019-03-28 12:39:39,536 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 71.43/34.41 [2019-03-28 12:39:39,536 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,542 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:39,543 INFO L427 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,543 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 71.43/34.41 [2019-03-28 12:39:39,571 INFO L340 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:39,572 INFO L374 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 19 71.43/34.41 [2019-03-28 12:39:39,573 INFO L427 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,581 INFO L497 ElimStorePlain]: treesize reduction 0, result has 100.0 percent of original size 71.43/34.41 [2019-03-28 12:39:39,582 INFO L427 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. 71.43/34.41 [2019-03-28 12:39:39,582 INFO L217 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 71.43/34.41 [2019-03-28 12:39:39,616 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. 71.43/34.41 [2019-03-28 12:39:39,642 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.43/34.41 [2019-03-28 12:39:39,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 15 71.43/34.41 [2019-03-28 12:39:39,643 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states 71.43/34.41 [2019-03-28 12:39:39,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. 71.43/34.41 [2019-03-28 12:39:39,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 71.43/34.41 [2019-03-28 12:39:39,644 INFO L87 Difference]: Start difference. First operand 30 states and 35 transitions. Second operand 16 states. 71.43/34.41 [2019-03-28 12:39:39,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.43/34.41 [2019-03-28 12:39:39,901 INFO L93 Difference]: Finished difference Result 30 states and 35 transitions. 71.43/34.41 [2019-03-28 12:39:39,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 71.43/34.41 [2019-03-28 12:39:39,902 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 29 71.43/34.41 [2019-03-28 12:39:39,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. 71.43/34.41 [2019-03-28 12:39:39,902 INFO L225 Difference]: With dead ends: 30 71.43/34.41 [2019-03-28 12:39:39,902 INFO L226 Difference]: Without dead ends: 0 71.43/34.41 [2019-03-28 12:39:39,902 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 71.43/34.41 [2019-03-28 12:39:39,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. 71.43/34.41 [2019-03-28 12:39:39,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. 71.43/34.41 [2019-03-28 12:39:39,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. 71.43/34.41 [2019-03-28 12:39:39,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. 71.43/34.41 [2019-03-28 12:39:39,903 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 29 71.43/34.41 [2019-03-28 12:39:39,904 INFO L84 Accepts]: Finished accepts. word is rejected. 71.43/34.41 [2019-03-28 12:39:39,904 INFO L480 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. 71.51/34.41 [2019-03-28 12:39:39,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. 71.51/34.41 [2019-03-28 12:39:39,904 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. 71.51/34.41 [2019-03-28 12:39:39,904 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. 71.51/34.41 [2019-03-28 12:39:39,909 INFO L343 DoubleDeckerVisitor]: Before removal of dead ends 0 states and 0 transitions. 71.51/34.41 [2019-03-28 12:39:39,934 WARN L250 erpolLogProxyWrapper]: Already inconsistent. 71.51/34.41 [2019-03-28 12:39:39,945 WARN L250 erpolLogProxyWrapper]: Already inconsistent. 71.51/34.41 [2019-03-28 12:39:40,002 WARN L250 erpolLogProxyWrapper]: Already inconsistent. 71.51/34.41 [2019-03-28 12:39:40,061 WARN L188 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 172 DAG size of output: 148 71.51/34.41 [2019-03-28 12:39:41,248 WARN L188 SmtUtils]: Spent 1.19 s on a formula simplification. DAG size of input: 143 DAG size of output: 79 71.51/34.41 [2019-03-28 12:39:41,251 INFO L448 ceAbstractionStarter]: For program point L29(line 29) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,251 INFO L448 ceAbstractionStarter]: For program point L29-1(lines 29 30) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,251 INFO L448 ceAbstractionStarter]: For program point L27(lines 27 28) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,252 INFO L448 ceAbstractionStarter]: For program point L29-3(lines 26 31) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,252 INFO L448 ceAbstractionStarter]: For program point L19-1(lines 19 22) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,252 INFO L444 ceAbstractionStarter]: At program point L19-3(lines 19 22) the Hoare annotation is: (let ((.cse22 (select |#length| ULTIMATE.start_cstrlcpy_~s~0.base))) (let ((.cse3 (= 0 ULTIMATE.start_cstrlcpy_~d~0.offset)) (.cse17 (= ULTIMATE.start_cstrlcpy_~s~0.offset 0)) (.cse4 (<= 1 .cse22)) (.cse0 (exists ((ULTIMATE.start_main_~nondetString2~0.offset Int)) (and (= (select (select |#memory_int| ULTIMATE.start_cstrlcpy_~s~0.base) (+ ULTIMATE.start_main_~nondetString2~0.offset (select |#length| ULTIMATE.start_cstrlcpy_~s~0.base) (- 1))) 0) (<= ULTIMATE.start_main_~nondetString2~0.offset 0) (<= ULTIMATE.start_cstrlcpy_~s~0.offset ULTIMATE.start_main_~nondetString2~0.offset)))) (.cse11 (= ULTIMATE.start_cstrlcpy_~n~0 ULTIMATE.start_cstrlcpy_~siz)) (.cse1 (<= ULTIMATE.start_cstrlcpy_~s~0.base ULTIMATE.start_cstrlcpy_~src.base)) (.cse2 (= (select |#length| ULTIMATE.start_main_~nondetString1~0.base) ULTIMATE.start_main_~n~1)) (.cse5 (<= 1 ULTIMATE.start_main_~n~1)) (.cse6 (<= ULTIMATE.start_cstrlcpy_~src.base ULTIMATE.start_cstrlcpy_~s~0.base)) (.cse8 (= 1 (select |#valid| ULTIMATE.start_cstrlcpy_~s~0.base))) (.cse9 (= (select |#valid| ULTIMATE.start_cstrlcpy_~d~0.base) 1)) (.cse10 (= 1 (select |#valid| ULTIMATE.start_main_~nondetString1~0.base))) (.cse20 (<= 1 ULTIMATE.start_main_~length~0)) (.cse14 (= ULTIMATE.start_main_~nondetString1~0.offset 0)) (.cse16 (= ULTIMATE.start_main_~nondetString2~0.offset 0)) (.cse18 (= (select |#length| ULTIMATE.start_main_~nondetString2~0.base) ULTIMATE.start_main_~length~0)) (.cse7 (select |#length| ULTIMATE.start_cstrlcpy_~d~0.base)) (.cse13 (= 1 (select |#valid| ULTIMATE.start_main_~nondetString2~0.base))) (.cse19 (<= 1 ULTIMATE.start_cstrlcpy_~n~0)) (.cse12 (select |#memory_int| ULTIMATE.start_cstrlcpy_~s~0.base)) (.cse15 (not (= ULTIMATE.start_main_~nondetString1~0.base ULTIMATE.start_main_~nondetString2~0.base))) (.cse21 (not (= ULTIMATE.start_cstrlcpy_~d~0.base ULTIMATE.start_cstrlcpy_~s~0.base)))) (or (and (= (+ ULTIMATE.start_main_~nondetString2~0.offset ULTIMATE.start_main_~length~0) 1) .cse0 (and .cse1 .cse2 .cse3 .cse4 .cse5 .cse6 (= ULTIMATE.start_cstrlcpy_~n~0 .cse7) .cse8 .cse9 .cse10 .cse11 (= (select .cse12 ULTIMATE.start_cstrlcpy_~s~0.offset) 0) .cse13) .cse14 .cse15 .cse16 .cse17 .cse18 .cse19) (and .cse3 .cse14 .cse16 .cse17 .cse18 (and .cse1 .cse20 .cse2 .cse4 .cse5 .cse6 .cse15 (= .cse7 ULTIMATE.start_cstrlcpy_~n~0) .cse0 .cse8 .cse9 .cse10 .cse11 .cse21 .cse13 .cse19)) (and (<= (+ ULTIMATE.start_cstrlcpy_~s~0.offset 1) .cse22) (and .cse1 .cse2 .cse5 .cse6 (<= 1 ULTIMATE.start_cstrlcpy_~d~0.offset) (<= 1 ULTIMATE.start_cstrlcpy_~siz) .cse8 .cse9 .cse10 .cse20 .cse14 .cse16 .cse18 (<= (+ ULTIMATE.start_cstrlcpy_~d~0.offset ULTIMATE.start_cstrlcpy_~n~0) .cse7) .cse13 .cse19) (= (select .cse12 (+ .cse22 (- 1))) 0) .cse15 .cse21 (<= 1 ULTIMATE.start_cstrlcpy_~s~0.offset))))) 71.51/34.41 [2019-03-28 12:39:41,252 INFO L448 ceAbstractionStarter]: For program point L42-1(lines 42 44) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,252 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr12ASSERT_VIOLATIONILLEGAL_POINTER_ARITHMETIC(line 33) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startENTRY(line -1) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point L28(line 28) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point L26(lines 26 31) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr2REQUIRES_VIOLATION(line 48) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr1REQUIRES_VIOLATION(line 47) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point L20(line 20) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr0REQUIRES_VIOLATION(line 47) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point L20-1(line 20) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,253 INFO L448 ceAbstractionStarter]: For program point L18(lines 18 23) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point L20-2(lines 20 21) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point L18-1(lines 12 34) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr6REQUIRES_VIOLATION(line 20) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr5REQUIRES_VIOLATION(line 20) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point L47(line 47) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr4REQUIRES_VIOLATION(line 20) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point L47-1(line 47) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,254 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr3REQUIRES_VIOLATION(line 48) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,255 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr10REQUIRES_VIOLATION(line 29) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,255 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr9REQUIRES_VIOLATION(line 28) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,255 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr8REQUIRES_VIOLATION(line 28) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,255 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr7REQUIRES_VIOLATION(line 20) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,255 INFO L448 ceAbstractionStarter]: For program point L39(lines 39 41) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,255 INFO L448 ceAbstractionStarter]: For program point ULTIMATE.startErr11REQUIRES_VIOLATION(line 29) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,255 INFO L448 ceAbstractionStarter]: For program point L39-2(lines 36 51) no Hoare annotation was computed. 71.51/34.41 [2019-03-28 12:39:41,256 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg 71.51/34.41 [2019-03-28 12:39:41,264 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,265 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,266 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,267 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,267 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,267 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,273 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,273 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,273 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,274 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,274 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,274 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,275 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,275 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,275 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,275 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,276 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,276 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,276 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,277 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,277 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,277 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,278 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,278 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,278 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,286 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,286 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,287 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,288 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,288 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,288 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.41 [2019-03-28 12:39:41,291 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,291 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,291 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,292 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,292 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,292 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,293 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,293 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,293 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,293 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,294 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,294 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,294 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,294 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,295 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,295 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,295 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,296 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.41 [2019-03-28 12:39:41,296 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:41,299 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:39:41 BasicIcfg 71.51/34.41 [2019-03-28 12:39:41,299 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- 71.51/34.41 [2019-03-28 12:39:41,300 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- 71.51/34.41 [2019-03-28 12:39:41,300 INFO L271 PluginConnector]: Initializing BuchiAutomizer... 71.51/34.41 [2019-03-28 12:39:41,304 INFO L276 PluginConnector]: BuchiAutomizer initialized 71.51/34.41 [2019-03-28 12:39:41,304 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 71.51/34.41 [2019-03-28 12:39:41,304 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.03 12:39:17" (1/5) ... 71.51/34.41 [2019-03-28 12:39:41,305 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@36175994 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.03 12:39:41, skipping insertion in model container 71.51/34.41 [2019-03-28 12:39:41,305 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 71.51/34.41 [2019-03-28 12:39:41,305 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 12:39:17" (2/5) ... 71.51/34.41 [2019-03-28 12:39:41,305 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@36175994 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.03 12:39:41, skipping insertion in model container 71.51/34.41 [2019-03-28 12:39:41,306 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 71.51/34.41 [2019-03-28 12:39:41,306 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 12:39:17" (3/5) ... 71.51/34.41 [2019-03-28 12:39:41,306 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@36175994 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:39:41, skipping insertion in model container 71.51/34.41 [2019-03-28 12:39:41,306 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 71.51/34.41 [2019-03-28 12:39:41,306 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.blockencoding CFG 28.03 12:39:17" (4/5) ... 71.51/34.41 [2019-03-28 12:39:41,306 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@36175994 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:39:41, skipping insertion in model container 71.51/34.41 [2019-03-28 12:39:41,306 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis 71.51/34.41 [2019-03-28 12:39:41,306 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 12:39:41" (5/5) ... 71.51/34.41 [2019-03-28 12:39:41,308 INFO L375 chiAutomizerObserver]: Analyzing ICFG theBenchmark.c_BEv2 71.51/34.41 [2019-03-28 12:39:41,329 INFO L133 ementStrategyFactory]: Using default assertion order modulation 71.51/34.41 [2019-03-28 12:39:41,329 INFO L374 BuchiCegarLoop]: Interprodecural is true 71.51/34.41 [2019-03-28 12:39:41,329 INFO L375 BuchiCegarLoop]: Hoare is true 71.51/34.41 [2019-03-28 12:39:41,330 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates 71.51/34.41 [2019-03-28 12:39:41,330 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE 71.51/34.41 [2019-03-28 12:39:41,330 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION 71.51/34.41 [2019-03-28 12:39:41,330 INFO L379 BuchiCegarLoop]: Difference is false 71.51/34.41 [2019-03-28 12:39:41,330 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA 71.51/34.41 [2019-03-28 12:39:41,330 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== 71.51/34.41 [2019-03-28 12:39:41,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states. 71.51/34.41 [2019-03-28 12:39:41,338 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:41,339 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 71.51/34.41 [2019-03-28 12:39:41,339 INFO L119 BuchiIsEmpty]: Starting construction of run 71.51/34.41 [2019-03-28 12:39:41,343 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:41,343 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:41,343 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ 71.51/34.41 [2019-03-28 12:39:41,343 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states. 71.51/34.41 [2019-03-28 12:39:41,345 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:41,345 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 71.51/34.41 [2019-03-28 12:39:41,345 INFO L119 BuchiIsEmpty]: Starting construction of run 71.51/34.41 [2019-03-28 12:39:41,345 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:41,345 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:41,351 INFO L794 eck$LassoCheckResult]: Stem: 33#ULTIMATE.startENTRYtrue [206] ULTIMATE.startENTRY-->L39: Formula: (and (= (store |v_#valid_22| 0 0) |v_#valid_21|) (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|)) InVars {#valid=|v_#valid_22|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_5|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_5|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_11, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_#t~nondet6=|v_ULTIMATE.start_main_#t~nondet6_6|, ULTIMATE.start_main_#t~nondet7=|v_ULTIMATE.start_main_#t~nondet7_6|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret10=|v_ULTIMATE.start_main_#t~ret10_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_5|, #valid=|v_#valid_21|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~n~1, #NULL.offset, ULTIMATE.start_main_#t~nondet6, ULTIMATE.start_main_#t~nondet7, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret10, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~length~0] 31#L39true [137] L39-->L39-2: Formula: (>= v_ULTIMATE.start_main_~length~0_6 1) InVars {ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} OutVars{ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} AuxVars[] AssignedVars[] 28#L39-2true [138] L39-2-->L42-1: Formula: (>= v_ULTIMATE.start_main_~n~1_6 1) InVars {ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} OutVars{ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} AuxVars[] AssignedVars[] 17#L42-1true [163] L42-1-->L47: Formula: (let ((.cse0 (store |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc9.offset_2| 0) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc8.base_2|) (< 0 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| |v_#StackHeapBarrier_1|) (= |v_ULTIMATE.start_main_#t~malloc8.offset_2| 0) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| 0) (= (store (store |v_#length_5| |v_ULTIMATE.start_main_#t~malloc8.base_2| v_ULTIMATE.start_main_~n~1_7) |v_ULTIMATE.start_main_#t~malloc9.base_2| v_ULTIMATE.start_main_~length~0_7) |v_#length_3|) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc9.offset_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc8.offset_2|) (= 0 (select |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2|)) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2|)) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2| 1) |v_#valid_5|) (< |v_ULTIMATE.start_main_#t~malloc9.base_2| |v_#StackHeapBarrier_1|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_2|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_2|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_2|, #valid=|v_#valid_5|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_3|, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_2|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~nondetString2~0.offset] 3#L47true [90] L47-->L47-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= .cse0 (select |v_#length_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= (store |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0)) |v_#memory_int_2|) (= 1 (select |v_#valid_8| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (<= 1 .cse0))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} AuxVars[] AssignedVars[#memory_int] 24#L47-1true [207] L47-1-->L18: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (= v_ULTIMATE.start_cstrlcpy_~dst.offset_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (<= .cse0 (select |v_#length_16| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= (store |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_11|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_7 v_ULTIMATE.start_cstrlcpy_~dst.offset_3) (<= 1 .cse0) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_9 v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_main_~nondetString2~0.base_8) (= v_ULTIMATE.start_main_~nondetString1~0.base_8 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 v_ULTIMATE.start_cstrlcpy_~s~0.offset_8) (= (select |v_#valid_23| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_main_~nondetString2~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_main_~n~1_12) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 v_ULTIMATE.start_cstrlcpy_~d~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_cstrlcpy_~siz_5) (= v_ULTIMATE.start_cstrlcpy_~n~0_9 v_ULTIMATE.start_cstrlcpy_~siz_5))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_12|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_16|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_8|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_7|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_8|, ULTIMATE.start_cstrlcpy_~src.offset=v_ULTIMATE.start_cstrlcpy_~src.offset_4, ULTIMATE.start_cstrlcpy_~src.base=v_ULTIMATE.start_cstrlcpy_~src.base_5, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_8, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #length=|v_#length_16|, ULTIMATE.start_cstrlcpy_#in~dst.offset=|v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|, ULTIMATE.start_cstrlcpy_#in~dst.base=|v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_7|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_9, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_7|, ULTIMATE.start_cstrlcpy_#res=|v_ULTIMATE.start_cstrlcpy_#res_4|, ULTIMATE.start_cstrlcpy_~dst.offset=v_ULTIMATE.start_cstrlcpy_~dst.offset_3, ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_5, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_9, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrlcpy_#in~src.base=|v_ULTIMATE.start_cstrlcpy_#in~src.base_2|, ULTIMATE.start_cstrlcpy_#in~siz=|v_ULTIMATE.start_cstrlcpy_#in~siz_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_8, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_7|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_cstrlcpy_~dst.base=v_ULTIMATE.start_cstrlcpy_~dst.base_3, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11, ULTIMATE.start_cstrlcpy_#in~src.offset=|v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post4.base, ULTIMATE.start_cstrlcpy_~src.offset, ULTIMATE.start_cstrlcpy_~src.base, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#in~dst.offset, ULTIMATE.start_cstrlcpy_#in~dst.base, ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset, ULTIMATE.start_cstrlcpy_#res, ULTIMATE.start_cstrlcpy_~dst.offset, ULTIMATE.start_cstrlcpy_~siz, ULTIMATE.start_cstrlcpy_~n~0, ULTIMATE.start_cstrlcpy_#in~src.base, ULTIMATE.start_cstrlcpy_#in~siz, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post4.offset, #memory_int, ULTIMATE.start_cstrlcpy_~dst.base, ULTIMATE.start_cstrlcpy_#in~src.offset] 11#L18true [173] L18-->L19-3: Formula: (< 0 v_ULTIMATE.start_cstrlcpy_~n~0_4) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} AuxVars[] AssignedVars[] 29#L19-3true 71.51/34.41 [2019-03-28 12:39:41,351 INFO L796 eck$LassoCheckResult]: Loop: 29#L19-3true [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 32#L19-1true [184] L19-1-->L20: Formula: (and (= v_ULTIMATE.start_cstrlcpy_~d~0.base_3 |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| v_ULTIMATE.start_cstrlcpy_~s~0.offset_7) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2| v_ULTIMATE.start_cstrlcpy_~d~0.base_4) (= v_ULTIMATE.start_cstrlcpy_~s~0.offset_6 (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| 1)) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_3 (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| 1)) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2| v_ULTIMATE.start_cstrlcpy_~s~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_7 |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| v_ULTIMATE.start_cstrlcpy_~d~0.offset_4) (< 0 |v_ULTIMATE.start_cstrlcpy_#t~pre0_6|)) InVars {ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_8, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_6|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_4, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_7, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_4} OutVars{ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_5|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_3, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_6, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_3, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2|, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_7, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset] 18#L20true [112] L20-->L20-1: Formula: (and (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3| 1) (select |v_#length_10| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (= (select (select |v_#memory_int_6| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|) |v_ULTIMATE.start_cstrlcpy_#t~mem3_2|) (= 1 (select |v_#valid_15| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|)) InVars {#memory_int=|v_#memory_int_6|, #length=|v_#length_10|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_2|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3] 15#L20-1true [108] L20-1-->L20-2: Formula: (and (= 1 (select |v_#valid_17| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|) (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| 1) (select |v_#length_12| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3| (store (select |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| |v_ULTIMATE.start_cstrlcpy_#t~mem3_3|)))) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_8|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} AuxVars[] AssignedVars[#memory_int] 12#L20-2true [204] L20-2-->L19-3: Formula: (> 0 |v_ULTIMATE.start_cstrlcpy_#t~mem3_7|) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_7|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_6|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_6|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_7|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_6|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post1.offset] 29#L19-3true 71.51/34.41 [2019-03-28 12:39:41,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:41,352 INFO L82 PathProgramCache]: Analyzing trace with hash -355403805, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:41,353 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:41,353 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:41,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,354 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,354 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:41,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:41,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:41,382 INFO L82 PathProgramCache]: Analyzing trace with hash 150585525, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:41,383 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:41,383 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:41,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,384 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,384 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:41,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:41,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:41,392 INFO L82 PathProgramCache]: Analyzing trace with hash 1590846995, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:41,392 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:41,392 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:41,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,393 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:41,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:41,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:41,803 WARN L188 SmtUtils]: Spent 283.00 ms on a formula simplification. DAG size of input: 104 DAG size of output: 91 71.51/34.41 [2019-03-28 12:39:41,949 WARN L188 SmtUtils]: Spent 144.00 ms on a formula simplification that was a NOOP. DAG size: 87 71.51/34.41 [2019-03-28 12:39:41,963 INFO L216 LassoAnalysis]: Preferences: 71.51/34.41 [2019-03-28 12:39:41,964 INFO L124 ssoRankerPreferences]: Compute integeral hull: false 71.51/34.41 [2019-03-28 12:39:41,964 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true 71.51/34.41 [2019-03-28 12:39:41,965 INFO L126 ssoRankerPreferences]: Term annotations enabled: false 71.51/34.41 [2019-03-28 12:39:41,965 INFO L127 ssoRankerPreferences]: Use exernal solver: false 71.51/34.41 [2019-03-28 12:39:41,965 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 71.51/34.41 [2019-03-28 12:39:41,965 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false 71.51/34.41 [2019-03-28 12:39:41,965 INFO L130 ssoRankerPreferences]: Path of dumped script: 71.51/34.41 [2019-03-28 12:39:41,965 INFO L131 ssoRankerPreferences]: Filename of dumped script: theBenchmark.c_BEv2_Iteration1_Lasso 71.51/34.41 [2019-03-28 12:39:41,966 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank 71.51/34.41 [2019-03-28 12:39:41,966 INFO L282 LassoAnalysis]: Starting lasso preprocessing... 71.51/34.41 [2019-03-28 12:39:41,982 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:41,987 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:41,990 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:41,992 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:41,994 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:41,996 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:41,998 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,001 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,003 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,005 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,009 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,011 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,013 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,417 WARN L188 SmtUtils]: Spent 283.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 78 71.51/34.41 [2019-03-28 12:39:42,599 WARN L188 SmtUtils]: Spent 167.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 61 71.51/34.41 [2019-03-28 12:39:42,600 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,601 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,603 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:42,604 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:43,104 INFO L300 LassoAnalysis]: Preprocessing complete. 71.51/34.41 [2019-03-28 12:39:43,110 INFO L497 LassoAnalysis]: Using template 'affine'. 71.51/34.41 [2019-03-28 12:39:43,112 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,114 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,114 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,115 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,115 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,115 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,117 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,117 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,120 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,121 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,121 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,121 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,121 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,121 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,124 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,124 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,126 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,127 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,127 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,127 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,128 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,128 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,128 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,128 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,128 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,139 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,140 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,140 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,140 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,140 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,141 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,141 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,141 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,141 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,142 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,142 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,143 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,143 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,143 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,143 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,143 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,144 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,144 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,144 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,145 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,145 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,145 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,145 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,145 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,146 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,146 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,146 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,146 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,147 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,147 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,147 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,147 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,148 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,149 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,149 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,151 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,151 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,152 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,152 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,152 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,152 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,152 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,153 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,153 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,153 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,154 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,154 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,154 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,154 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,154 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,155 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,155 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,155 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,156 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,156 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,156 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,156 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,156 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,157 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,157 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,157 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,157 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,158 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,158 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,158 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,159 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,159 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,159 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,159 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,159 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,159 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,160 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,160 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,160 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,161 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,161 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,161 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,161 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,161 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,162 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,162 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,163 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,163 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,163 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,163 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,163 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,163 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,164 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,164 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,165 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,165 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,166 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,166 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:43,166 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,166 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,166 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,167 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,167 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,167 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,168 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,168 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,168 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,168 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,168 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,170 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,170 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,171 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,172 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,172 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,172 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,172 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,172 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,174 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,174 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,176 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,176 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,176 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,176 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,177 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,177 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,179 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,179 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,184 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,185 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,185 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,185 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,185 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,186 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,189 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,189 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,195 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:43,196 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:43,196 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:43,196 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:43,197 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:43,197 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:43,205 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:43,206 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:43,253 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. 71.51/34.41 [2019-03-28 12:39:43,285 INFO L443 ModelExtractionUtils]: Simplification made 5 calls to the SMT solver. 71.51/34.41 [2019-03-28 12:39:43,285 INFO L444 ModelExtractionUtils]: 53 out of 61 variables were initially zero. Simplification set additionally 6 variables to zero. 71.51/34.41 [2019-03-28 12:39:43,288 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... 71.51/34.41 [2019-03-28 12:39:43,289 INFO L440 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. 71.51/34.41 [2019-03-28 12:39:43,289 INFO L518 LassoAnalysis]: Proved termination. 71.51/34.41 [2019-03-28 12:39:43,290 INFO L520 LassoAnalysis]: Termination argument consisting of: 71.51/34.41 Ranking function f(ULTIMATE.start_cstrlcpy_~n~0) = 1*ULTIMATE.start_cstrlcpy_~n~0 71.51/34.41 Supporting invariants [] 71.51/34.41 [2019-03-28 12:39:43,342 INFO L297 tatePredicateManager]: 16 out of 16 supporting invariants were superfluous and have been removed 71.51/34.41 [2019-03-28 12:39:43,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:43,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:43,375 INFO L256 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 2 conjunts are in the unsatisfiable core 71.51/34.41 [2019-03-28 12:39:43,376 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.51/34.41 [2019-03-28 12:39:43,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:43,387 INFO L256 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 5 conjunts are in the unsatisfiable core 71.51/34.41 [2019-03-28 12:39:43,388 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.51/34.41 [2019-03-28 12:39:43,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.51/34.41 [2019-03-28 12:39:43,434 INFO L98 LoopCannibalizer]: 4 predicates before loop cannibalization 4 predicates after loop cannibalization 71.51/34.41 [2019-03-28 12:39:43,437 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 4 loop predicates 71.51/34.41 [2019-03-28 12:39:43,438 INFO L69 BuchiDifferenceNCSB]: Start buchiDifferenceNCSB. First operand 32 states. Second operand 4 states. 71.51/34.41 [2019-03-28 12:39:43,702 INFO L73 BuchiDifferenceNCSB]: Finished buchiDifferenceNCSB. First operand 32 states.. Second operand 4 states. Result 105 states and 203 transitions. Complement of second has 8 states. 71.51/34.41 [2019-03-28 12:39:43,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 3 non-accepting loop states 1 accepting loop states 71.51/34.41 [2019-03-28 12:39:43,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4 states. 71.51/34.41 [2019-03-28 12:39:43,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 129 transitions. 71.51/34.41 [2019-03-28 12:39:43,705 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 129 transitions. Stem has 7 letters. Loop has 5 letters. 71.51/34.41 [2019-03-28 12:39:43,706 INFO L116 BuchiAccepts]: Finished buchiAccepts. 71.51/34.41 [2019-03-28 12:39:43,706 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 129 transitions. Stem has 12 letters. Loop has 5 letters. 71.51/34.41 [2019-03-28 12:39:43,707 INFO L116 BuchiAccepts]: Finished buchiAccepts. 71.51/34.41 [2019-03-28 12:39:43,707 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 129 transitions. Stem has 7 letters. Loop has 10 letters. 71.51/34.41 [2019-03-28 12:39:43,707 INFO L116 BuchiAccepts]: Finished buchiAccepts. 71.51/34.41 [2019-03-28 12:39:43,718 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 203 transitions. 71.51/34.41 [2019-03-28 12:39:43,722 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 71.51/34.41 [2019-03-28 12:39:43,723 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 49 states and 80 transitions. 71.51/34.41 [2019-03-28 12:39:43,724 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 71.51/34.41 [2019-03-28 12:39:43,724 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 71.51/34.41 [2019-03-28 12:39:43,725 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 80 transitions. 71.51/34.41 [2019-03-28 12:39:43,726 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 71.51/34.41 [2019-03-28 12:39:43,726 INFO L706 BuchiCegarLoop]: Abstraction has 49 states and 80 transitions. 71.51/34.41 [2019-03-28 12:39:43,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 80 transitions. 71.51/34.41 [2019-03-28 12:39:43,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 34. 71.51/34.41 [2019-03-28 12:39:43,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. 71.51/34.41 [2019-03-28 12:39:43,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 58 transitions. 71.51/34.41 [2019-03-28 12:39:43,731 INFO L729 BuchiCegarLoop]: Abstraction has 34 states and 58 transitions. 71.51/34.41 [2019-03-28 12:39:43,731 INFO L609 BuchiCegarLoop]: Abstraction has 34 states and 58 transitions. 71.51/34.41 [2019-03-28 12:39:43,731 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ 71.51/34.41 [2019-03-28 12:39:43,731 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 58 transitions. 71.51/34.41 [2019-03-28 12:39:43,732 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 71.51/34.41 [2019-03-28 12:39:43,732 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 71.51/34.41 [2019-03-28 12:39:43,732 INFO L119 BuchiIsEmpty]: Starting construction of run 71.51/34.41 [2019-03-28 12:39:43,732 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:43,733 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:43,733 INFO L794 eck$LassoCheckResult]: Stem: 298#ULTIMATE.startENTRY [206] ULTIMATE.startENTRY-->L39: Formula: (and (= (store |v_#valid_22| 0 0) |v_#valid_21|) (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|)) InVars {#valid=|v_#valid_22|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_5|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_5|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_11, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_#t~nondet6=|v_ULTIMATE.start_main_#t~nondet6_6|, ULTIMATE.start_main_#t~nondet7=|v_ULTIMATE.start_main_#t~nondet7_6|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret10=|v_ULTIMATE.start_main_#t~ret10_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_5|, #valid=|v_#valid_21|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~n~1, #NULL.offset, ULTIMATE.start_main_#t~nondet6, ULTIMATE.start_main_#t~nondet7, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret10, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~length~0] 284#L39 [137] L39-->L39-2: Formula: (>= v_ULTIMATE.start_main_~length~0_6 1) InVars {ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} OutVars{ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} AuxVars[] AssignedVars[] 274#L39-2 [138] L39-2-->L42-1: Formula: (>= v_ULTIMATE.start_main_~n~1_6 1) InVars {ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} OutVars{ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} AuxVars[] AssignedVars[] 275#L42-1 [163] L42-1-->L47: Formula: (let ((.cse0 (store |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc9.offset_2| 0) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc8.base_2|) (< 0 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| |v_#StackHeapBarrier_1|) (= |v_ULTIMATE.start_main_#t~malloc8.offset_2| 0) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| 0) (= (store (store |v_#length_5| |v_ULTIMATE.start_main_#t~malloc8.base_2| v_ULTIMATE.start_main_~n~1_7) |v_ULTIMATE.start_main_#t~malloc9.base_2| v_ULTIMATE.start_main_~length~0_7) |v_#length_3|) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc9.offset_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc8.offset_2|) (= 0 (select |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2|)) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2|)) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2| 1) |v_#valid_5|) (< |v_ULTIMATE.start_main_#t~malloc9.base_2| |v_#StackHeapBarrier_1|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_2|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_2|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_2|, #valid=|v_#valid_5|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_3|, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_2|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~nondetString2~0.offset] 270#L47 [90] L47-->L47-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= .cse0 (select |v_#length_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= (store |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0)) |v_#memory_int_2|) (= 1 (select |v_#valid_8| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (<= 1 .cse0))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} AuxVars[] AssignedVars[#memory_int] 271#L47-1 [207] L47-1-->L18: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (= v_ULTIMATE.start_cstrlcpy_~dst.offset_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (<= .cse0 (select |v_#length_16| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= (store |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_11|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_7 v_ULTIMATE.start_cstrlcpy_~dst.offset_3) (<= 1 .cse0) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_9 v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_main_~nondetString2~0.base_8) (= v_ULTIMATE.start_main_~nondetString1~0.base_8 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 v_ULTIMATE.start_cstrlcpy_~s~0.offset_8) (= (select |v_#valid_23| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_main_~nondetString2~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_main_~n~1_12) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 v_ULTIMATE.start_cstrlcpy_~d~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_cstrlcpy_~siz_5) (= v_ULTIMATE.start_cstrlcpy_~n~0_9 v_ULTIMATE.start_cstrlcpy_~siz_5))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_12|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_16|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_8|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_7|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_8|, ULTIMATE.start_cstrlcpy_~src.offset=v_ULTIMATE.start_cstrlcpy_~src.offset_4, ULTIMATE.start_cstrlcpy_~src.base=v_ULTIMATE.start_cstrlcpy_~src.base_5, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_8, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #length=|v_#length_16|, ULTIMATE.start_cstrlcpy_#in~dst.offset=|v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|, ULTIMATE.start_cstrlcpy_#in~dst.base=|v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_7|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_9, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_7|, ULTIMATE.start_cstrlcpy_#res=|v_ULTIMATE.start_cstrlcpy_#res_4|, ULTIMATE.start_cstrlcpy_~dst.offset=v_ULTIMATE.start_cstrlcpy_~dst.offset_3, ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_5, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_9, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrlcpy_#in~src.base=|v_ULTIMATE.start_cstrlcpy_#in~src.base_2|, ULTIMATE.start_cstrlcpy_#in~siz=|v_ULTIMATE.start_cstrlcpy_#in~siz_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_8, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_7|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_cstrlcpy_~dst.base=v_ULTIMATE.start_cstrlcpy_~dst.base_3, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11, ULTIMATE.start_cstrlcpy_#in~src.offset=|v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post4.base, ULTIMATE.start_cstrlcpy_~src.offset, ULTIMATE.start_cstrlcpy_~src.base, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#in~dst.offset, ULTIMATE.start_cstrlcpy_#in~dst.base, ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset, ULTIMATE.start_cstrlcpy_#res, ULTIMATE.start_cstrlcpy_~dst.offset, ULTIMATE.start_cstrlcpy_~siz, ULTIMATE.start_cstrlcpy_~n~0, ULTIMATE.start_cstrlcpy_#in~src.base, ULTIMATE.start_cstrlcpy_#in~siz, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post4.offset, #memory_int, ULTIMATE.start_cstrlcpy_~dst.base, ULTIMATE.start_cstrlcpy_#in~src.offset] 288#L18 [172] L18-->L19-3: Formula: (> 0 v_ULTIMATE.start_cstrlcpy_~n~0_4) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} AuxVars[] AssignedVars[] 289#L19-3 71.51/34.41 [2019-03-28 12:39:43,734 INFO L796 eck$LassoCheckResult]: Loop: 289#L19-3 [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 299#L19-1 [184] L19-1-->L20: Formula: (and (= v_ULTIMATE.start_cstrlcpy_~d~0.base_3 |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| v_ULTIMATE.start_cstrlcpy_~s~0.offset_7) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2| v_ULTIMATE.start_cstrlcpy_~d~0.base_4) (= v_ULTIMATE.start_cstrlcpy_~s~0.offset_6 (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| 1)) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_3 (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| 1)) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2| v_ULTIMATE.start_cstrlcpy_~s~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_7 |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| v_ULTIMATE.start_cstrlcpy_~d~0.offset_4) (< 0 |v_ULTIMATE.start_cstrlcpy_#t~pre0_6|)) InVars {ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_8, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_6|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_4, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_7, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_4} OutVars{ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_5|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_3, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_6, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_3, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2|, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_7, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset] 300#L20 [112] L20-->L20-1: Formula: (and (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3| 1) (select |v_#length_10| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (= (select (select |v_#memory_int_6| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|) |v_ULTIMATE.start_cstrlcpy_#t~mem3_2|) (= 1 (select |v_#valid_15| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|)) InVars {#memory_int=|v_#memory_int_6|, #length=|v_#length_10|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_2|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3] 302#L20-1 [108] L20-1-->L20-2: Formula: (and (= 1 (select |v_#valid_17| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|) (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| 1) (select |v_#length_12| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3| (store (select |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| |v_ULTIMATE.start_cstrlcpy_#t~mem3_3|)))) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_8|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} AuxVars[] AssignedVars[#memory_int] 301#L20-2 [204] L20-2-->L19-3: Formula: (> 0 |v_ULTIMATE.start_cstrlcpy_#t~mem3_7|) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_7|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_6|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_6|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_7|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_6|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post1.offset] 289#L19-3 71.51/34.41 [2019-03-28 12:39:43,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:43,735 INFO L82 PathProgramCache]: Analyzing trace with hash -355403806, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:43,735 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:43,735 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:43,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,736 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:43,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.51/34.41 [2019-03-28 12:39:43,755 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.51/34.41 [2019-03-28 12:39:43,755 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 71.51/34.41 [2019-03-28 12:39:43,755 INFO L799 eck$LassoCheckResult]: stem already infeasible 71.51/34.41 [2019-03-28 12:39:43,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:43,756 INFO L82 PathProgramCache]: Analyzing trace with hash 150585525, now seen corresponding path program 2 times 71.51/34.41 [2019-03-28 12:39:43,756 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:43,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:43,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,757 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:43,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:43,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.51/34.41 [2019-03-28 12:39:43,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.51/34.41 [2019-03-28 12:39:43,852 INFO L87 Difference]: Start difference. First operand 34 states and 58 transitions. cyclomatic complexity: 28 Second operand 4 states. 71.51/34.41 [2019-03-28 12:39:43,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.51/34.41 [2019-03-28 12:39:43,917 INFO L93 Difference]: Finished difference Result 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.51/34.41 [2019-03-28 12:39:43,924 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,925 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:43,926 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,926 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 71.51/34.41 [2019-03-28 12:39:43,926 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 71.51/34.41 [2019-03-28 12:39:43,926 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,926 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 71.51/34.41 [2019-03-28 12:39:43,926 INFO L706 BuchiCegarLoop]: Abstraction has 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. 71.51/34.41 [2019-03-28 12:39:43,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. 71.51/34.41 [2019-03-28 12:39:43,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,928 INFO L729 BuchiCegarLoop]: Abstraction has 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,928 INFO L609 BuchiCegarLoop]: Abstraction has 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,928 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ 71.51/34.41 [2019-03-28 12:39:43,928 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:43,929 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:43,929 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 71.51/34.41 [2019-03-28 12:39:43,929 INFO L119 BuchiIsEmpty]: Starting construction of run 71.51/34.41 [2019-03-28 12:39:43,929 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:43,929 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:43,930 INFO L794 eck$LassoCheckResult]: Stem: 368#ULTIMATE.startENTRY [206] ULTIMATE.startENTRY-->L39: Formula: (and (= (store |v_#valid_22| 0 0) |v_#valid_21|) (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|)) InVars {#valid=|v_#valid_22|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_5|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_5|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_11, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_#t~nondet6=|v_ULTIMATE.start_main_#t~nondet6_6|, ULTIMATE.start_main_#t~nondet7=|v_ULTIMATE.start_main_#t~nondet7_6|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret10=|v_ULTIMATE.start_main_#t~ret10_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_5|, #valid=|v_#valid_21|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~n~1, #NULL.offset, ULTIMATE.start_main_#t~nondet6, ULTIMATE.start_main_#t~nondet7, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret10, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~length~0] 356#L39 [137] L39-->L39-2: Formula: (>= v_ULTIMATE.start_main_~length~0_6 1) InVars {ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} OutVars{ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} AuxVars[] AssignedVars[] 346#L39-2 [138] L39-2-->L42-1: Formula: (>= v_ULTIMATE.start_main_~n~1_6 1) InVars {ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} OutVars{ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} AuxVars[] AssignedVars[] 347#L42-1 [163] L42-1-->L47: Formula: (let ((.cse0 (store |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc9.offset_2| 0) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc8.base_2|) (< 0 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| |v_#StackHeapBarrier_1|) (= |v_ULTIMATE.start_main_#t~malloc8.offset_2| 0) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| 0) (= (store (store |v_#length_5| |v_ULTIMATE.start_main_#t~malloc8.base_2| v_ULTIMATE.start_main_~n~1_7) |v_ULTIMATE.start_main_#t~malloc9.base_2| v_ULTIMATE.start_main_~length~0_7) |v_#length_3|) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc9.offset_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc8.offset_2|) (= 0 (select |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2|)) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2|)) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2| 1) |v_#valid_5|) (< |v_ULTIMATE.start_main_#t~malloc9.base_2| |v_#StackHeapBarrier_1|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_2|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_2|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_2|, #valid=|v_#valid_5|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_3|, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_2|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~nondetString2~0.offset] 342#L47 [90] L47-->L47-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= .cse0 (select |v_#length_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= (store |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0)) |v_#memory_int_2|) (= 1 (select |v_#valid_8| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (<= 1 .cse0))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} AuxVars[] AssignedVars[#memory_int] 343#L47-1 [207] L47-1-->L18: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (= v_ULTIMATE.start_cstrlcpy_~dst.offset_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (<= .cse0 (select |v_#length_16| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= (store |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_11|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_7 v_ULTIMATE.start_cstrlcpy_~dst.offset_3) (<= 1 .cse0) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_9 v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_main_~nondetString2~0.base_8) (= v_ULTIMATE.start_main_~nondetString1~0.base_8 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 v_ULTIMATE.start_cstrlcpy_~s~0.offset_8) (= (select |v_#valid_23| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_main_~nondetString2~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_main_~n~1_12) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 v_ULTIMATE.start_cstrlcpy_~d~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_cstrlcpy_~siz_5) (= v_ULTIMATE.start_cstrlcpy_~n~0_9 v_ULTIMATE.start_cstrlcpy_~siz_5))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_12|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_16|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_8|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_7|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_8|, ULTIMATE.start_cstrlcpy_~src.offset=v_ULTIMATE.start_cstrlcpy_~src.offset_4, ULTIMATE.start_cstrlcpy_~src.base=v_ULTIMATE.start_cstrlcpy_~src.base_5, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_8, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #length=|v_#length_16|, ULTIMATE.start_cstrlcpy_#in~dst.offset=|v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|, ULTIMATE.start_cstrlcpy_#in~dst.base=|v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_7|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_9, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_7|, ULTIMATE.start_cstrlcpy_#res=|v_ULTIMATE.start_cstrlcpy_#res_4|, ULTIMATE.start_cstrlcpy_~dst.offset=v_ULTIMATE.start_cstrlcpy_~dst.offset_3, ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_5, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_9, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrlcpy_#in~src.base=|v_ULTIMATE.start_cstrlcpy_#in~src.base_2|, ULTIMATE.start_cstrlcpy_#in~siz=|v_ULTIMATE.start_cstrlcpy_#in~siz_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_8, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_7|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_cstrlcpy_~dst.base=v_ULTIMATE.start_cstrlcpy_~dst.base_3, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11, ULTIMATE.start_cstrlcpy_#in~src.offset=|v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post4.base, ULTIMATE.start_cstrlcpy_~src.offset, ULTIMATE.start_cstrlcpy_~src.base, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#in~dst.offset, ULTIMATE.start_cstrlcpy_#in~dst.base, ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset, ULTIMATE.start_cstrlcpy_#res, ULTIMATE.start_cstrlcpy_~dst.offset, ULTIMATE.start_cstrlcpy_~siz, ULTIMATE.start_cstrlcpy_~n~0, ULTIMATE.start_cstrlcpy_#in~src.base, ULTIMATE.start_cstrlcpy_#in~siz, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post4.offset, #memory_int, ULTIMATE.start_cstrlcpy_~dst.base, ULTIMATE.start_cstrlcpy_#in~src.offset] 362#L18 [173] L18-->L19-3: Formula: (< 0 v_ULTIMATE.start_cstrlcpy_~n~0_4) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} AuxVars[] AssignedVars[] 363#L19-3 [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 349#L19-1 71.51/34.41 [2019-03-28 12:39:43,930 INFO L796 eck$LassoCheckResult]: Loop: 349#L19-1 [185] L19-1-->L20: Formula: (and (= v_ULTIMATE.start_cstrlcpy_~d~0.base_3 |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| v_ULTIMATE.start_cstrlcpy_~s~0.offset_7) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2| v_ULTIMATE.start_cstrlcpy_~d~0.base_4) (= v_ULTIMATE.start_cstrlcpy_~s~0.offset_6 (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| 1)) (> 0 |v_ULTIMATE.start_cstrlcpy_#t~pre0_6|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_3 (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| 1)) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2| v_ULTIMATE.start_cstrlcpy_~s~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_7 |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| v_ULTIMATE.start_cstrlcpy_~d~0.offset_4)) InVars {ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_8, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_6|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_4, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_7, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_4} OutVars{ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_5|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_3, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_6, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_3, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2|, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_7, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset] 357#L20 [112] L20-->L20-1: Formula: (and (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3| 1) (select |v_#length_10| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (= (select (select |v_#memory_int_6| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|) |v_ULTIMATE.start_cstrlcpy_#t~mem3_2|) (= 1 (select |v_#valid_15| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|)) InVars {#memory_int=|v_#memory_int_6|, #length=|v_#length_10|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_2|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3] 367#L20-1 [108] L20-1-->L20-2: Formula: (and (= 1 (select |v_#valid_17| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|) (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| 1) (select |v_#length_12| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3| (store (select |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| |v_ULTIMATE.start_cstrlcpy_#t~mem3_3|)))) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_8|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} AuxVars[] AssignedVars[#memory_int] 360#L20-2 [204] L20-2-->L19-3: Formula: (> 0 |v_ULTIMATE.start_cstrlcpy_#t~mem3_7|) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_7|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_6|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_6|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_7|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_6|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post1.offset] 348#L19-3 [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 349#L19-1 71.51/34.41 [2019-03-28 12:39:43,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:43,931 INFO L82 PathProgramCache]: Analyzing trace with hash 1867384059, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:43,931 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:43,931 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:43,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,932 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:43,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:43,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:43,943 INFO L82 PathProgramCache]: Analyzing trace with hash 202927366, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:43,943 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:43,943 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:43,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:43,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:43,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:43,951 INFO L82 PathProgramCache]: Analyzing trace with hash 2072540236, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:43,951 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:43,951 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:43,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:43,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:44,025 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.51/34.41 [2019-03-28 12:39:44,025 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.51/34.41 [2019-03-28 12:39:44,026 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.51/34.41 [2019-03-28 12:39:44,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. 71.51/34.41 [2019-03-28 12:39:44,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 71.51/34.41 [2019-03-28 12:39:44,135 INFO L87 Difference]: Start difference. First operand 29 states and 47 transitions. cyclomatic complexity: 21 Second operand 4 states. 71.51/34.41 [2019-03-28 12:39:44,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.51/34.41 [2019-03-28 12:39:44,178 INFO L93 Difference]: Finished difference Result 31 states and 49 transitions. 71.51/34.41 [2019-03-28 12:39:44,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.51/34.41 [2019-03-28 12:39:44,182 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 49 transitions. 71.51/34.41 [2019-03-28 12:39:44,182 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:44,183 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,183 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 71.51/34.41 [2019-03-28 12:39:44,183 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 71.51/34.41 [2019-03-28 12:39:44,183 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,183 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 71.51/34.41 [2019-03-28 12:39:44,184 INFO L706 BuchiCegarLoop]: Abstraction has 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. 71.51/34.41 [2019-03-28 12:39:44,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. 71.51/34.41 [2019-03-28 12:39:44,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,185 INFO L729 BuchiCegarLoop]: Abstraction has 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,185 INFO L609 BuchiCegarLoop]: Abstraction has 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,185 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ 71.51/34.41 [2019-03-28 12:39:44,185 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 48 transitions. 71.51/34.41 [2019-03-28 12:39:44,186 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:44,186 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 71.51/34.41 [2019-03-28 12:39:44,186 INFO L119 BuchiIsEmpty]: Starting construction of run 71.51/34.41 [2019-03-28 12:39:44,186 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:44,186 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] 71.51/34.41 [2019-03-28 12:39:44,187 INFO L794 eck$LassoCheckResult]: Stem: 437#ULTIMATE.startENTRY [206] ULTIMATE.startENTRY-->L39: Formula: (and (= (store |v_#valid_22| 0 0) |v_#valid_21|) (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|)) InVars {#valid=|v_#valid_22|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_5|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_5|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_11, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_#t~nondet6=|v_ULTIMATE.start_main_#t~nondet6_6|, ULTIMATE.start_main_#t~nondet7=|v_ULTIMATE.start_main_#t~nondet7_6|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret10=|v_ULTIMATE.start_main_#t~ret10_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_5|, #valid=|v_#valid_21|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~n~1, #NULL.offset, ULTIMATE.start_main_#t~nondet6, ULTIMATE.start_main_#t~nondet7, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret10, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~length~0] 425#L39 [137] L39-->L39-2: Formula: (>= v_ULTIMATE.start_main_~length~0_6 1) InVars {ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} OutVars{ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} AuxVars[] AssignedVars[] 415#L39-2 [138] L39-2-->L42-1: Formula: (>= v_ULTIMATE.start_main_~n~1_6 1) InVars {ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} OutVars{ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} AuxVars[] AssignedVars[] 416#L42-1 [163] L42-1-->L47: Formula: (let ((.cse0 (store |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc9.offset_2| 0) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc8.base_2|) (< 0 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| |v_#StackHeapBarrier_1|) (= |v_ULTIMATE.start_main_#t~malloc8.offset_2| 0) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| 0) (= (store (store |v_#length_5| |v_ULTIMATE.start_main_#t~malloc8.base_2| v_ULTIMATE.start_main_~n~1_7) |v_ULTIMATE.start_main_#t~malloc9.base_2| v_ULTIMATE.start_main_~length~0_7) |v_#length_3|) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc9.offset_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc8.offset_2|) (= 0 (select |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2|)) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2|)) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2| 1) |v_#valid_5|) (< |v_ULTIMATE.start_main_#t~malloc9.base_2| |v_#StackHeapBarrier_1|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_2|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_2|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_2|, #valid=|v_#valid_5|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_3|, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_2|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~nondetString2~0.offset] 411#L47 [90] L47-->L47-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= .cse0 (select |v_#length_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= (store |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0)) |v_#memory_int_2|) (= 1 (select |v_#valid_8| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (<= 1 .cse0))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} AuxVars[] AssignedVars[#memory_int] 412#L47-1 [207] L47-1-->L18: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (= v_ULTIMATE.start_cstrlcpy_~dst.offset_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (<= .cse0 (select |v_#length_16| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= (store |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_11|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_7 v_ULTIMATE.start_cstrlcpy_~dst.offset_3) (<= 1 .cse0) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_9 v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_main_~nondetString2~0.base_8) (= v_ULTIMATE.start_main_~nondetString1~0.base_8 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 v_ULTIMATE.start_cstrlcpy_~s~0.offset_8) (= (select |v_#valid_23| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_main_~nondetString2~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_main_~n~1_12) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 v_ULTIMATE.start_cstrlcpy_~d~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_cstrlcpy_~siz_5) (= v_ULTIMATE.start_cstrlcpy_~n~0_9 v_ULTIMATE.start_cstrlcpy_~siz_5))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_12|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_16|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_8|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_7|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_8|, ULTIMATE.start_cstrlcpy_~src.offset=v_ULTIMATE.start_cstrlcpy_~src.offset_4, ULTIMATE.start_cstrlcpy_~src.base=v_ULTIMATE.start_cstrlcpy_~src.base_5, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_8, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #length=|v_#length_16|, ULTIMATE.start_cstrlcpy_#in~dst.offset=|v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|, ULTIMATE.start_cstrlcpy_#in~dst.base=|v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_7|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_9, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_7|, ULTIMATE.start_cstrlcpy_#res=|v_ULTIMATE.start_cstrlcpy_#res_4|, ULTIMATE.start_cstrlcpy_~dst.offset=v_ULTIMATE.start_cstrlcpy_~dst.offset_3, ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_5, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_9, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrlcpy_#in~src.base=|v_ULTIMATE.start_cstrlcpy_#in~src.base_2|, ULTIMATE.start_cstrlcpy_#in~siz=|v_ULTIMATE.start_cstrlcpy_#in~siz_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_8, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_7|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_cstrlcpy_~dst.base=v_ULTIMATE.start_cstrlcpy_~dst.base_3, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11, ULTIMATE.start_cstrlcpy_#in~src.offset=|v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post4.base, ULTIMATE.start_cstrlcpy_~src.offset, ULTIMATE.start_cstrlcpy_~src.base, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#in~dst.offset, ULTIMATE.start_cstrlcpy_#in~dst.base, ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset, ULTIMATE.start_cstrlcpy_#res, ULTIMATE.start_cstrlcpy_~dst.offset, ULTIMATE.start_cstrlcpy_~siz, ULTIMATE.start_cstrlcpy_~n~0, ULTIMATE.start_cstrlcpy_#in~src.base, ULTIMATE.start_cstrlcpy_#in~siz, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post4.offset, #memory_int, ULTIMATE.start_cstrlcpy_~dst.base, ULTIMATE.start_cstrlcpy_#in~src.offset] 426#L18 [173] L18-->L19-3: Formula: (< 0 v_ULTIMATE.start_cstrlcpy_~n~0_4) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} AuxVars[] AssignedVars[] 417#L19-3 [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 418#L19-1 [132] L19-1-->L18-1: Formula: (= 0 |v_ULTIMATE.start_cstrlcpy_#t~pre0_4|) InVars {ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_4|} OutVars{ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_3|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0] 423#L18-1 [97] L18-1-->L27: Formula: (= 0 v_ULTIMATE.start_cstrlcpy_~n~0_8) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_8} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_8} AuxVars[] AssignedVars[] 421#L27 [96] L27-->L29-3: Formula: (= 0 v_ULTIMATE.start_cstrlcpy_~siz_4) InVars {ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_4} OutVars{ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_4} AuxVars[] AssignedVars[] 413#L29-3 71.51/34.41 [2019-03-28 12:39:44,187 INFO L796 eck$LassoCheckResult]: Loop: 413#L29-3 [94] L29-3-->L29: Formula: (and (= |v_ULTIMATE.start_cstrlcpy_#t~post4.base_1| v_ULTIMATE.start_cstrlcpy_~s~0.base_2) (= |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_1| v_ULTIMATE.start_cstrlcpy_~s~0.offset_2) (= v_ULTIMATE.start_cstrlcpy_~s~0.offset_1 (+ |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_1| 1)) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_1 |v_ULTIMATE.start_cstrlcpy_#t~post4.base_1|)) InVars {ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_2, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_2} OutVars{ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_1, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_1|, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_1, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#t~post4.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post4.base] 414#L29 [105] L29-->L29-1: Formula: (and (= (select (select |v_#memory_int_1| |v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|) |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|) |v_ULTIMATE.start_cstrlcpy_#t~mem5_1|) (= (select |v_#valid_3| |v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|) 1) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|) (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2| 1) (select |v_#length_1| |v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|))) InVars {#memory_int=|v_#memory_int_1|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|, #length=|v_#length_1|, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|, #valid=|v_#valid_3|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_1|, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|, #length=|v_#length_1|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem5] 424#L29-1 [202] L29-1-->L29-3: Formula: (< 0 |v_ULTIMATE.start_cstrlcpy_#t~mem5_5|) InVars {ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_5|} OutVars{ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_6|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_4|, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_5|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post4.offset, ULTIMATE.start_cstrlcpy_#t~post4.base] 413#L29-3 71.51/34.41 [2019-03-28 12:39:44,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:44,188 INFO L82 PathProgramCache]: Analyzing trace with hash -1472753464, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:44,188 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:44,188 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:44,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,189 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,189 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:44,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.51/34.41 [2019-03-28 12:39:44,222 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. 71.51/34.41 [2019-03-28 12:39:44,222 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 71.51/34.41 [2019-03-28 12:39:44,222 INFO L799 eck$LassoCheckResult]: stem already infeasible 71.51/34.41 [2019-03-28 12:39:44,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:44,222 INFO L82 PathProgramCache]: Analyzing trace with hash 123582, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:44,223 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:44,223 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:44,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,223 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,224 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,256 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 71.51/34.41 [2019-03-28 12:39:44,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 71.51/34.41 [2019-03-28 12:39:44,257 INFO L87 Difference]: Start difference. First operand 30 states and 48 transitions. cyclomatic complexity: 21 Second operand 5 states. 71.51/34.41 [2019-03-28 12:39:44,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.51/34.41 [2019-03-28 12:39:44,296 INFO L93 Difference]: Finished difference Result 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 71.51/34.41 [2019-03-28 12:39:44,299 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,300 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:44,301 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,301 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 71.51/34.41 [2019-03-28 12:39:44,301 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 71.51/34.41 [2019-03-28 12:39:44,301 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,301 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 71.51/34.41 [2019-03-28 12:39:44,301 INFO L706 BuchiCegarLoop]: Abstraction has 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. 71.51/34.41 [2019-03-28 12:39:44,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. 71.51/34.41 [2019-03-28 12:39:44,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,303 INFO L729 BuchiCegarLoop]: Abstraction has 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,303 INFO L609 BuchiCegarLoop]: Abstraction has 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,303 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ 71.51/34.41 [2019-03-28 12:39:44,303 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 47 transitions. 71.51/34.41 [2019-03-28 12:39:44,304 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 71.51/34.41 [2019-03-28 12:39:44,304 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 71.51/34.41 [2019-03-28 12:39:44,304 INFO L119 BuchiIsEmpty]: Starting construction of run 71.51/34.41 [2019-03-28 12:39:44,304 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:44,304 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1] 71.51/34.41 [2019-03-28 12:39:44,305 INFO L794 eck$LassoCheckResult]: Stem: 507#ULTIMATE.startENTRY [206] ULTIMATE.startENTRY-->L39: Formula: (and (= (store |v_#valid_22| 0 0) |v_#valid_21|) (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|)) InVars {#valid=|v_#valid_22|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_5|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_5|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_11, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_#t~nondet6=|v_ULTIMATE.start_main_#t~nondet6_6|, ULTIMATE.start_main_#t~nondet7=|v_ULTIMATE.start_main_#t~nondet7_6|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret10=|v_ULTIMATE.start_main_#t~ret10_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_5|, #valid=|v_#valid_21|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~n~1, #NULL.offset, ULTIMATE.start_main_#t~nondet6, ULTIMATE.start_main_#t~nondet7, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret10, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~length~0] 495#L39 [137] L39-->L39-2: Formula: (>= v_ULTIMATE.start_main_~length~0_6 1) InVars {ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} OutVars{ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} AuxVars[] AssignedVars[] 485#L39-2 [138] L39-2-->L42-1: Formula: (>= v_ULTIMATE.start_main_~n~1_6 1) InVars {ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} OutVars{ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} AuxVars[] AssignedVars[] 486#L42-1 [163] L42-1-->L47: Formula: (let ((.cse0 (store |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc9.offset_2| 0) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc8.base_2|) (< 0 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| |v_#StackHeapBarrier_1|) (= |v_ULTIMATE.start_main_#t~malloc8.offset_2| 0) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| 0) (= (store (store |v_#length_5| |v_ULTIMATE.start_main_#t~malloc8.base_2| v_ULTIMATE.start_main_~n~1_7) |v_ULTIMATE.start_main_#t~malloc9.base_2| v_ULTIMATE.start_main_~length~0_7) |v_#length_3|) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc9.offset_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc8.offset_2|) (= 0 (select |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2|)) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2|)) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2| 1) |v_#valid_5|) (< |v_ULTIMATE.start_main_#t~malloc9.base_2| |v_#StackHeapBarrier_1|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_2|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_2|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_2|, #valid=|v_#valid_5|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_3|, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_2|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~nondetString2~0.offset] 481#L47 [90] L47-->L47-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= .cse0 (select |v_#length_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= (store |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0)) |v_#memory_int_2|) (= 1 (select |v_#valid_8| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (<= 1 .cse0))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} AuxVars[] AssignedVars[#memory_int] 482#L47-1 [207] L47-1-->L18: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (= v_ULTIMATE.start_cstrlcpy_~dst.offset_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (<= .cse0 (select |v_#length_16| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= (store |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_11|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_7 v_ULTIMATE.start_cstrlcpy_~dst.offset_3) (<= 1 .cse0) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_9 v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_main_~nondetString2~0.base_8) (= v_ULTIMATE.start_main_~nondetString1~0.base_8 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 v_ULTIMATE.start_cstrlcpy_~s~0.offset_8) (= (select |v_#valid_23| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_main_~nondetString2~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_main_~n~1_12) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 v_ULTIMATE.start_cstrlcpy_~d~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_cstrlcpy_~siz_5) (= v_ULTIMATE.start_cstrlcpy_~n~0_9 v_ULTIMATE.start_cstrlcpy_~siz_5))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_12|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_16|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_8|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_7|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_8|, ULTIMATE.start_cstrlcpy_~src.offset=v_ULTIMATE.start_cstrlcpy_~src.offset_4, ULTIMATE.start_cstrlcpy_~src.base=v_ULTIMATE.start_cstrlcpy_~src.base_5, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_8, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #length=|v_#length_16|, ULTIMATE.start_cstrlcpy_#in~dst.offset=|v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|, ULTIMATE.start_cstrlcpy_#in~dst.base=|v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_7|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_9, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_7|, ULTIMATE.start_cstrlcpy_#res=|v_ULTIMATE.start_cstrlcpy_#res_4|, ULTIMATE.start_cstrlcpy_~dst.offset=v_ULTIMATE.start_cstrlcpy_~dst.offset_3, ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_5, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_9, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrlcpy_#in~src.base=|v_ULTIMATE.start_cstrlcpy_#in~src.base_2|, ULTIMATE.start_cstrlcpy_#in~siz=|v_ULTIMATE.start_cstrlcpy_#in~siz_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_8, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_7|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_cstrlcpy_~dst.base=v_ULTIMATE.start_cstrlcpy_~dst.base_3, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11, ULTIMATE.start_cstrlcpy_#in~src.offset=|v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post4.base, ULTIMATE.start_cstrlcpy_~src.offset, ULTIMATE.start_cstrlcpy_~src.base, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#in~dst.offset, ULTIMATE.start_cstrlcpy_#in~dst.base, ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset, ULTIMATE.start_cstrlcpy_#res, ULTIMATE.start_cstrlcpy_~dst.offset, ULTIMATE.start_cstrlcpy_~siz, ULTIMATE.start_cstrlcpy_~n~0, ULTIMATE.start_cstrlcpy_#in~src.base, ULTIMATE.start_cstrlcpy_#in~siz, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post4.offset, #memory_int, ULTIMATE.start_cstrlcpy_~dst.base, ULTIMATE.start_cstrlcpy_#in~src.offset] 496#L18 [173] L18-->L19-3: Formula: (< 0 v_ULTIMATE.start_cstrlcpy_~n~0_4) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} AuxVars[] AssignedVars[] 487#L19-3 [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 488#L19-1 [132] L19-1-->L18-1: Formula: (= 0 |v_ULTIMATE.start_cstrlcpy_#t~pre0_4|) InVars {ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_4|} OutVars{ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_3|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0] 493#L18-1 [97] L18-1-->L27: Formula: (= 0 v_ULTIMATE.start_cstrlcpy_~n~0_8) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_8} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_8} AuxVars[] AssignedVars[] 491#L27 [177] L27-->L28: Formula: (< 0 v_ULTIMATE.start_cstrlcpy_~siz_3) InVars {ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_3} OutVars{ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_3} AuxVars[] AssignedVars[] 492#L28 [127] L28-->L29-3: Formula: (and (= |v_#memory_int_9| (store |v_#memory_int_10| v_ULTIMATE.start_cstrlcpy_~d~0.base_5 (store (select |v_#memory_int_10| v_ULTIMATE.start_cstrlcpy_~d~0.base_5) v_ULTIMATE.start_cstrlcpy_~d~0.offset_5 0))) (= (select |v_#valid_19| v_ULTIMATE.start_cstrlcpy_~d~0.base_5) 1) (<= 0 v_ULTIMATE.start_cstrlcpy_~d~0.offset_5) (<= (+ v_ULTIMATE.start_cstrlcpy_~d~0.offset_5 1) (select |v_#length_14| v_ULTIMATE.start_cstrlcpy_~d~0.base_5))) InVars {#memory_int=|v_#memory_int_10|, #length=|v_#length_14|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_5, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_5, #valid=|v_#valid_19|} OutVars{#memory_int=|v_#memory_int_9|, #length=|v_#length_14|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_5, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_5, #valid=|v_#valid_19|} AuxVars[] AssignedVars[#memory_int] 483#L29-3 71.51/34.41 [2019-03-28 12:39:44,305 INFO L796 eck$LassoCheckResult]: Loop: 483#L29-3 [94] L29-3-->L29: Formula: (and (= |v_ULTIMATE.start_cstrlcpy_#t~post4.base_1| v_ULTIMATE.start_cstrlcpy_~s~0.base_2) (= |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_1| v_ULTIMATE.start_cstrlcpy_~s~0.offset_2) (= v_ULTIMATE.start_cstrlcpy_~s~0.offset_1 (+ |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_1| 1)) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_1 |v_ULTIMATE.start_cstrlcpy_#t~post4.base_1|)) InVars {ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_2, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_2} OutVars{ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_1, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_1|, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_1, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#t~post4.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post4.base] 484#L29 [105] L29-->L29-1: Formula: (and (= (select (select |v_#memory_int_1| |v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|) |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|) |v_ULTIMATE.start_cstrlcpy_#t~mem5_1|) (= (select |v_#valid_3| |v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|) 1) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|) (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2| 1) (select |v_#length_1| |v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|))) InVars {#memory_int=|v_#memory_int_1|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|, #length=|v_#length_1|, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|, #valid=|v_#valid_3|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_1|, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_2|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_2|, #length=|v_#length_1|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem5] 494#L29-1 [202] L29-1-->L29-3: Formula: (< 0 |v_ULTIMATE.start_cstrlcpy_#t~mem5_5|) InVars {ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_5|} OutVars{ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_6|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_4|, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_5|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post4.offset, ULTIMATE.start_cstrlcpy_#t~post4.base] 483#L29-3 71.51/34.41 [2019-03-28 12:39:44,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:44,306 INFO L82 PathProgramCache]: Analyzing trace with hash 1589285510, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:44,306 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:44,306 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:44,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,307 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:44,321 INFO L82 PathProgramCache]: Analyzing trace with hash 123582, now seen corresponding path program 2 times 71.51/34.41 [2019-03-28 12:39:44,321 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:44,322 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:44,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,322 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,322 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:44,327 INFO L82 PathProgramCache]: Analyzing trace with hash -1314748903, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:44,327 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:44,327 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:44,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,328 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,328 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:44,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:44,850 WARN L188 SmtUtils]: Spent 468.00 ms on a formula simplification. DAG size of input: 123 DAG size of output: 104 71.51/34.41 [2019-03-28 12:39:45,017 WARN L188 SmtUtils]: Spent 166.00 ms on a formula simplification that was a NOOP. DAG size: 94 71.51/34.41 [2019-03-28 12:39:45,019 INFO L216 LassoAnalysis]: Preferences: 71.51/34.41 [2019-03-28 12:39:45,019 INFO L124 ssoRankerPreferences]: Compute integeral hull: false 71.51/34.41 [2019-03-28 12:39:45,019 INFO L125 ssoRankerPreferences]: Enable LassoPartitioneer: true 71.51/34.41 [2019-03-28 12:39:45,019 INFO L126 ssoRankerPreferences]: Term annotations enabled: false 71.51/34.41 [2019-03-28 12:39:45,020 INFO L127 ssoRankerPreferences]: Use exernal solver: false 71.51/34.41 [2019-03-28 12:39:45,020 INFO L128 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 71.51/34.41 [2019-03-28 12:39:45,020 INFO L129 ssoRankerPreferences]: Dump SMT script to file: false 71.51/34.41 [2019-03-28 12:39:45,020 INFO L130 ssoRankerPreferences]: Path of dumped script: 71.51/34.41 [2019-03-28 12:39:45,020 INFO L131 ssoRankerPreferences]: Filename of dumped script: theBenchmark.c_BEv2_Iteration5_Lasso 71.51/34.41 [2019-03-28 12:39:45,020 INFO L132 ssoRankerPreferences]: MapElimAlgo: Frank 71.51/34.41 [2019-03-28 12:39:45,020 INFO L282 LassoAnalysis]: Starting lasso preprocessing... 71.51/34.41 [2019-03-28 12:39:45,023 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,025 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,027 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,028 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,030 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,031 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,033 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,035 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,036 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,038 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,039 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,041 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,042 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,365 WARN L188 SmtUtils]: Spent 216.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 81 71.51/34.41 [2019-03-28 12:39:45,440 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,442 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,443 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,445 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true 71.51/34.41 [2019-03-28 12:39:45,865 INFO L300 LassoAnalysis]: Preprocessing complete. 71.51/34.41 [2019-03-28 12:39:45,866 INFO L497 LassoAnalysis]: Using template 'affine'. 71.51/34.41 [2019-03-28 12:39:45,866 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,867 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,867 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,867 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,867 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,867 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,868 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,868 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,869 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,869 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,869 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,869 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,870 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,870 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,871 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,871 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,872 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,872 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,873 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,873 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,873 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,873 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,873 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,874 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,874 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,874 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,874 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,875 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,875 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,875 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,875 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,875 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,876 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,876 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,876 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,876 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,877 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,877 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,877 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,877 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,877 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,877 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,878 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,878 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,878 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,878 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,879 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,879 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,879 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,879 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,879 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,879 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,880 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,880 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,880 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,880 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,881 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,881 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,882 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,882 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,883 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,883 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,884 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,884 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,884 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,884 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,884 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,885 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,885 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,885 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,885 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,886 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,886 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,886 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,886 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,886 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,887 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,887 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,887 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,887 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,888 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,888 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,888 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,888 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,888 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,888 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,888 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,889 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,889 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,889 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,890 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,890 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,890 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,890 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,890 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,890 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,891 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,891 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,892 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,892 INFO L352 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. 71.51/34.41 [2019-03-28 12:39:45,892 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,892 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,892 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,892 INFO L402 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,892 INFO L403 nArgumentSynthesizer]: A total of 0 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,893 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,893 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,893 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,894 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,894 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,894 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,896 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,896 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,902 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,902 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,903 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,903 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,903 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,903 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,904 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,904 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,905 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,906 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,906 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,907 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,907 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,907 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,908 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,908 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,910 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,911 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,911 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,911 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,911 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,911 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,912 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,912 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,914 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,914 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,914 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,915 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,915 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,915 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,916 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,916 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,917 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,917 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,917 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,918 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,918 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,918 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,919 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,919 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,924 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,924 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,924 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,925 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,925 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,925 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,926 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,926 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,930 INFO L530 LassoAnalysis]: Proving termination failed for this template and these settings. 71.51/34.41 [2019-03-28 12:39:45,930 INFO L122 nArgumentSynthesizer]: Termination Analysis Settings: 71.51/34.41 Termination analysis: LINEAR_WITH_GUESSES 71.51/34.41 Number of strict supporting invariants: 0 71.51/34.41 Number of non-strict supporting invariants: 1 71.51/34.41 Consider only non-deceasing supporting invariants: true 71.51/34.41 Simplify termination arguments: true 71.51/34.41 Simplify supporting invariants: trueOverapproximate stem: false 71.51/34.41 [2019-03-28 12:39:45,930 INFO L339 nArgumentSynthesizer]: Template has degree 0. 71.51/34.41 [2019-03-28 12:39:45,931 INFO L205 nArgumentSynthesizer]: 1 stem disjuncts 71.51/34.41 [2019-03-28 12:39:45,931 INFO L206 nArgumentSynthesizer]: 1 loop disjuncts 71.51/34.41 [2019-03-28 12:39:45,931 INFO L207 nArgumentSynthesizer]: 2 template conjuncts. 71.51/34.41 [2019-03-28 12:39:45,934 INFO L402 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. 71.51/34.41 [2019-03-28 12:39:45,935 INFO L403 nArgumentSynthesizer]: A total of 2 supporting invariants were added. 71.51/34.41 [2019-03-28 12:39:45,953 INFO L421 nArgumentSynthesizer]: Found a termination argument, trying to simplify. 71.51/34.41 [2019-03-28 12:39:45,970 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. 71.51/34.41 [2019-03-28 12:39:45,971 INFO L444 ModelExtractionUtils]: 55 out of 61 variables were initially zero. Simplification set additionally 3 variables to zero. 71.51/34.41 [2019-03-28 12:39:45,971 INFO L437 nArgumentSynthesizer]: Simplifying supporting invariants... 71.51/34.41 [2019-03-28 12:39:45,972 INFO L440 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. 71.51/34.41 [2019-03-28 12:39:45,972 INFO L518 LassoAnalysis]: Proved termination. 71.51/34.41 [2019-03-28 12:39:45,972 INFO L520 LassoAnalysis]: Termination argument consisting of: 71.51/34.41 Ranking function f(v_rep(select #length ULTIMATE.start_main_#t~malloc9.base)_2, ULTIMATE.start_cstrlcpy_~s~0.offset) = 1*v_rep(select #length ULTIMATE.start_main_#t~malloc9.base)_2 - 1*ULTIMATE.start_cstrlcpy_~s~0.offset 71.51/34.41 Supporting invariants [] 71.51/34.41 [2019-03-28 12:39:46,015 INFO L297 tatePredicateManager]: 14 out of 15 supporting invariants were superfluous and have been removed 71.51/34.41 [2019-03-28 12:39:46,017 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.41 [2019-03-28 12:39:46,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:46,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:46,064 INFO L256 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 10 conjunts are in the unsatisfiable core 71.51/34.41 [2019-03-28 12:39:46,064 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.51/34.41 [2019-03-28 12:39:46,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:46,084 WARN L254 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 11 conjunts are in the unsatisfiable core 71.51/34.41 [2019-03-28 12:39:46,084 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.51/34.41 [2019-03-28 12:39:46,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.51/34.41 [2019-03-28 12:39:46,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.41 [2019-03-28 12:39:46,314 WARN L254 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 11 conjunts are in the unsatisfiable core 71.51/34.41 [2019-03-28 12:39:46,314 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.51/34.41 [2019-03-28 12:39:46,315 INFO L98 LoopCannibalizer]: 8 predicates before loop cannibalization 8 predicates after loop cannibalization 71.51/34.41 [2019-03-28 12:39:46,316 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.3 stem predicates 8 loop predicates 71.51/34.41 [2019-03-28 12:39:46,316 INFO L69 BuchiDifferenceNCSB]: Start buchiDifferenceNCSB. First operand 30 states and 47 transitions. cyclomatic complexity: 20 Second operand 6 states. 71.51/34.41 [2019-03-28 12:39:46,559 INFO L73 BuchiDifferenceNCSB]: Finished buchiDifferenceNCSB. First operand 30 states and 47 transitions. cyclomatic complexity: 20. Second operand 6 states. Result 34 states and 52 transitions. Complement of second has 9 states. 71.51/34.41 [2019-03-28 12:39:46,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 7 states 3 stem states 2 non-accepting loop states 2 accepting loop states 71.51/34.41 [2019-03-28 12:39:46,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. 71.51/34.41 [2019-03-28 12:39:46,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 35 transitions. 71.51/34.41 [2019-03-28 12:39:46,560 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 35 transitions. Stem has 12 letters. Loop has 3 letters. 71.51/34.41 [2019-03-28 12:39:46,560 INFO L116 BuchiAccepts]: Finished buchiAccepts. 71.51/34.41 [2019-03-28 12:39:46,560 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 35 transitions. Stem has 15 letters. Loop has 3 letters. 71.51/34.41 [2019-03-28 12:39:46,561 INFO L116 BuchiAccepts]: Finished buchiAccepts. 71.51/34.41 [2019-03-28 12:39:46,561 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 35 transitions. Stem has 12 letters. Loop has 6 letters. 71.51/34.41 [2019-03-28 12:39:46,561 INFO L116 BuchiAccepts]: Finished buchiAccepts. 71.51/34.41 [2019-03-28 12:39:46,564 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 52 transitions. 71.51/34.41 [2019-03-28 12:39:46,565 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 71.51/34.41 [2019-03-28 12:39:46,566 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 24 states and 35 transitions. 71.51/34.41 [2019-03-28 12:39:46,566 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 71.51/34.41 [2019-03-28 12:39:46,566 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 71.51/34.41 [2019-03-28 12:39:46,566 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 35 transitions. 71.51/34.41 [2019-03-28 12:39:46,567 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. 71.51/34.41 [2019-03-28 12:39:46,567 INFO L706 BuchiCegarLoop]: Abstraction has 24 states and 35 transitions. 71.51/34.41 [2019-03-28 12:39:46,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 35 transitions. 71.51/34.41 [2019-03-28 12:39:46,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 20. 71.51/34.41 [2019-03-28 12:39:46,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. 71.51/34.41 [2019-03-28 12:39:46,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 29 transitions. 71.51/34.41 [2019-03-28 12:39:46,568 INFO L729 BuchiCegarLoop]: Abstraction has 20 states and 29 transitions. 71.51/34.41 [2019-03-28 12:39:46,568 INFO L609 BuchiCegarLoop]: Abstraction has 20 states and 29 transitions. 71.51/34.41 [2019-03-28 12:39:46,568 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ 71.51/34.41 [2019-03-28 12:39:46,568 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 29 transitions. 71.51/34.41 [2019-03-28 12:39:46,569 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 71.51/34.41 [2019-03-28 12:39:46,569 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false 71.51/34.41 [2019-03-28 12:39:46,569 INFO L119 BuchiIsEmpty]: Starting construction of run 71.51/34.41 [2019-03-28 12:39:46,569 INFO L867 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:46,569 INFO L868 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] 71.51/34.41 [2019-03-28 12:39:46,570 INFO L794 eck$LassoCheckResult]: Stem: 714#ULTIMATE.startENTRY [206] ULTIMATE.startENTRY-->L39: Formula: (and (= (store |v_#valid_22| 0 0) |v_#valid_21|) (= |v_#NULL.offset_2| 0) (= 0 |v_#NULL.base_2|)) InVars {#valid=|v_#valid_22|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_5|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_5|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_11, #NULL.offset=|v_#NULL.offset_2|, ULTIMATE.start_main_#t~nondet6=|v_ULTIMATE.start_main_#t~nondet6_6|, ULTIMATE.start_main_#t~nondet7=|v_ULTIMATE.start_main_#t~nondet7_6|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_7, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_6, #NULL.base=|v_#NULL.base_2|, ULTIMATE.start_main_#t~ret10=|v_ULTIMATE.start_main_#t~ret10_4|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_4|, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_5|, #valid=|v_#valid_21|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_6, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~n~1, #NULL.offset, ULTIMATE.start_main_#t~nondet6, ULTIMATE.start_main_#t~nondet7, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_~nondetString2~0.offset, #NULL.base, ULTIMATE.start_main_#t~ret10, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#res, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~length~0] 715#L39 [137] L39-->L39-2: Formula: (>= v_ULTIMATE.start_main_~length~0_6 1) InVars {ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} OutVars{ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_6} AuxVars[] AssignedVars[] 708#L39-2 [138] L39-2-->L42-1: Formula: (>= v_ULTIMATE.start_main_~n~1_6 1) InVars {ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} OutVars{ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_6} AuxVars[] AssignedVars[] 709#L42-1 [163] L42-1-->L47: Formula: (let ((.cse0 (store |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2| 1))) (and (= |v_ULTIMATE.start_main_#t~malloc9.offset_2| 0) (= v_ULTIMATE.start_main_~nondetString1~0.base_2 |v_ULTIMATE.start_main_#t~malloc8.base_2|) (< 0 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (= v_ULTIMATE.start_main_~nondetString2~0.base_2 |v_ULTIMATE.start_main_#t~malloc9.base_2|) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| |v_#StackHeapBarrier_1|) (= |v_ULTIMATE.start_main_#t~malloc8.offset_2| 0) (< |v_ULTIMATE.start_main_#t~malloc8.base_2| 0) (= (store (store |v_#length_5| |v_ULTIMATE.start_main_#t~malloc8.base_2| v_ULTIMATE.start_main_~n~1_7) |v_ULTIMATE.start_main_#t~malloc9.base_2| v_ULTIMATE.start_main_~length~0_7) |v_#length_3|) (= v_ULTIMATE.start_main_~nondetString2~0.offset_2 |v_ULTIMATE.start_main_#t~malloc9.offset_2|) (= v_ULTIMATE.start_main_~nondetString1~0.offset_2 |v_ULTIMATE.start_main_#t~malloc8.offset_2|) (= 0 (select |v_#valid_7| |v_ULTIMATE.start_main_#t~malloc8.base_2|)) (= 0 (select .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2|)) (= (store .cse0 |v_ULTIMATE.start_main_#t~malloc9.base_2| 1) |v_#valid_5|) (< |v_ULTIMATE.start_main_#t~malloc9.base_2| |v_#StackHeapBarrier_1|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_5|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_#t~malloc8.base=|v_ULTIMATE.start_main_#t~malloc8.base_2|, ULTIMATE.start_main_#t~malloc9.base=|v_ULTIMATE.start_main_#t~malloc9.base_2|, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_7, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_2, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_2, #StackHeapBarrier=|v_#StackHeapBarrier_1|, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_2, ULTIMATE.start_main_#t~malloc8.offset=|v_ULTIMATE.start_main_#t~malloc8.offset_2|, #valid=|v_#valid_5|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_2, #length=|v_#length_3|, ULTIMATE.start_main_#t~malloc9.offset=|v_ULTIMATE.start_main_#t~malloc9.offset_2|, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~malloc8.base, ULTIMATE.start_main_#t~malloc9.base, ULTIMATE.start_main_~nondetString1~0.base, ULTIMATE.start_main_#t~malloc8.offset, #valid, ULTIMATE.start_main_~nondetString1~0.offset, #length, ULTIMATE.start_main_~nondetString2~0.base, ULTIMATE.start_main_#t~malloc9.offset, ULTIMATE.start_main_~nondetString2~0.offset] 706#L47 [90] L47-->L47-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3))) (and (<= .cse0 (select |v_#length_6| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (= (store |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3 (store (select |v_#memory_int_3| v_ULTIMATE.start_main_~nondetString1~0.base_3) (+ v_ULTIMATE.start_main_~n~1_8 v_ULTIMATE.start_main_~nondetString1~0.offset_3 (- 1)) 0)) |v_#memory_int_2|) (= 1 (select |v_#valid_8| v_ULTIMATE.start_main_~nondetString1~0.base_3)) (<= 1 .cse0))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} OutVars{ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_3, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_8, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_3, #length=|v_#length_6|} AuxVars[] AssignedVars[#memory_int] 707#L47-1 [207] L47-1-->L18: Formula: (let ((.cse0 (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7))) (and (= v_ULTIMATE.start_cstrlcpy_~dst.offset_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (<= .cse0 (select |v_#length_16| v_ULTIMATE.start_main_~nondetString2~0.base_8)) (= (store |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8 (store (select |v_#memory_int_12| v_ULTIMATE.start_main_~nondetString2~0.base_8) (+ v_ULTIMATE.start_main_~length~0_11 v_ULTIMATE.start_main_~nondetString2~0.offset_7 (- 1)) 0)) |v_#memory_int_11|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_7 v_ULTIMATE.start_cstrlcpy_~dst.offset_3) (<= 1 .cse0) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_9 v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_main_~nondetString1~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_main_~nondetString2~0.base_8) (= v_ULTIMATE.start_main_~nondetString1~0.base_8 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 v_ULTIMATE.start_cstrlcpy_~s~0.offset_8) (= (select |v_#valid_23| v_ULTIMATE.start_main_~nondetString2~0.base_8) 1) (= v_ULTIMATE.start_main_~nondetString2~0.offset_7 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= v_ULTIMATE.start_cstrlcpy_~src.offset_4 |v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_main_~n~1_12) (= |v_ULTIMATE.start_cstrlcpy_#in~src.base_2| v_ULTIMATE.start_cstrlcpy_~src.base_5) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 v_ULTIMATE.start_cstrlcpy_~d~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~dst.base_3 |v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#in~siz_2| v_ULTIMATE.start_cstrlcpy_~siz_5) (= v_ULTIMATE.start_cstrlcpy_~n~0_9 v_ULTIMATE.start_cstrlcpy_~siz_5))) InVars {ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_12|, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, #length=|v_#length_16|, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_8|, ULTIMATE.start_cstrlcpy_#t~mem5=|v_ULTIMATE.start_cstrlcpy_#t~mem5_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_8|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_7|, ULTIMATE.start_cstrlcpy_#t~post4.base=|v_ULTIMATE.start_cstrlcpy_#t~post4.base_8|, ULTIMATE.start_cstrlcpy_~src.offset=v_ULTIMATE.start_cstrlcpy_~src.offset_4, ULTIMATE.start_cstrlcpy_~src.base=v_ULTIMATE.start_cstrlcpy_~src.base_5, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_8, ULTIMATE.start_main_~nondetString1~0.base=v_ULTIMATE.start_main_~nondetString1~0.base_8, #length=|v_#length_16|, ULTIMATE.start_cstrlcpy_#in~dst.offset=|v_ULTIMATE.start_cstrlcpy_#in~dst.offset_2|, ULTIMATE.start_cstrlcpy_#in~dst.base=|v_ULTIMATE.start_cstrlcpy_#in~dst.base_2|, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_7|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_7, ULTIMATE.start_main_~n~1=v_ULTIMATE.start_main_~n~1_12, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_9, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_7|, ULTIMATE.start_cstrlcpy_#res=|v_ULTIMATE.start_cstrlcpy_#res_4|, ULTIMATE.start_cstrlcpy_~dst.offset=v_ULTIMATE.start_cstrlcpy_~dst.offset_3, ULTIMATE.start_cstrlcpy_~siz=v_ULTIMATE.start_cstrlcpy_~siz_5, ULTIMATE.start_main_~nondetString2~0.base=v_ULTIMATE.start_main_~nondetString2~0.base_8, ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_9, ULTIMATE.start_main_~nondetString2~0.offset=v_ULTIMATE.start_main_~nondetString2~0.offset_7, ULTIMATE.start_cstrlcpy_#in~src.base=|v_ULTIMATE.start_cstrlcpy_#in~src.base_2|, ULTIMATE.start_cstrlcpy_#in~siz=|v_ULTIMATE.start_cstrlcpy_#in~siz_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_8, ULTIMATE.start_cstrlcpy_#t~post4.offset=|v_ULTIMATE.start_cstrlcpy_#t~post4.offset_7|, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_cstrlcpy_~dst.base=v_ULTIMATE.start_cstrlcpy_~dst.base_3, ULTIMATE.start_main_~nondetString1~0.offset=v_ULTIMATE.start_main_~nondetString1~0.offset_7, ULTIMATE.start_main_~length~0=v_ULTIMATE.start_main_~length~0_11, ULTIMATE.start_cstrlcpy_#in~src.offset=|v_ULTIMATE.start_cstrlcpy_#in~src.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~mem5, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post4.base, ULTIMATE.start_cstrlcpy_~src.offset, ULTIMATE.start_cstrlcpy_~src.base, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#in~dst.offset, ULTIMATE.start_cstrlcpy_#in~dst.base, ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset, ULTIMATE.start_cstrlcpy_#res, ULTIMATE.start_cstrlcpy_~dst.offset, ULTIMATE.start_cstrlcpy_~siz, ULTIMATE.start_cstrlcpy_~n~0, ULTIMATE.start_cstrlcpy_#in~src.base, ULTIMATE.start_cstrlcpy_#in~siz, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post4.offset, #memory_int, ULTIMATE.start_cstrlcpy_~dst.base, ULTIMATE.start_cstrlcpy_#in~src.offset] 722#L18 [173] L18-->L19-3: Formula: (< 0 v_ULTIMATE.start_cstrlcpy_~n~0_4) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_4} AuxVars[] AssignedVars[] 710#L19-3 [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 711#L19-1 [184] L19-1-->L20: Formula: (and (= v_ULTIMATE.start_cstrlcpy_~d~0.base_3 |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| v_ULTIMATE.start_cstrlcpy_~s~0.offset_7) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2| v_ULTIMATE.start_cstrlcpy_~d~0.base_4) (= v_ULTIMATE.start_cstrlcpy_~s~0.offset_6 (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| 1)) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_3 (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| 1)) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2| v_ULTIMATE.start_cstrlcpy_~s~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_7 |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| v_ULTIMATE.start_cstrlcpy_~d~0.offset_4) (< 0 |v_ULTIMATE.start_cstrlcpy_#t~pre0_6|)) InVars {ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_8, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_6|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_4, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_7, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_4} OutVars{ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_5|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_3, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_6, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_3, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2|, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_7, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset] 721#L20 [112] L20-->L20-1: Formula: (and (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3| 1) (select |v_#length_10| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (= (select (select |v_#memory_int_6| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|) |v_ULTIMATE.start_cstrlcpy_#t~mem3_2|) (= 1 (select |v_#valid_15| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|)) InVars {#memory_int=|v_#memory_int_6|, #length=|v_#length_10|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_2|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3] 723#L20-1 71.51/34.41 [2019-03-28 12:39:46,570 INFO L796 eck$LassoCheckResult]: Loop: 723#L20-1 [108] L20-1-->L20-2: Formula: (and (= 1 (select |v_#valid_17| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|) (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| 1) (select |v_#length_12| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3| (store (select |v_#memory_int_8| |v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3| |v_ULTIMATE.start_cstrlcpy_#t~mem3_3|)))) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_8|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_3|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_3|, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_3|, #length=|v_#length_12|} AuxVars[] AssignedVars[#memory_int] 716#L20-2 [204] L20-2-->L19-3: Formula: (> 0 |v_ULTIMATE.start_cstrlcpy_#t~mem3_7|) InVars {ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_7|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_6|, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_6|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_7|, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_7|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_6|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_#t~post1.offset] 717#L19-3 [126] L19-3-->L19-1: Formula: (let ((.cse0 (+ v_ULTIMATE.start_cstrlcpy_~n~0_6 (- 1)))) (and (= v_ULTIMATE.start_cstrlcpy_~n~0_5 .cse0) (= |v_ULTIMATE.start_cstrlcpy_#t~pre0_2| .cse0))) InVars {ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_6} OutVars{ULTIMATE.start_cstrlcpy_~n~0=v_ULTIMATE.start_cstrlcpy_~n~0_5, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~n~0] 719#L19-1 [185] L19-1-->L20: Formula: (and (= v_ULTIMATE.start_cstrlcpy_~d~0.base_3 |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| v_ULTIMATE.start_cstrlcpy_~s~0.offset_7) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.base_2| v_ULTIMATE.start_cstrlcpy_~d~0.base_4) (= v_ULTIMATE.start_cstrlcpy_~s~0.offset_6 (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2| 1)) (> 0 |v_ULTIMATE.start_cstrlcpy_#t~pre0_6|) (= v_ULTIMATE.start_cstrlcpy_~d~0.offset_3 (+ |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| 1)) (= |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2| v_ULTIMATE.start_cstrlcpy_~s~0.base_8) (= v_ULTIMATE.start_cstrlcpy_~s~0.base_7 |v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|) (= |v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2| v_ULTIMATE.start_cstrlcpy_~d~0.offset_4)) InVars {ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_8, ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_6|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_4, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_7, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_4} OutVars{ULTIMATE.start_cstrlcpy_#t~pre0=|v_ULTIMATE.start_cstrlcpy_#t~pre0_5|, ULTIMATE.start_cstrlcpy_~d~0.offset=v_ULTIMATE.start_cstrlcpy_~d~0.offset_3, ULTIMATE.start_cstrlcpy_~s~0.offset=v_ULTIMATE.start_cstrlcpy_~s~0.offset_6, ULTIMATE.start_cstrlcpy_#t~post1.base=|v_ULTIMATE.start_cstrlcpy_#t~post1.base_2|, ULTIMATE.start_cstrlcpy_~d~0.base=v_ULTIMATE.start_cstrlcpy_~d~0.base_3, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_2|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_2|, ULTIMATE.start_cstrlcpy_~s~0.base=v_ULTIMATE.start_cstrlcpy_~s~0.base_7, ULTIMATE.start_cstrlcpy_#t~post1.offset=|v_ULTIMATE.start_cstrlcpy_#t~post1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~pre0, ULTIMATE.start_cstrlcpy_~d~0.offset, ULTIMATE.start_cstrlcpy_~s~0.offset, ULTIMATE.start_cstrlcpy_#t~post1.base, ULTIMATE.start_cstrlcpy_~d~0.base, ULTIMATE.start_cstrlcpy_#t~post2.base, ULTIMATE.start_cstrlcpy_#t~post2.offset, ULTIMATE.start_cstrlcpy_~s~0.base, ULTIMATE.start_cstrlcpy_#t~post1.offset] 720#L20 [112] L20-->L20-1: Formula: (and (<= (+ |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3| 1) (select |v_#length_10| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (= (select (select |v_#memory_int_6| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|) |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|) |v_ULTIMATE.start_cstrlcpy_#t~mem3_2|) (= 1 (select |v_#valid_15| |v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|)) (<= 0 |v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|)) InVars {#memory_int=|v_#memory_int_6|, #length=|v_#length_10|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|} OutVars{ULTIMATE.start_cstrlcpy_#t~mem3=|v_ULTIMATE.start_cstrlcpy_#t~mem3_2|, ULTIMATE.start_cstrlcpy_#t~post2.base=|v_ULTIMATE.start_cstrlcpy_#t~post2.base_3|, ULTIMATE.start_cstrlcpy_#t~post2.offset=|v_ULTIMATE.start_cstrlcpy_#t~post2.offset_3|, #valid=|v_#valid_15|, #memory_int=|v_#memory_int_6|, #length=|v_#length_10|} AuxVars[] AssignedVars[ULTIMATE.start_cstrlcpy_#t~mem3] 723#L20-1 71.51/34.41 [2019-03-28 12:39:46,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:46,571 INFO L82 PathProgramCache]: Analyzing trace with hash -740243213, now seen corresponding path program 1 times 71.51/34.41 [2019-03-28 12:39:46,571 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:46,571 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:46,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:46,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:46,572 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:46,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:46,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.41 [2019-03-28 12:39:46,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.41 [2019-03-28 12:39:46,584 INFO L82 PathProgramCache]: Analyzing trace with hash 134573716, now seen corresponding path program 2 times 71.51/34.41 [2019-03-28 12:39:46,584 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.41 [2019-03-28 12:39:46,584 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.41 [2019-03-28 12:39:46,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.41 [2019-03-28 12:39:46,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.42 [2019-03-28 12:39:46,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.42 [2019-03-28 12:39:46,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.42 [2019-03-28 12:39:46,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat 71.51/34.42 [2019-03-28 12:39:46,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier 71.51/34.42 [2019-03-28 12:39:46,590 INFO L82 PathProgramCache]: Analyzing trace with hash -2041156382, now seen corresponding path program 1 times 71.51/34.42 [2019-03-28 12:39:46,590 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS 71.51/34.42 [2019-03-28 12:39:46,590 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy 71.51/34.42 [2019-03-28 12:39:46,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.42 [2019-03-28 12:39:46,591 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY 71.51/34.42 [2019-03-28 12:39:46,591 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY 71.51/34.42 [2019-03-28 12:39:46,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.42 [2019-03-28 12:39:46,614 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.51/34.42 [2019-03-28 12:39:46,614 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. 71.51/34.42 [2019-03-28 12:39:46,614 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP 71.51/34.42 No working directory specified, using /export/starexec/sandbox/solver/bin/z3 71.51/34.42 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) 71.51/34.42 Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 71.51/34.42 [2019-03-28 12:39:46,628 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY 71.51/34.42 [2019-03-28 12:39:46,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat 71.51/34.42 [2019-03-28 12:39:46,656 INFO L256 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 5 conjunts are in the unsatisfiable core 71.51/34.42 [2019-03-28 12:39:46,656 INFO L279 TraceCheckSpWp]: Computing forward predicates... 71.51/34.42 [2019-03-28 12:39:46,658 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. 71.51/34.42 [2019-03-28 12:39:46,686 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. 71.51/34.42 [2019-03-28 12:39:46,687 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 71.51/34.42 [2019-03-28 12:39:46,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. 71.51/34.42 [2019-03-28 12:39:46,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 71.51/34.42 [2019-03-28 12:39:46,851 INFO L87 Difference]: Start difference. First operand 20 states and 29 transitions. cyclomatic complexity: 11 Second operand 5 states. 71.51/34.42 [2019-03-28 12:39:46,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. 71.51/34.42 [2019-03-28 12:39:46,895 INFO L93 Difference]: Finished difference Result 18 states and 25 transitions. 71.51/34.42 [2019-03-28 12:39:46,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 71.51/34.42 [2019-03-28 12:39:46,899 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 25 transitions. 71.51/34.42 [2019-03-28 12:39:46,900 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 71.51/34.42 [2019-03-28 12:39:46,900 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 0 states and 0 transitions. 71.51/34.42 [2019-03-28 12:39:46,900 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 71.51/34.42 [2019-03-28 12:39:46,900 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 71.51/34.42 [2019-03-28 12:39:46,902 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. 71.51/34.42 [2019-03-28 12:39:46,902 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. 71.51/34.42 [2019-03-28 12:39:46,902 INFO L706 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 71.51/34.42 [2019-03-28 12:39:46,902 INFO L729 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 71.51/34.42 [2019-03-28 12:39:46,902 INFO L609 BuchiCegarLoop]: Abstraction has 0 states and 0 transitions. 71.51/34.42 [2019-03-28 12:39:46,903 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ 71.51/34.42 [2019-03-28 12:39:46,903 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. 71.51/34.42 [2019-03-28 12:39:46,903 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 71.51/34.42 [2019-03-28 12:39:46,903 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true 71.51/34.42 [2019-03-28 12:39:46,910 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.03 12:39:46 BasicIcfg 71.51/34.42 [2019-03-28 12:39:46,910 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- 71.51/34.42 [2019-03-28 12:39:46,911 INFO L168 Benchmark]: Toolchain (without parser) took 29884.07 ms. Allocated memory was 649.6 MB in the beginning and 1.1 GB in the end (delta: 424.1 MB). Free memory was 564.6 MB in the beginning and 1.0 GB in the end (delta: -456.6 MB). There was no memory consumed. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,911 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 649.6 MB. Free memory is still 585.4 MB. There was no memory consumed. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,911 INFO L168 Benchmark]: CACSL2BoogieTranslator took 321.21 ms. Allocated memory was 649.6 MB in the beginning and 672.7 MB in the end (delta: 23.1 MB). Free memory was 564.6 MB in the beginning and 637.6 MB in the end (delta: -73.0 MB). Peak memory consumption was 30.3 MB. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,912 INFO L168 Benchmark]: Boogie Procedure Inliner took 44.15 ms. Allocated memory is still 672.7 MB. Free memory was 637.6 MB in the beginning and 635.4 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,912 INFO L168 Benchmark]: Boogie Preprocessor took 29.33 ms. Allocated memory is still 672.7 MB. Free memory was 635.4 MB in the beginning and 633.2 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,913 INFO L168 Benchmark]: RCFGBuilder took 360.61 ms. Allocated memory is still 672.7 MB. Free memory was 633.2 MB in the beginning and 608.9 MB in the end (delta: 24.3 MB). Peak memory consumption was 24.3 MB. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,913 INFO L168 Benchmark]: BlockEncodingV2 took 128.78 ms. Allocated memory is still 672.7 MB. Free memory was 608.9 MB in the beginning and 600.3 MB in the end (delta: 8.6 MB). Peak memory consumption was 8.6 MB. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,913 INFO L168 Benchmark]: TraceAbstraction took 23384.28 ms. Allocated memory was 672.7 MB in the beginning and 1.0 GB in the end (delta: 343.9 MB). Free memory was 599.2 MB in the beginning and 869.7 MB in the end (delta: -270.5 MB). Peak memory consumption was 525.9 MB. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,914 INFO L168 Benchmark]: BuchiAutomizer took 5610.11 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 57.1 MB). Free memory was 869.7 MB in the beginning and 1.0 GB in the end (delta: -151.6 MB). There was no memory consumed. Max. memory is 50.3 GB. 71.51/34.42 [2019-03-28 12:39:46,917 INFO L337 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### 71.51/34.42 --- Results --- 71.51/34.42 * Results from de.uni_freiburg.informatik.ultimate.plugins.blockencoding: 71.51/34.42 - StatisticsResult: Initial Icfg 71.51/34.42 38 locations, 47 edges 71.51/34.42 - StatisticsResult: Encoded RCFG 71.51/34.42 32 locations, 61 edges 71.51/34.42 * Results from de.uni_freiburg.informatik.ultimate.core: 71.51/34.42 - StatisticsResult: Toolchain Benchmarks 71.51/34.42 Benchmark results are: 71.51/34.42 * CDTParser took 0.20 ms. Allocated memory is still 649.6 MB. Free memory is still 585.4 MB. There was no memory consumed. Max. memory is 50.3 GB. 71.51/34.42 * CACSL2BoogieTranslator took 321.21 ms. Allocated memory was 649.6 MB in the beginning and 672.7 MB in the end (delta: 23.1 MB). Free memory was 564.6 MB in the beginning and 637.6 MB in the end (delta: -73.0 MB). Peak memory consumption was 30.3 MB. Max. memory is 50.3 GB. 71.51/34.42 * Boogie Procedure Inliner took 44.15 ms. Allocated memory is still 672.7 MB. Free memory was 637.6 MB in the beginning and 635.4 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 50.3 GB. 71.51/34.42 * Boogie Preprocessor took 29.33 ms. Allocated memory is still 672.7 MB. Free memory was 635.4 MB in the beginning and 633.2 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 50.3 GB. 71.51/34.42 * RCFGBuilder took 360.61 ms. Allocated memory is still 672.7 MB. Free memory was 633.2 MB in the beginning and 608.9 MB in the end (delta: 24.3 MB). Peak memory consumption was 24.3 MB. Max. memory is 50.3 GB. 71.51/34.42 * BlockEncodingV2 took 128.78 ms. Allocated memory is still 672.7 MB. Free memory was 608.9 MB in the beginning and 600.3 MB in the end (delta: 8.6 MB). Peak memory consumption was 8.6 MB. Max. memory is 50.3 GB. 71.51/34.42 * TraceAbstraction took 23384.28 ms. Allocated memory was 672.7 MB in the beginning and 1.0 GB in the end (delta: 343.9 MB). Free memory was 599.2 MB in the beginning and 869.7 MB in the end (delta: -270.5 MB). Peak memory consumption was 525.9 MB. Max. memory is 50.3 GB. 71.51/34.42 * BuchiAutomizer took 5610.11 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 57.1 MB). Free memory was 869.7 MB in the beginning and 1.0 GB in the end (delta: -151.6 MB). There was no memory consumed. Max. memory is 50.3 GB. 71.51/34.42 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #memory_int 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 - GenericResult: Unfinished Backtranslation 71.51/34.42 unknown boogie variable #length 71.51/34.42 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: 71.51/34.42 - PositiveResult [Line: 33]: pointer arithmetic is always legal 71.51/34.42 For all program executions holds that pointer arithmetic is always legal at this location 71.51/34.42 - PositiveResult [Line: 28]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 28]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 29]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 20]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 20]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 48]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 20]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 20]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 47]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 29]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 47]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - PositiveResult [Line: 48]: pointer dereference always succeeds 71.51/34.42 For all program executions holds that pointer dereference always succeeds at this location 71.51/34.42 - AllSpecificationsHoldResult: All specifications hold 71.51/34.42 13 specifications checked. All of them hold 71.51/34.42 - InvariantResult [Line: 19]: Loop Invariant 71.51/34.42 [2019-03-28 12:39:46,924 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,924 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,925 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,925 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,926 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,926 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,928 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,928 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,928 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,929 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,929 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,929 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,930 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,930 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,930 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,930 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,930 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,931 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,931 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,931 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,931 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,932 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,932 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,932 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,932 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,933 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,934 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,934 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,934 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,935 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,935 WARN L416 cessorBacktranslator]: Identifier is quantified, using identity as back-translation of IdentifierExpression[ULTIMATE.start_main_~nondetString2~0.offset,QUANTIFIED] 71.51/34.42 [2019-03-28 12:39:46,936 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,937 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,937 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,937 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,937 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,938 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,938 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,938 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,938 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,938 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,939 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,939 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,939 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,939 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,940 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,940 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,940 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 [2019-03-28 12:39:46,940 WARN L1298 BoogieBacktranslator]: unknown boogie variable #memory_int 71.51/34.42 [2019-03-28 12:39:46,941 WARN L1298 BoogieBacktranslator]: unknown boogie variable #length 71.51/34.42 Derived loop invariant: (((((((((nondetString2 + length == 1 && (\exists ULTIMATE.start_main_~nondetString2~0.offset : int :: (unknown-#memory_int-unknown[s][ULTIMATE.start_main_~nondetString2~0.offset + unknown-#length-unknown[s] + -1] == 0 && ULTIMATE.start_main_~nondetString2~0.offset <= 0) && s <= ULTIMATE.start_main_~nondetString2~0.offset)) && (((((((((((s <= src && unknown-#length-unknown[nondetString1] == n) && 0 == d) && 1 <= unknown-#length-unknown[s]) && 1 <= n) && src <= s) && n == unknown-#length-unknown[d]) && 1 == \valid[s]) && \valid[d] == 1) && 1 == \valid[nondetString1]) && n == siz) && unknown-#memory_int-unknown[s][s] == 0) && 1 == \valid[nondetString2]) && nondetString1 == 0) && !(nondetString1 == nondetString2)) && nondetString2 == 0) && s == 0) && unknown-#length-unknown[nondetString2] == length) && 1 <= n) || (((((0 == d && nondetString1 == 0) && nondetString2 == 0) && s == 0) && unknown-#length-unknown[nondetString2] == length) && ((((((((((((((s <= src && 1 <= length) && unknown-#length-unknown[nondetString1] == n) && 1 <= unknown-#length-unknown[s]) && 1 <= n) && src <= s) && !(nondetString1 == nondetString2)) && unknown-#length-unknown[d] == n) && (\exists ULTIMATE.start_main_~nondetString2~0.offset : int :: (unknown-#memory_int-unknown[s][ULTIMATE.start_main_~nondetString2~0.offset + unknown-#length-unknown[s] + -1] == 0 && ULTIMATE.start_main_~nondetString2~0.offset <= 0) && s <= ULTIMATE.start_main_~nondetString2~0.offset)) && 1 == \valid[s]) && \valid[d] == 1) && 1 == \valid[nondetString1]) && n == siz) && !(d == s)) && 1 == \valid[nondetString2]) && 1 <= n)) || (((((s + 1 <= unknown-#length-unknown[s] && ((((((((((((((s <= src && unknown-#length-unknown[nondetString1] == n) && 1 <= n) && src <= s) && 1 <= d) && 1 <= siz) && 1 == \valid[s]) && \valid[d] == 1) && 1 == \valid[nondetString1]) && 1 <= length) && nondetString1 == 0) && nondetString2 == 0) && unknown-#length-unknown[nondetString2] == length) && d + n <= unknown-#length-unknown[d]) && 1 == \valid[nondetString2]) && 1 <= n) && unknown-#memory_int-unknown[s][unknown-#length-unknown[s] + -1] == 0) && !(nondetString1 == nondetString2)) && !(d == s)) && 1 <= s) 71.51/34.42 - StatisticsResult: Ultimate Automizer benchmark data 71.51/34.42 CFG has 1 procedures, 32 locations, 13 error locations. SAFE Result, 23.2s OverallTime, 43 OverallIterations, 4 TraceHistogramMax, 13.2s AutomataDifference, 0.0s DeadEndRemovalTime, 1.3s HoareAnnotationTime, HoareTripleCheckerStatistics: 421 SDtfs, 2788 SDslu, 2716 SDs, 0 SdLazy, 5763 SolverSat, 938 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 774 GetRequests, 312 SyntacticMatches, 1 SemanticMatches, 461 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1781 ImplicationChecksByTransitivity, 11.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=62occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 43 MinimizatonAttempts, 192 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: 0.0s HoareAnnotationTime, 1 LocationsWithAnnotation, 1 PreInvPairs, 10 NumberOfFragments, 301 HoareAnnotationTreeSize, 1 FomulaSimplifications, 8384 FormulaSimplificationTreeSizeReduction, 0.1s HoareSimplificationTime, 1 FomulaSimplificationsInter, 1932 FormulaSimplificationTreeSizeReductionInter, 1.1s HoareSimplificationTimeInter, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 6.4s InterpolantComputationTime, 949 NumberOfCodeBlocks, 949 NumberOfCodeBlocksAsserted, 63 NumberOfCheckSat, 889 ConstructedInterpolants, 22 QuantifiedInterpolants, 165805 SizeOfPredicates, 236 NumberOfNonLiveVariables, 2404 ConjunctsInSsa, 537 ConjunctsInUnsatCore, 60 InterpolantComputations, 27 PerfectInterpolantSequences, 42/245 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available 71.51/34.42 - StatisticsResult: Constructed decomposition of program 71.51/34.42 Your program was decomposed into 6 terminating modules (4 trivial, 0 deterministic, 2 nondeterministic). One nondeterministic module has affine ranking function n and consists of 5 locations. One nondeterministic module has affine ranking function unknown-#length-unknown[alloca(length * sizeof(char))] + -1 * s and consists of 7 locations. 4 modules have a trivial ranking function, the largest among these consists of 5 locations. 71.51/34.42 - StatisticsResult: Timing statistics 71.51/34.42 BüchiAutomizer plugin needed 5.5s and 7 iterations. TraceHistogramMax:1. Analysis of lassos took 4.3s. Construction of modules took 0.3s. Büchi inclusion checks took 0.7s. Highest rank in rank-based complementation 3. Minimization of det autom 1. Minimization of nondet autom 5. Automata minimization 0.0s AutomataMinimizationTime, 5 MinimizatonAttempts, 19 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 34 states and ocurred in iteration 1. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 85 SDtfs, 242 SDslu, 330 SDs, 0 SdLazy, 457 SolverSat, 37 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.3s Time LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU2 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital242 mio100 ax100 hnf100 lsp97 ukn81 mio100 lsp53 div100 bol100 ite100 ukn100 eq203 hnf89 smp100 dnf100 smp100 tf100 neg100 sie101 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 6ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s 71.51/34.42 - TerminationAnalysisResult: Termination proven 71.51/34.42 Buchi Automizer proved that your program is terminating 71.51/34.42 RESULT: Ultimate proved your program to be correct! 71.51/34.42 !SESSION 2019-03-28 12:39:13.617 ----------------------------------------------- 71.51/34.42 eclipse.buildId=unknown 71.51/34.42 java.version=1.8.0_181 71.51/34.42 java.vendor=Oracle Corporation 71.51/34.42 BootLoader constants: OS=linux, ARCH=x86_64, WS=gtk, NL=en_US 71.51/34.42 Framework arguments: -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -i /export/starexec/sandbox/benchmark/theBenchmark.c 71.51/34.42 Command-line arguments: -os linux -ws gtk -arch x86_64 -consoleLog -data @user.home/.ultimate -tc ./../AutomizerAndBuchiAutomizerCInlineWithBlockEncoding.xml -s ./../termcomp2017.epf -data /export/starexec/sandbox/tmp -i /export/starexec/sandbox/benchmark/theBenchmark.c 71.51/34.42 71.51/34.42 !ENTRY org.eclipse.core.resources 2 10035 2019-03-28 12:39:47.171 71.51/34.42 !MESSAGE The workspace will exit with unsaved changes in this session. 71.51/34.42 Received shutdown request... 71.51/34.42 Ultimate: 71.51/34.42 GTK+ Version Check 71.51/34.42 EOF